drashna/ryujinx
1
0
Fork 0
Code Activity Actions

Add intrinsics support (#121)

Browse source 
* Initial intrinsics support

* Update tests to work with the new Vector128 type and intrinsics

* Drop SSE4.1 requirement

* Fix copy-paste mistake
This commit is contained in:
gdkchan 2018-05-11 20:10:27 -03:00 • committed by GitHub
parent 8e306b3ac1
commit f9f111bc85
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
36 changed files with 1658 additions and 1111 deletions
Download patch file Download diff file Expand all files Collapse all files

28
ChocolArm64/Instruction/AInstEmitSimdLogical.cs
View file

@ -2,6 +2,7 @@ using ChocolArm64.Decoder;
using ChocolArm64.State;
using ChocolArm64.Translation;
using System.Reflection.Emit;
using System.Runtime.Intrinsics.X86;
using static ChocolArm64.Instruction.AInstEmitSimdHelper;
@ -11,7 +12,14 @@ namespace ChocolArm64.Instruction
{
public static void And_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.And));
if (AOptimizations.UseSse2)
{
EmitSse2Call(Context, nameof(Sse2.And));
}
else
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.And));
}
}
public static void Bic_V(AILEmitterCtx Context)
@ -95,7 +103,14 @@ namespace ChocolArm64.Instruction
public static void Eor_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Xor));
if (AOptimizations.UseSse2)
{
EmitSse2Call(Context, nameof(Sse2.Xor));
}
else
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Xor));
}
}
public static void Not_V(AILEmitterCtx Context)
@ -114,7 +129,14 @@ namespace ChocolArm64.Instruction
public static void Orr_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Or));
if (AOptimizations.UseSse2)
{
EmitSse2Call(Context, nameof(Sse2.Or));
}
else
{
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Or));
}
}
public static void Orr_Vi(AILEmitterCtx Context)