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Implement a new physical memory manager and replace DeviceMemory (#856)

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* Implement a new physical memory manager and replace DeviceMemory

* Proper generic constraints

* Fix debug build

* Add memory tests

* New CPU memory manager and general code cleanup

* Remove host memory management from CPU project, use Ryujinx.Memory instead

* Fix tests

* Document exceptions on MemoryBlock

* Fix leak on unix memory allocation

* Proper disposal of some objects on tests

* Fix JitCache not being set as initialized

* GetRef without checks for 8-bits and 16-bits CAS

* Add MemoryBlock destructor

* Throw in separate method to improve codegen

* Address PR feedback

* QueryModified improvements

* Fix memory write tracking not marking all pages as modified in some cases

* Simplify MarkRegionAsModified

* Remove XML doc for ghost param

* Add back optimization to avoid useless buffer updates

* Add Ryujinx.Cpu project, move MemoryManager there and remove MemoryBlockWrapper

* Some nits

* Do not perform address translation when size is 0

* Address PR feedback and format NativeInterface class

* Remove ghost parameter description

* Update Ryujinx.Cpu to .NET Core 3.1

* Address PR feedback

* Fix build

* Return a well defined value for GetPhysicalAddress with invalid VA, and do not return unmapped ranges as modified

* Typo
This commit is contained in:
gdkchan 2020-05-03 19:54:50 -03:00 • committed by GitHub
parent 1758424208
commit f77694e4f7
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126 changed files with 2176 additions and 2092 deletions
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53
ARMeilleure/CodeGen/X86/HardwareCapabilities.cs
View file

@ -1,52 +1,23 @@
using ARMeilleure.IntermediateRepresentation;
using ARMeilleure.Translation;
using System.Runtime.Intrinsics.X86;
namespace ARMeilleure.CodeGen.X86
{
static class HardwareCapabilities
{
private delegate ulong GetFeatureInfo();
private static ulong _featureInfo;
public static bool SupportsSse3 => (_featureInfo & (1UL << 0)) != 0;
public static bool SupportsPclmulqdq => (_featureInfo & (1UL << 1)) != 0;
public static bool SupportsSsse3 => (_featureInfo & (1UL << 9)) != 0;
public static bool SupportsFma => (_featureInfo & (1UL << 12)) != 0;
public static bool SupportsCx16 => (_featureInfo & (1UL << 13)) != 0;
public static bool SupportsSse41 => (_featureInfo & (1UL << 19)) != 0;
public static bool SupportsSse42 => (_featureInfo & (1UL << 20)) != 0;
public static bool SupportsPopcnt => (_featureInfo & (1UL << 23)) != 0;
public static bool SupportsAesni => (_featureInfo & (1UL << 25)) != 0;
public static bool SupportsAvx => (_featureInfo & (1UL << 28)) != 0;
public static bool SupportsF16c => (_featureInfo & (1UL << 29)) != 0;
public static bool SupportsSse => (_featureInfo & (1UL << 32 + 25)) != 0;
public static bool SupportsSse2 => (_featureInfo & (1UL << 32 + 26)) != 0;
public static bool SupportsSse => Sse.IsSupported;
public static bool SupportsSse2 => Sse2.IsSupported;
public static bool SupportsSse3 => Sse3.IsSupported;
public static bool SupportsSsse3 => Ssse3.IsSupported;
public static bool SupportsSse41 => Sse41.IsSupported;
public static bool SupportsSse42 => Sse42.IsSupported;
public static bool SupportsPclmulqdq => Pclmulqdq.IsSupported;
public static bool SupportsFma => Fma.IsSupported;
public static bool SupportsPopcnt => Popcnt.IsSupported;
public static bool SupportsAesni => Aes.IsSupported;
public static bool SupportsAvx => Avx.IsSupported;
public static bool ForceLegacySse { get; set; }
public static bool SupportsVexEncoding => SupportsAvx && !ForceLegacySse;
static HardwareCapabilities()
{
EmitterContext context = new EmitterContext();
Operand featureInfo = context.CpuId();
context.Return(featureInfo);
ControlFlowGraph cfg = context.GetControlFlowGraph();
OperandType[] argTypes = new OperandType[0];
GetFeatureInfo getFeatureInfo = Compiler.Compile<GetFeatureInfo>(
cfg,
argTypes,
OperandType.I64,
CompilerOptions.HighCq);
_featureInfo = getFeatureInfo();
}
}
}