Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)
* Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update InstEmitSimdCmp.cs * Update SoftFloat.cs * Update InstEmitAluHelper.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdHelper.cs * Update VectorHelper.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update InstEmitSimdArithmetic.cs * Update OpCodeTable.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdCmp.cs * Update InstEmitSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Create CpuTestSimdFcond.cs * Update OpCodeTable.cs * Update InstEmitSimdMove.cs * Update CpuTestSimdIns.cs * Create CpuTestSimdExt.cs * Nit. * Update PackageReference.
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16 changed files with 2049 additions and 337 deletions
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@ -250,6 +250,24 @@ namespace Ryujinx.Tests.Cpu
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};
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}
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private static uint[] _F_Cmp_Cmpe_S_S_()
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{
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return new uint[]
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{
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0x1E222020u, // FCMP S1, S2
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0x1E222030u // FCMPE S1, S2
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};
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}
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private static uint[] _F_Cmp_Cmpe_S_D_()
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{
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return new uint[]
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{
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0x1E622020u, // FCMP D1, D2
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0x1E622030u // FCMPE D1, D2
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};
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}
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private static uint[] _F_Madd_Msub_S_S_()
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{
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return new uint[]
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@ -316,6 +334,24 @@ namespace Ryujinx.Tests.Cpu
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};
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}
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private static uint[] _F_Mla_Mls_V_2S_4S_()
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{
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return new uint[]
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{
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0x0E20CC00u, // FMLA V0.2S, V0.2S, V0.2S
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0x0EA0CC00u // FMLS V0.2S, V0.2S, V0.2S
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};
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}
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private static uint[] _F_Mla_Mls_V_2D_()
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{
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return new uint[]
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{
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0x4E60CC00u, // FMLA V0.2D, V0.2D, V0.2D
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0x4EE0CC00u // FMLS V0.2D, V0.2D, V0.2D
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};
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}
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private static uint[] _F_Recps_Rsqrts_S_S_()
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{
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return new uint[]
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@ -372,6 +408,28 @@ namespace Ryujinx.Tests.Cpu
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0x5E006000u // SHA256SU1 V0.4S, V0.4S, V0.4S
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};
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}
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private static uint[] _S_Max_Min_P_V_()
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{
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return new uint[]
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{
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0x0E206400u, // SMAX V0.8B, V0.8B, V0.8B
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0x0E20A400u, // SMAXP V0.8B, V0.8B, V0.8B
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0x0E206C00u, // SMIN V0.8B, V0.8B, V0.8B
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0x0E20AC00u // SMINP V0.8B, V0.8B, V0.8B
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};
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}
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private static uint[] _U_Max_Min_P_V_()
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{
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return new uint[]
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{
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0x2E206400u, // UMAX V0.8B, V0.8B, V0.8B
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0x2E20A400u, // UMAXP V0.8B, V0.8B, V0.8B
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0x2E206C00u, // UMIN V0.8B, V0.8B, V0.8B
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0x2E20AC00u // UMINP V0.8B, V0.8B, V0.8B
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};
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}
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#endregion
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private const int RndCnt = 2;
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@ -1248,6 +1306,42 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Dzc | Fpsr.Idc);
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}
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[Test, Pairwise] [Explicit]
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public void F_Cmp_Cmpe_S_S([ValueSource("_F_Cmp_Cmpe_S_S_")] uint opcodes,
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[ValueSource("_1S_F_")] ulong a,
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[ValueSource("_1S_F_")] ulong b)
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{
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Vector128<float> v1 = MakeVectorE0(a);
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Vector128<float> v2 = MakeVectorE0(b);
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bool v = TestContext.CurrentContext.Random.NextBool();
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bool c = TestContext.CurrentContext.Random.NextBool();
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bool z = TestContext.CurrentContext.Random.NextBool();
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bool n = TestContext.CurrentContext.Random.NextBool();
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SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
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CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
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}
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[Test, Pairwise] [Explicit]
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public void F_Cmp_Cmpe_S_D([ValueSource("_F_Cmp_Cmpe_S_D_")] uint opcodes,
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[ValueSource("_1D_F_")] ulong a,
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[ValueSource("_1D_F_")] ulong b)
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{
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Vector128<float> v1 = MakeVectorE0(a);
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Vector128<float> v2 = MakeVectorE0(b);
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bool v = TestContext.CurrentContext.Random.NextBool();
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bool c = TestContext.CurrentContext.Random.NextBool();
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bool z = TestContext.CurrentContext.Random.NextBool();
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bool n = TestContext.CurrentContext.Random.NextBool();
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SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
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CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
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}
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[Test, Pairwise] [Explicit] // Fused.
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public void F_Madd_Msub_S_S([ValueSource("_F_Madd_Msub_S_S_")] uint opcodes,
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[ValueSource("_1S_F_")] ulong a,
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@ -1384,6 +1478,58 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Idc);
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}
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[Test, Pairwise] [Explicit] // Fused.
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public void F_Mla_Mls_V_2S_4S([ValueSource("_F_Mla_Mls_V_2S_4S_")] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_2S_F_")] ulong z,
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[ValueSource("_2S_F_")] ulong a,
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[ValueSource("_2S_F_")] ulong b,
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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{
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opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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Vector128<float> v2 = MakeVectorE0E1(b, b * q);
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int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int fpcr = rnd & (1 << (int)Fpcr.Fz);
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fpcr |= rnd & (1 << (int)Fpcr.Dn);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, fpcr: fpcr);
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CompareAgainstUnicorn(Fpsr.Ioc | Fpsr.Idc, FpSkips.IfUnderflow, FpTolerances.UpToOneUlpsS);
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}
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[Test, Pairwise] [Explicit] // Fused.
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public void F_Mla_Mls_V_2D([ValueSource("_F_Mla_Mls_V_2D_")] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_1D_F_")] ulong z,
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[ValueSource("_1D_F_")] ulong a,
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[ValueSource("_1D_F_")] ulong b)
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{
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opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a);
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Vector128<float> v2 = MakeVectorE0E1(b, b);
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int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
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int fpcr = rnd & (1 << (int)Fpcr.Fz);
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fpcr |= rnd & (1 << (int)Fpcr.Dn);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, fpcr: fpcr);
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CompareAgainstUnicorn(Fpsr.Ioc | Fpsr.Idc, FpSkips.IfUnderflow, FpTolerances.UpToOneUlpsD);
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}
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[Test, Pairwise] [Explicit] // Fused.
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public void F_Recps_Rsqrts_S_S([ValueSource("_F_Recps_Rsqrts_S_S_")] uint opcodes,
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[ValueSource("_1S_F_")] ulong a,
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void S_Max_Min_P_V([ValueSource("_S_Max_Min_P_V_")] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong b,
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[Values(0b00u, 0b01u, 0b10u)] uint size, // Q0: <8B, 4H, 2S>
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[Values(0b0u, 0b1u)] uint q) // Q1: <16B, 8H, 4S>
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{
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opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= ((size & 3) << 22);
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opcodes |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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Vector128<float> v2 = MakeVectorE0E1(b, b * q);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMLAL{2} <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>")]
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public void Smlal_V_8B8H_4H4S_2S2D([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void U_Max_Min_P_V([ValueSource("_U_Max_Min_P_V_")] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong b,
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[Values(0b00u, 0b01u, 0b10u)] uint size, // Q0: <8B, 4H, 2S>
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[Values(0b0u, 0b1u)] uint q) // Q1: <16B, 8H, 4S>
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{
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opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= ((size & 3) << 22);
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opcodes |= ((q & 1) << 30);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a * q);
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Vector128<float> v2 = MakeVectorE0E1(b, b * q);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("UMLAL{2} <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>")]
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public void Umlal_V_8B8H_4H4S_2S2D([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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