Misc. CPU optimizations (#575)
* Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0 * Refactoring * Add a config entry to enable or disable the reg load/store opt. * Remove unnecessary register state stores for calls when the callee is know * Rename IoType to VarType * Enable tier 0 while fixing some perf issues related to tier 0 * Small tweak -- Compile before adding to the cache, to avoid lags * Add required config entry
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884b4e5fd3
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28 changed files with 456 additions and 280 deletions
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@ -8,7 +8,10 @@ namespace ChocolArm64.Translation
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{
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class ILMethodBuilder
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{
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public LocalAlloc LocalAlloc { get; private set; }
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private const int RegsCount = 32;
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private const int RegsMask = RegsCount - 1;
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public RegisterUsage RegUsage { get; private set; }
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public ILGenerator Generator { get; private set; }
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@ -18,29 +21,47 @@ namespace ChocolArm64.Translation
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private string _subName;
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public bool IsAarch64 { get; }
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public bool IsSubComplete { get; }
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private int _localsCount;
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public ILMethodBuilder(ILBlock[] ilBlocks, string subName)
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public ILMethodBuilder(
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ILBlock[] ilBlocks,
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string subName,
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bool isAarch64,
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bool isSubComplete = false)
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{
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_ilBlocks = ilBlocks;
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_subName = subName;
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_ilBlocks = ilBlocks;
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_subName = subName;
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IsAarch64 = isAarch64;
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IsSubComplete = isSubComplete;
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}
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public TranslatedSub GetSubroutine(TranslationTier tier)
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public TranslatedSub GetSubroutine(TranslationTier tier, bool isWorthOptimizing)
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{
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LocalAlloc = new LocalAlloc(_ilBlocks, _ilBlocks[0]);
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RegUsage = new RegisterUsage();
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RegUsage.BuildUses(_ilBlocks[0]);
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DynamicMethod method = new DynamicMethod(_subName, typeof(long), TranslatedSub.FixedArgTypes);
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Generator = method.GetILGenerator();
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long intNiRegsMask = RegUsage.GetIntNotInputs(_ilBlocks[0]);
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long vecNiRegsMask = RegUsage.GetVecNotInputs(_ilBlocks[0]);
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TranslatedSub subroutine = new TranslatedSub(method, tier);
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TranslatedSub subroutine = new TranslatedSub(
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method,
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intNiRegsMask,
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vecNiRegsMask,
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tier,
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isWorthOptimizing);
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_locals = new Dictionary<Register, int>();
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_localsCount = 0;
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new ILOpCodeLoadState(_ilBlocks[0]).Emit(this);
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Generator = method.GetILGenerator();
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foreach (ILBlock ilBlock in _ilBlocks)
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{
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@ -80,13 +101,13 @@ namespace ChocolArm64.Translation
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public static Register GetRegFromBit(int bit, RegisterType baseType)
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{
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if (bit < 32)
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if (bit < RegsCount)
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{
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return new Register(bit, baseType);
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}
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else if (baseType == RegisterType.Int)
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{
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return new Register(bit & 0x1f, RegisterType.Flag);
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return new Register(bit & RegsMask, RegisterType.Flag);
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}
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else
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{
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@ -96,7 +117,7 @@ namespace ChocolArm64.Translation
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public static bool IsRegIndex(int index)
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{
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return (uint)index < 32;
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return (uint)index < RegsCount;
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}
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}
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}
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