drashna/ryujinx
1
0
Fork 0
Code Activity Actions

T32: Implement Asimd instructions (#3692)

Browse source
This commit is contained in:
merry 2022-09-13 22:25:37 +01:00 • committed by GitHub
parent 66f16f4392
commit e05bf90af6
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
23 changed files with 271 additions and 215 deletions
Download patch file Download diff file Expand all files Collapse all files

5
ARMeilleure/Decoders/OpCode32SimdSqrte.cs
View file

@ -2,9 +2,10 @@
{
class OpCode32SimdSqrte : OpCode32Simd
{
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode);
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode, false);
public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSqrte(inst, address, opCode, true);
public OpCode32SimdSqrte(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
public OpCode32SimdSqrte(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
{
Size = (opCode >> 18) & 0x1;
F = ((opCode >> 8) & 0x1) != 0;