drashna/ryujinx
1
0
Fork 0
Code Activity Actions

Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions (#3677)

Browse source 
* Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions

* PPTC version

* Fix VQADD/VQSUB

* Improve MRC/MCR handling and exception messages

In case data is being recompiled as code, we don't want to throw at emit stage, instead we should only throw if it actually tries to execute
This commit is contained in:
gdkchan 2022-09-09 21:47:38 -03:00 • committed by GitHub
parent c6d82209ab
commit db45688aa8
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
12 changed files with 651 additions and 193 deletions
Download patch file Download diff file Expand all files Collapse all files

12
ARMeilleure/Decoders/OpCode32SimdMovn.cs Normal file
View file

@ -0,0 +1,12 @@
namespace ARMeilleure.Decoders
{
class OpCode32SimdMovn : OpCode32Simd
{
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdMovn(inst, address, opCode);
public OpCode32SimdMovn(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
Size = (opCode >> 18) & 0x3;
}
}
}