Move GPU emulation from Ryujinx.HLE to Ryujinx.Graphics and misc changes (#402)
* Move GPU LLE emulation from HLE to Graphics * Graphics: Move Gal/Texture to Texture * Remove Engines/ directory and namespace * Use tables for image formats * Abstract OpCode decoding * Simplify image table * Do not leak Read* symbols in TextureReader * Fixups * Rename IGalFrameBuffer -> IGalRenderTarget * Remove MaxBpp hardcoded value * Change yet again texture data and add G8R8 flipping * Rename GalFrameBufferFormat to GalSurfaceFormat * Unident EnsureSetup in ImageHandler * Add IsCompressed * Address some feedback
This commit is contained in:
ReinUsesLisp
gdkchan
parent
a0c78f7920
commit
ce1d5be212
58 changed files with 3378 additions and 3448 deletions
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@ -1,11 +0,0 @@
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using Ryujinx.HLE.Gpu.Memory;
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namespace Ryujinx.HLE.Gpu.Engines
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{
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interface INvGpuEngine
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{
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int[] Registers { get; }
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void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry);
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}
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}
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@ -1,418 +0,0 @@
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using Ryujinx.HLE.Gpu.Memory;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.HLE.Gpu.Engines
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{
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class MacroInterpreter
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{
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private enum AssignmentOperation
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{
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IgnoreAndFetch = 0,
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Move = 1,
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MoveAndSetMaddr = 2,
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FetchAndSend = 3,
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MoveAndSend = 4,
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FetchAndSetMaddr = 5,
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MoveAndSetMaddrThenFetchAndSend = 6,
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MoveAndSetMaddrThenSendHigh = 7
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}
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private enum AluOperation
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{
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AluReg = 0,
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AddImmediate = 1,
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BitfieldReplace = 2,
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BitfieldExtractLslImm = 3,
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BitfieldExtractLslReg = 4,
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ReadImmediate = 5
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}
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private enum AluRegOperation
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{
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Add = 0,
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AddWithCarry = 1,
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Subtract = 2,
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SubtractWithBorrow = 3,
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BitwiseExclusiveOr = 8,
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BitwiseOr = 9,
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BitwiseAnd = 10,
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BitwiseAndNot = 11,
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BitwiseNotAnd = 12
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}
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private NvGpuFifo PFifo;
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private INvGpuEngine Engine;
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public Queue<int> Fifo { get; private set; }
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private int[] Gprs;
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private int MethAddr;
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private int MethIncr;
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private bool Carry;
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private int OpCode;
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private int PipeOp;
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private int Pc;
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public MacroInterpreter(NvGpuFifo PFifo, INvGpuEngine Engine)
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{
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this.PFifo = PFifo;
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this.Engine = Engine;
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Fifo = new Queue<int>();
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Gprs = new int[8];
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}
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public void Execute(NvGpuVmm Vmm, int[] Mme, int Position, int Param)
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{
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Reset();
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Gprs[1] = Param;
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Pc = Position;
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FetchOpCode(Mme);
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while (Step(Vmm, Mme));
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//Due to the delay slot, we still need to execute
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//one more instruction before we actually exit.
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Step(Vmm, Mme);
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}
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private void Reset()
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{
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for (int Index = 0; Index < Gprs.Length; Index++)
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{
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Gprs[Index] = 0;
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}
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MethAddr = 0;
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MethIncr = 0;
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Carry = false;
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}
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private bool Step(NvGpuVmm Vmm, int[] Mme)
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{
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int BaseAddr = Pc - 1;
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FetchOpCode(Mme);
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if ((OpCode & 7) < 7)
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{
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//Operation produces a value.
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AssignmentOperation AsgOp = (AssignmentOperation)((OpCode >> 4) & 7);
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int Result = GetAluResult();
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switch (AsgOp)
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{
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//Fetch parameter and ignore result.
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case AssignmentOperation.IgnoreAndFetch:
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{
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SetDstGpr(FetchParam());
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break;
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}
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//Move result.
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case AssignmentOperation.Move:
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{
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SetDstGpr(Result);
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break;
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}
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//Move result and use as Method Address.
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case AssignmentOperation.MoveAndSetMaddr:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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break;
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}
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//Fetch parameter and send result.
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case AssignmentOperation.FetchAndSend:
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{
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SetDstGpr(FetchParam());
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Send(Vmm, Result);
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break;
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}
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//Move and send result.
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case AssignmentOperation.MoveAndSend:
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{
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SetDstGpr(Result);
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Send(Vmm, Result);
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break;
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}
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//Fetch parameter and use result as Method Address.
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case AssignmentOperation.FetchAndSetMaddr:
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{
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SetDstGpr(FetchParam());
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SetMethAddr(Result);
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break;
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}
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//Move result and use as Method Address, then fetch and send paramter.
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case AssignmentOperation.MoveAndSetMaddrThenFetchAndSend:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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Send(Vmm, FetchParam());
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break;
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}
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//Move result and use as Method Address, then send bits 17:12 of result.
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case AssignmentOperation.MoveAndSetMaddrThenSendHigh:
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{
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SetDstGpr(Result);
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SetMethAddr(Result);
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Send(Vmm, (Result >> 12) & 0x3f);
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break;
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}
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}
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}
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else
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{
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//Branch.
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bool OnNotZero = ((OpCode >> 4) & 1) != 0;
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bool Taken = OnNotZero
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? GetGprA() != 0
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: GetGprA() == 0;
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if (Taken)
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{
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Pc = BaseAddr + GetImm();
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bool NoDelays = (OpCode & 0x20) != 0;
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if (NoDelays)
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{
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FetchOpCode(Mme);
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}
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return true;
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}
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}
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bool Exit = (OpCode & 0x80) != 0;
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return !Exit;
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}
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private void FetchOpCode(int[] Mme)
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{
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OpCode = PipeOp;
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PipeOp = Mme[Pc++];
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}
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private int GetAluResult()
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{
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AluOperation Op = (AluOperation)(OpCode & 7);
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switch (Op)
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{
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case AluOperation.AluReg:
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{
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AluRegOperation AluOp = (AluRegOperation)((OpCode >> 17) & 0x1f);
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return GetAluResult(AluOp, GetGprA(), GetGprB());
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}
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case AluOperation.AddImmediate:
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{
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return GetGprA() + GetImm();
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}
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case AluOperation.BitfieldReplace:
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case AluOperation.BitfieldExtractLslImm:
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case AluOperation.BitfieldExtractLslReg:
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{
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int BfSrcBit = (OpCode >> 17) & 0x1f;
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int BfSize = (OpCode >> 22) & 0x1f;
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int BfDstBit = (OpCode >> 27) & 0x1f;
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int BfMask = (1 << BfSize) - 1;
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int Dst = GetGprA();
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int Src = GetGprB();
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switch (Op)
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{
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case AluOperation.BitfieldReplace:
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{
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Src = (int)((uint)Src >> BfSrcBit) & BfMask;
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Dst &= ~(BfMask << BfDstBit);
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Dst |= Src << BfDstBit;
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return Dst;
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}
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case AluOperation.BitfieldExtractLslImm:
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{
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Src = (int)((uint)Src >> Dst) & BfMask;
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return Src << BfDstBit;
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}
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case AluOperation.BitfieldExtractLslReg:
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{
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Src = (int)((uint)Src >> BfSrcBit) & BfMask;
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return Src << Dst;
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}
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}
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break;
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}
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case AluOperation.ReadImmediate:
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{
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return Read(GetGprA() + GetImm());
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}
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}
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throw new ArgumentException(nameof(OpCode));
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}
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private int GetAluResult(AluRegOperation AluOp, int A, int B)
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{
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switch (AluOp)
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{
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case AluRegOperation.Add:
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{
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ulong Result = (ulong)A + (ulong)B;
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Carry = Result > 0xffffffff;
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return (int)Result;
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}
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case AluRegOperation.AddWithCarry:
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{
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ulong Result = (ulong)A + (ulong)B + (Carry ? 1UL : 0UL);
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Carry = Result > 0xffffffff;
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return (int)Result;
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}
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case AluRegOperation.Subtract:
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{
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ulong Result = (ulong)A - (ulong)B;
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Carry = Result < 0x100000000;
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return (int)Result;
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}
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case AluRegOperation.SubtractWithBorrow:
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{
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ulong Result = (ulong)A - (ulong)B - (Carry ? 0UL : 1UL);
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Carry = Result < 0x100000000;
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return (int)Result;
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}
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case AluRegOperation.BitwiseExclusiveOr: return A ^ B;
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case AluRegOperation.BitwiseOr: return A | B;
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case AluRegOperation.BitwiseAnd: return A & B;
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case AluRegOperation.BitwiseAndNot: return A & ~B;
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case AluRegOperation.BitwiseNotAnd: return ~(A & B);
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}
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throw new ArgumentOutOfRangeException(nameof(AluOp));
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}
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private int GetImm()
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{
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//Note: The immediate is signed, the sign-extension is intended here.
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return OpCode >> 14;
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}
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private void SetMethAddr(int Value)
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{
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MethAddr = (Value >> 0) & 0xfff;
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MethIncr = (Value >> 12) & 0x3f;
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}
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private void SetDstGpr(int Value)
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{
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Gprs[(OpCode >> 8) & 7] = Value;
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}
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private int GetGprA()
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{
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return GetGprValue((OpCode >> 11) & 7);
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}
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private int GetGprB()
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{
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return GetGprValue((OpCode >> 14) & 7);
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}
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private int GetGprValue(int Index)
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{
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return Index != 0 ? Gprs[Index] : 0;
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}
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private int FetchParam()
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{
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int Value;
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//If we don't have any parameters in the FIFO,
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//keep running the PFIFO engine until it writes the parameters.
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while (!Fifo.TryDequeue(out Value))
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{
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if (!PFifo.Step())
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{
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return 0;
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}
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}
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return Value;
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}
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private int Read(int Reg)
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{
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return Engine.Registers[Reg];
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}
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private void Send(NvGpuVmm Vmm, int Value)
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{
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NvGpuPBEntry PBEntry = new NvGpuPBEntry(MethAddr, 0, Value);
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Engine.CallMethod(Vmm, PBEntry);
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MethAddr += MethIncr;
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}
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}
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}
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namespace Ryujinx.HLE.Gpu.Engines
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{
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enum NvGpuEngine
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{
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_2d = 0x902d,
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_3d = 0xb197,
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Compute = 0xb1c0,
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Kepler = 0xa140,
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Dma = 0xb0b5
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}
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}
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@ -1,208 +0,0 @@
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using Ryujinx.Graphics.Gal;
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using Ryujinx.HLE.Gpu.Memory;
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using Ryujinx.HLE.Gpu.Texture;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.HLE.Gpu.Engines
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{
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class NvGpuEngine2d : INvGpuEngine
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{
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private enum CopyOperation
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{
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SrcCopyAnd,
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RopAnd,
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Blend,
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SrcCopy,
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Rop,
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SrcCopyPremult,
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BlendPremult
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}
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public int[] Registers { get; private set; }
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private NvGpu Gpu;
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private Dictionary<int, NvGpuMethod> Methods;
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public NvGpuEngine2d(NvGpu Gpu)
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{
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this.Gpu = Gpu;
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Registers = new int[0xe00];
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Methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
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{
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while (Count-- > 0)
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{
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Methods.Add(Meth, Method);
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Meth += Stride;
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}
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}
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AddMethod(0xb5, 1, 1, TextureCopy);
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}
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public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
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{
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Method(Vmm, PBEntry);
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}
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else
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{
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WriteRegister(PBEntry);
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}
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}
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private void TextureCopy(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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CopyOperation Operation = (CopyOperation)ReadRegister(NvGpuEngine2dReg.CopyOperation);
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bool SrcLinear = ReadRegister(NvGpuEngine2dReg.SrcLinear) != 0;
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int SrcWidth = ReadRegister(NvGpuEngine2dReg.SrcWidth);
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int SrcHeight = ReadRegister(NvGpuEngine2dReg.SrcHeight);
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int SrcPitch = ReadRegister(NvGpuEngine2dReg.SrcPitch);
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int SrcBlkDim = ReadRegister(NvGpuEngine2dReg.SrcBlockDimensions);
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bool DstLinear = ReadRegister(NvGpuEngine2dReg.DstLinear) != 0;
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int DstWidth = ReadRegister(NvGpuEngine2dReg.DstWidth);
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int DstHeight = ReadRegister(NvGpuEngine2dReg.DstHeight);
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int DstPitch = ReadRegister(NvGpuEngine2dReg.DstPitch);
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int DstBlkDim = ReadRegister(NvGpuEngine2dReg.DstBlockDimensions);
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TextureSwizzle SrcSwizzle = SrcLinear
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? TextureSwizzle.Pitch
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: TextureSwizzle.BlockLinear;
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TextureSwizzle DstSwizzle = DstLinear
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? TextureSwizzle.Pitch
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: TextureSwizzle.BlockLinear;
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int SrcBlockHeight = 1 << ((SrcBlkDim >> 4) & 0xf);
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int DstBlockHeight = 1 << ((DstBlkDim >> 4) & 0xf);
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long SrcAddress = MakeInt64From2xInt32(NvGpuEngine2dReg.SrcAddress);
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long DstAddress = MakeInt64From2xInt32(NvGpuEngine2dReg.DstAddress);
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long SrcKey = Vmm.GetPhysicalAddress(SrcAddress);
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long DstKey = Vmm.GetPhysicalAddress(DstAddress);
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bool IsSrcFb = Gpu.Engine3d.IsFrameBufferPosition(SrcKey);
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bool IsDstFb = Gpu.Engine3d.IsFrameBufferPosition(DstKey);
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TextureInfo SrcTexture()
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{
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return new TextureInfo(
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SrcAddress,
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SrcWidth,
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SrcHeight,
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SrcPitch,
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SrcBlockHeight, 1,
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SrcSwizzle,
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GalTextureFormat.A8B8G8R8);
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}
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TextureInfo DstTexture()
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{
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return new TextureInfo(
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DstAddress,
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DstWidth,
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DstHeight,
|
||||
DstPitch,
|
||||
DstBlockHeight, 1,
|
||||
DstSwizzle,
|
||||
GalTextureFormat.A8B8G8R8);
|
||||
}
|
||||
|
||||
//TODO: fb -> fb copies, tex -> fb copies, formats other than RGBA8,
|
||||
//make it throw for unimpl stuff (like the copy mode)...
|
||||
if (IsSrcFb && IsDstFb)
|
||||
{
|
||||
//Frame Buffer -> Frame Buffer copy.
|
||||
Gpu.Renderer.FrameBuffer.Copy(
|
||||
SrcKey,
|
||||
DstKey,
|
||||
0,
|
||||
0,
|
||||
SrcWidth,
|
||||
SrcHeight,
|
||||
0,
|
||||
0,
|
||||
DstWidth,
|
||||
DstHeight);
|
||||
}
|
||||
if (IsSrcFb)
|
||||
{
|
||||
//Frame Buffer -> Texture copy.
|
||||
Gpu.Renderer.FrameBuffer.GetBufferData(SrcKey, (byte[] Buffer) =>
|
||||
{
|
||||
TextureInfo Src = SrcTexture();
|
||||
TextureInfo Dst = DstTexture();
|
||||
|
||||
if (Src.Width != Dst.Width ||
|
||||
Src.Height != Dst.Height)
|
||||
{
|
||||
throw new NotImplementedException("Texture resizing is not supported");
|
||||
}
|
||||
|
||||
TextureWriter.Write(Vmm, Dst, Buffer);
|
||||
});
|
||||
}
|
||||
else if (IsDstFb)
|
||||
{
|
||||
byte[] Buffer = TextureReader.Read(Vmm, SrcTexture());
|
||||
|
||||
Gpu.Renderer.FrameBuffer.SetBufferData(
|
||||
DstKey,
|
||||
DstWidth,
|
||||
DstHeight,
|
||||
Buffer);
|
||||
}
|
||||
else
|
||||
{
|
||||
//Texture -> Texture copy.
|
||||
TextureInfo Src = SrcTexture();
|
||||
TextureInfo Dst = DstTexture();
|
||||
|
||||
if (Src.Width != Dst.Width ||
|
||||
Src.Height != Dst.Height)
|
||||
{
|
||||
throw new NotImplementedException("Texture resizing is not supported");
|
||||
}
|
||||
|
||||
TextureWriter.Write(Vmm, Dst, TextureReader.Read(Vmm, Src));
|
||||
}
|
||||
}
|
||||
|
||||
private long MakeInt64From2xInt32(NvGpuEngine2dReg Reg)
|
||||
{
|
||||
return
|
||||
(long)Registers[(int)Reg + 0] << 32 |
|
||||
(uint)Registers[(int)Reg + 1];
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int ArgsCount = PBEntry.Arguments.Count;
|
||||
|
||||
if (ArgsCount > 0)
|
||||
{
|
||||
Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
|
||||
}
|
||||
}
|
||||
|
||||
private int ReadRegister(NvGpuEngine2dReg Reg)
|
||||
{
|
||||
return Registers[(int)Reg];
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuEngine2dReg Reg, int Value)
|
||||
{
|
||||
Registers[(int)Reg] = Value;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
enum NvGpuEngine2dReg
|
||||
{
|
||||
DstFormat = 0x80,
|
||||
DstLinear = 0x81,
|
||||
DstBlockDimensions = 0x82,
|
||||
DstDepth = 0x83,
|
||||
DstLayer = 0x84,
|
||||
DstPitch = 0x85,
|
||||
DstWidth = 0x86,
|
||||
DstHeight = 0x87,
|
||||
DstAddress = 0x88,
|
||||
SrcFormat = 0x8c,
|
||||
SrcLinear = 0x8d,
|
||||
SrcBlockDimensions = 0x8e,
|
||||
SrcDepth = 0x8f,
|
||||
SrcLayer = 0x90,
|
||||
SrcPitch = 0x91,
|
||||
SrcWidth = 0x92,
|
||||
SrcHeight = 0x93,
|
||||
SrcAddress = 0x94,
|
||||
CopyOperation = 0xab
|
||||
}
|
||||
}
|
||||
|
|
@ -1,895 +0,0 @@
|
|||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.HLE.Gpu.Texture;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
class NvGpuEngine3d : INvGpuEngine
|
||||
{
|
||||
public int[] Registers { get; private set; }
|
||||
|
||||
private NvGpu Gpu;
|
||||
|
||||
private Dictionary<int, NvGpuMethod> Methods;
|
||||
|
||||
private struct ConstBuffer
|
||||
{
|
||||
public bool Enabled;
|
||||
public long Position;
|
||||
public int Size;
|
||||
}
|
||||
|
||||
private ConstBuffer[][] ConstBuffers;
|
||||
|
||||
private HashSet<long> FrameBuffers;
|
||||
|
||||
private List<long>[] UploadedKeys;
|
||||
|
||||
private int CurrentInstance = 0;
|
||||
|
||||
public NvGpuEngine3d(NvGpu Gpu)
|
||||
{
|
||||
this.Gpu = Gpu;
|
||||
|
||||
Registers = new int[0xe00];
|
||||
|
||||
Methods = new Dictionary<int, NvGpuMethod>();
|
||||
|
||||
void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
|
||||
{
|
||||
while (Count-- > 0)
|
||||
{
|
||||
Methods.Add(Meth, Method);
|
||||
|
||||
Meth += Stride;
|
||||
}
|
||||
}
|
||||
|
||||
AddMethod(0x585, 1, 1, VertexEndGl);
|
||||
AddMethod(0x674, 1, 1, ClearBuffers);
|
||||
AddMethod(0x6c3, 1, 1, QueryControl);
|
||||
AddMethod(0x8e4, 16, 1, CbData);
|
||||
AddMethod(0x904, 5, 8, CbBind);
|
||||
|
||||
ConstBuffers = new ConstBuffer[6][];
|
||||
|
||||
for (int Index = 0; Index < ConstBuffers.Length; Index++)
|
||||
{
|
||||
ConstBuffers[Index] = new ConstBuffer[18];
|
||||
}
|
||||
|
||||
FrameBuffers = new HashSet<long>();
|
||||
|
||||
UploadedKeys = new List<long>[(int)NvGpuBufferType.Count];
|
||||
|
||||
for (int i = 0; i < UploadedKeys.Length; i++)
|
||||
{
|
||||
UploadedKeys[i] = new List<long>();
|
||||
}
|
||||
}
|
||||
|
||||
public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
|
||||
{
|
||||
Method(Vmm, PBEntry);
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteRegister(PBEntry);
|
||||
}
|
||||
}
|
||||
|
||||
public void ResetCache()
|
||||
{
|
||||
foreach (List<long> Uploaded in UploadedKeys)
|
||||
{
|
||||
Uploaded.Clear();
|
||||
}
|
||||
}
|
||||
|
||||
private void VertexEndGl(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
LockCaches();
|
||||
|
||||
GalPipelineState State = new GalPipelineState();
|
||||
|
||||
SetFlip(State);
|
||||
SetFrontFace(State);
|
||||
SetCullFace(State);
|
||||
SetDepth(State);
|
||||
SetStencil(State);
|
||||
SetAlphaBlending(State);
|
||||
SetPrimitiveRestart(State);
|
||||
|
||||
for (int FbIndex = 0; FbIndex < 8; FbIndex++)
|
||||
{
|
||||
SetFrameBuffer(Vmm, 0);
|
||||
}
|
||||
|
||||
SetZeta(Vmm);
|
||||
|
||||
SetRenderTargets();
|
||||
|
||||
long[] Keys = UploadShaders(Vmm);
|
||||
|
||||
Gpu.Renderer.Shader.BindProgram();
|
||||
|
||||
UploadTextures(Vmm, State, Keys);
|
||||
UploadConstBuffers(Vmm, State, Keys);
|
||||
UploadVertexArrays(Vmm, State);
|
||||
|
||||
DispatchRender(Vmm, State);
|
||||
|
||||
UnlockCaches();
|
||||
}
|
||||
|
||||
private void LockCaches()
|
||||
{
|
||||
Gpu.Renderer.Buffer.LockCache();
|
||||
Gpu.Renderer.Rasterizer.LockCaches();
|
||||
Gpu.Renderer.Texture.LockCache();
|
||||
}
|
||||
|
||||
private void UnlockCaches()
|
||||
{
|
||||
Gpu.Renderer.Buffer.UnlockCache();
|
||||
Gpu.Renderer.Rasterizer.UnlockCaches();
|
||||
Gpu.Renderer.Texture.UnlockCache();
|
||||
}
|
||||
|
||||
private void ClearBuffers(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int Arg0 = PBEntry.Arguments[0];
|
||||
|
||||
int FbIndex = (Arg0 >> 6) & 0xf;
|
||||
|
||||
GalClearBufferFlags Flags = (GalClearBufferFlags)(Arg0 & 0x3f);
|
||||
|
||||
float Red = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 0);
|
||||
float Green = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 1);
|
||||
float Blue = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 2);
|
||||
float Alpha = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 3);
|
||||
|
||||
float Depth = ReadRegisterFloat(NvGpuEngine3dReg.ClearDepth);
|
||||
|
||||
int Stencil = ReadRegister(NvGpuEngine3dReg.ClearStencil);
|
||||
|
||||
SetFrameBuffer(Vmm, FbIndex);
|
||||
SetZeta(Vmm);
|
||||
|
||||
Gpu.Renderer.Rasterizer.ClearBuffers(
|
||||
Flags,
|
||||
FbIndex,
|
||||
Red, Green, Blue, Alpha,
|
||||
Depth,
|
||||
Stencil);
|
||||
}
|
||||
|
||||
private void SetFrameBuffer(NvGpuVmm Vmm, int FbIndex)
|
||||
{
|
||||
long VA = MakeInt64From2xInt32(NvGpuEngine3dReg.FrameBufferNAddress + FbIndex * 0x10);
|
||||
|
||||
int Format = ReadRegister(NvGpuEngine3dReg.FrameBufferNFormat + FbIndex * 0x10);
|
||||
|
||||
if (VA == 0 || Format == 0)
|
||||
{
|
||||
Gpu.Renderer.FrameBuffer.UnbindColor(FbIndex);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
long Key = Vmm.GetPhysicalAddress(VA);
|
||||
|
||||
FrameBuffers.Add(Key);
|
||||
|
||||
int Width = ReadRegister(NvGpuEngine3dReg.FrameBufferNWidth + FbIndex * 0x10);
|
||||
int Height = ReadRegister(NvGpuEngine3dReg.FrameBufferNHeight + FbIndex * 0x10);
|
||||
|
||||
float TX = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNTranslateX + FbIndex * 8);
|
||||
float TY = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNTranslateY + FbIndex * 8);
|
||||
|
||||
float SX = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNScaleX + FbIndex * 8);
|
||||
float SY = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNScaleY + FbIndex * 8);
|
||||
|
||||
int VpX = (int)MathF.Max(0, TX - MathF.Abs(SX));
|
||||
int VpY = (int)MathF.Max(0, TY - MathF.Abs(SY));
|
||||
|
||||
int VpW = (int)(TX + MathF.Abs(SX)) - VpX;
|
||||
int VpH = (int)(TY + MathF.Abs(SY)) - VpY;
|
||||
|
||||
GalImageFormat ImageFormat = ImageFormatConverter.ConvertFrameBuffer((GalFrameBufferFormat)Format);
|
||||
|
||||
GalImage Image = new GalImage(Width, Height, ImageFormat);
|
||||
|
||||
long Size = TextureHelper.GetTextureSize(Image);
|
||||
|
||||
Gpu.Renderer.Texture.CreateFb(Key, Size, Image);
|
||||
Gpu.Renderer.FrameBuffer.BindColor(Key, FbIndex);
|
||||
|
||||
Gpu.Renderer.FrameBuffer.SetViewport(VpX, VpY, VpW, VpH);
|
||||
}
|
||||
|
||||
private void SetZeta(NvGpuVmm Vmm)
|
||||
{
|
||||
long ZA = MakeInt64From2xInt32(NvGpuEngine3dReg.ZetaAddress);
|
||||
|
||||
int Format = ReadRegister(NvGpuEngine3dReg.ZetaFormat);
|
||||
|
||||
bool ZetaEnable = (ReadRegister(NvGpuEngine3dReg.ZetaEnable) & 1) != 0;
|
||||
|
||||
if (ZA == 0 || Format == 0 || !ZetaEnable)
|
||||
{
|
||||
Gpu.Renderer.FrameBuffer.UnbindZeta();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
long Key = Vmm.GetPhysicalAddress(ZA);
|
||||
|
||||
int Width = ReadRegister(NvGpuEngine3dReg.ZetaHoriz);
|
||||
int Height = ReadRegister(NvGpuEngine3dReg.ZetaVert);
|
||||
|
||||
GalImageFormat ImageFormat = ImageFormatConverter.ConvertZeta((GalZetaFormat)Format);
|
||||
|
||||
GalImage Image = new GalImage(Width, Height, ImageFormat);
|
||||
|
||||
long Size = TextureHelper.GetTextureSize(Image);
|
||||
|
||||
Gpu.Renderer.Texture.CreateFb(Key, Size, Image);
|
||||
Gpu.Renderer.FrameBuffer.BindZeta(Key);
|
||||
}
|
||||
|
||||
private long[] UploadShaders(NvGpuVmm Vmm)
|
||||
{
|
||||
long[] Keys = new long[5];
|
||||
|
||||
long BasePosition = MakeInt64From2xInt32(NvGpuEngine3dReg.ShaderAddress);
|
||||
|
||||
int Index = 1;
|
||||
|
||||
int VpAControl = ReadRegister(NvGpuEngine3dReg.ShaderNControl);
|
||||
|
||||
bool VpAEnable = (VpAControl & 1) != 0;
|
||||
|
||||
if (VpAEnable)
|
||||
{
|
||||
//Note: The maxwell supports 2 vertex programs, usually
|
||||
//only VP B is used, but in some cases VP A is also used.
|
||||
//In this case, it seems to function as an extra vertex
|
||||
//shader stage.
|
||||
//The graphics abstraction layer has a special overload for this
|
||||
//case, which should merge the two shaders into one vertex shader.
|
||||
int VpAOffset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset);
|
||||
int VpBOffset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset + 0x10);
|
||||
|
||||
long VpAPos = BasePosition + (uint)VpAOffset;
|
||||
long VpBPos = BasePosition + (uint)VpBOffset;
|
||||
|
||||
Keys[(int)GalShaderType.Vertex] = VpBPos;
|
||||
|
||||
Gpu.Renderer.Shader.Create(Vmm, VpAPos, VpBPos, GalShaderType.Vertex);
|
||||
Gpu.Renderer.Shader.Bind(VpBPos);
|
||||
|
||||
Index = 2;
|
||||
}
|
||||
|
||||
for (; Index < 6; Index++)
|
||||
{
|
||||
GalShaderType Type = GetTypeFromProgram(Index);
|
||||
|
||||
int Control = ReadRegister(NvGpuEngine3dReg.ShaderNControl + Index * 0x10);
|
||||
int Offset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset + Index * 0x10);
|
||||
|
||||
//Note: Vertex Program (B) is always enabled.
|
||||
bool Enable = (Control & 1) != 0 || Index == 1;
|
||||
|
||||
if (!Enable)
|
||||
{
|
||||
Gpu.Renderer.Shader.Unbind(Type);
|
||||
|
||||
continue;
|
||||
}
|
||||
|
||||
long Key = BasePosition + (uint)Offset;
|
||||
|
||||
Keys[(int)Type] = Key;
|
||||
|
||||
Gpu.Renderer.Shader.Create(Vmm, Key, Type);
|
||||
Gpu.Renderer.Shader.Bind(Key);
|
||||
}
|
||||
|
||||
return Keys;
|
||||
}
|
||||
|
||||
private static GalShaderType GetTypeFromProgram(int Program)
|
||||
{
|
||||
switch (Program)
|
||||
{
|
||||
case 0:
|
||||
case 1: return GalShaderType.Vertex;
|
||||
case 2: return GalShaderType.TessControl;
|
||||
case 3: return GalShaderType.TessEvaluation;
|
||||
case 4: return GalShaderType.Geometry;
|
||||
case 5: return GalShaderType.Fragment;
|
||||
}
|
||||
|
||||
throw new ArgumentOutOfRangeException(nameof(Program));
|
||||
}
|
||||
|
||||
private void SetFlip(GalPipelineState State)
|
||||
{
|
||||
State.FlipX = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleX);
|
||||
State.FlipY = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleY);
|
||||
}
|
||||
|
||||
private void SetFrontFace(GalPipelineState State)
|
||||
{
|
||||
float SignX = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleX);
|
||||
float SignY = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleY);
|
||||
|
||||
GalFrontFace FrontFace = (GalFrontFace)ReadRegister(NvGpuEngine3dReg.FrontFace);
|
||||
|
||||
//Flipping breaks facing. Flipping front facing too fixes it
|
||||
if (SignX != SignY)
|
||||
{
|
||||
switch (FrontFace)
|
||||
{
|
||||
case GalFrontFace.CW:
|
||||
FrontFace = GalFrontFace.CCW;
|
||||
break;
|
||||
|
||||
case GalFrontFace.CCW:
|
||||
FrontFace = GalFrontFace.CW;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
State.FrontFace = FrontFace;
|
||||
}
|
||||
|
||||
private void SetCullFace(GalPipelineState State)
|
||||
{
|
||||
State.CullFaceEnabled = (ReadRegister(NvGpuEngine3dReg.CullFaceEnable) & 1) != 0;
|
||||
|
||||
if (State.CullFaceEnabled)
|
||||
{
|
||||
State.CullFace = (GalCullFace)ReadRegister(NvGpuEngine3dReg.CullFace);
|
||||
}
|
||||
}
|
||||
|
||||
private void SetDepth(GalPipelineState State)
|
||||
{
|
||||
State.DepthTestEnabled = (ReadRegister(NvGpuEngine3dReg.DepthTestEnable) & 1) != 0;
|
||||
|
||||
if (State.DepthTestEnabled)
|
||||
{
|
||||
State.DepthFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.DepthTestFunction);
|
||||
}
|
||||
}
|
||||
|
||||
private void SetStencil(GalPipelineState State)
|
||||
{
|
||||
State.StencilTestEnabled = (ReadRegister(NvGpuEngine3dReg.StencilEnable) & 1) != 0;
|
||||
|
||||
if (State.StencilTestEnabled)
|
||||
{
|
||||
State.StencilBackFuncFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.StencilBackFuncFunc);
|
||||
State.StencilBackFuncRef = ReadRegister(NvGpuEngine3dReg.StencilBackFuncRef);
|
||||
State.StencilBackFuncMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilBackFuncMask);
|
||||
State.StencilBackOpFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpFail);
|
||||
State.StencilBackOpZFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpZFail);
|
||||
State.StencilBackOpZPass = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpZPass);
|
||||
State.StencilBackMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilBackMask);
|
||||
|
||||
State.StencilFrontFuncFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.StencilFrontFuncFunc);
|
||||
State.StencilFrontFuncRef = ReadRegister(NvGpuEngine3dReg.StencilFrontFuncRef);
|
||||
State.StencilFrontFuncMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilFrontFuncMask);
|
||||
State.StencilFrontOpFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpFail);
|
||||
State.StencilFrontOpZFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpZFail);
|
||||
State.StencilFrontOpZPass = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpZPass);
|
||||
State.StencilFrontMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilFrontMask);
|
||||
}
|
||||
}
|
||||
|
||||
private void SetAlphaBlending(GalPipelineState State)
|
||||
{
|
||||
//TODO: Support independent blend properly.
|
||||
State.BlendEnabled = (ReadRegister(NvGpuEngine3dReg.IBlendNEnable) & 1) != 0;
|
||||
|
||||
if (State.BlendEnabled)
|
||||
{
|
||||
State.BlendSeparateAlpha = (ReadRegister(NvGpuEngine3dReg.IBlendNSeparateAlpha) & 1) != 0;
|
||||
|
||||
State.BlendEquationRgb = (GalBlendEquation)ReadRegister(NvGpuEngine3dReg.IBlendNEquationRgb);
|
||||
State.BlendFuncSrcRgb = (GalBlendFactor)ReadRegister(NvGpuEngine3dReg.IBlendNFuncSrcRgb);
|
||||
State.BlendFuncDstRgb = (GalBlendFactor)ReadRegister(NvGpuEngine3dReg.IBlendNFuncDstRgb);
|
||||
State.BlendEquationAlpha = (GalBlendEquation)ReadRegister(NvGpuEngine3dReg.IBlendNEquationAlpha);
|
||||
State.BlendFuncSrcAlpha = (GalBlendFactor)ReadRegister(NvGpuEngine3dReg.IBlendNFuncSrcAlpha);
|
||||
State.BlendFuncDstAlpha = (GalBlendFactor)ReadRegister(NvGpuEngine3dReg.IBlendNFuncDstAlpha);
|
||||
}
|
||||
}
|
||||
|
||||
private void SetPrimitiveRestart(GalPipelineState State)
|
||||
{
|
||||
State.PrimitiveRestartEnabled = (ReadRegister(NvGpuEngine3dReg.PrimRestartEnable) & 1) != 0;
|
||||
|
||||
if (State.PrimitiveRestartEnabled)
|
||||
{
|
||||
State.PrimitiveRestartIndex = (uint)ReadRegister(NvGpuEngine3dReg.PrimRestartIndex);
|
||||
}
|
||||
}
|
||||
|
||||
private void SetRenderTargets()
|
||||
{
|
||||
bool SeparateFragData = (ReadRegister(NvGpuEngine3dReg.RTSeparateFragData) & 1) != 0;
|
||||
|
||||
if (SeparateFragData)
|
||||
{
|
||||
uint Control = (uint)(ReadRegister(NvGpuEngine3dReg.RTControl));
|
||||
|
||||
uint Count = Control & 0xf;
|
||||
|
||||
int[] Map = new int[Count];
|
||||
|
||||
for (int i = 0; i < Count; i++)
|
||||
{
|
||||
int Shift = 4 + i * 3;
|
||||
|
||||
Map[i] = (int)((Control >> Shift) & 7);
|
||||
}
|
||||
|
||||
Gpu.Renderer.FrameBuffer.SetMap(Map);
|
||||
}
|
||||
else
|
||||
{
|
||||
Gpu.Renderer.FrameBuffer.SetMap(null);
|
||||
}
|
||||
}
|
||||
|
||||
private void UploadTextures(NvGpuVmm Vmm, GalPipelineState State, long[] Keys)
|
||||
{
|
||||
long BaseShPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.ShaderAddress);
|
||||
|
||||
int TextureCbIndex = ReadRegister(NvGpuEngine3dReg.TextureCbIndex);
|
||||
|
||||
int TexIndex = 0;
|
||||
|
||||
for (int Index = 0; Index < Keys.Length; Index++)
|
||||
{
|
||||
foreach (ShaderDeclInfo DeclInfo in Gpu.Renderer.Shader.GetTextureUsage(Keys[Index]))
|
||||
{
|
||||
long Position;
|
||||
|
||||
if (DeclInfo.IsCb)
|
||||
{
|
||||
Position = ConstBuffers[Index][DeclInfo.Cbuf].Position;
|
||||
}
|
||||
else
|
||||
{
|
||||
Position = ConstBuffers[Index][TextureCbIndex].Position;
|
||||
}
|
||||
|
||||
int TextureHandle = Vmm.ReadInt32(Position + DeclInfo.Index * 4);
|
||||
|
||||
UploadTexture(Vmm, TexIndex, TextureHandle);
|
||||
|
||||
TexIndex++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void UploadTexture(NvGpuVmm Vmm, int TexIndex, int TextureHandle)
|
||||
{
|
||||
if (TextureHandle == 0)
|
||||
{
|
||||
//TODO: Is this correct?
|
||||
//Some games like puyo puyo will have 0 handles.
|
||||
//It may be just normal behaviour or a bug caused by sync issues.
|
||||
//The game does initialize the value properly after through.
|
||||
return;
|
||||
}
|
||||
|
||||
int TicIndex = (TextureHandle >> 0) & 0xfffff;
|
||||
int TscIndex = (TextureHandle >> 20) & 0xfff;
|
||||
|
||||
long TicPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.TexHeaderPoolOffset);
|
||||
long TscPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.TexSamplerPoolOffset);
|
||||
|
||||
TicPosition += TicIndex * 0x20;
|
||||
TscPosition += TscIndex * 0x20;
|
||||
|
||||
GalTextureSampler Sampler = TextureFactory.MakeSampler(Gpu, Vmm, TscPosition);
|
||||
|
||||
long Key = Vmm.ReadInt64(TicPosition + 4) & 0xffffffffffff;
|
||||
|
||||
Key = Vmm.GetPhysicalAddress(Key);
|
||||
|
||||
if (Key == -1)
|
||||
{
|
||||
//FIXME: Should'nt ignore invalid addresses.
|
||||
return;
|
||||
}
|
||||
|
||||
if (IsFrameBufferPosition(Key))
|
||||
{
|
||||
//This texture is a frame buffer texture,
|
||||
//we shouldn't read anything from memory and bind
|
||||
//the frame buffer texture instead, since we're not
|
||||
//really writing anything to memory.
|
||||
Gpu.Renderer.FrameBuffer.BindTexture(Key, TexIndex);
|
||||
}
|
||||
else
|
||||
{
|
||||
GalImage NewImage = TextureFactory.MakeTexture(Vmm, TicPosition);
|
||||
|
||||
long Size = (uint)TextureHelper.GetTextureSize(NewImage);
|
||||
|
||||
bool HasCachedTexture = false;
|
||||
|
||||
if (Gpu.Renderer.Texture.TryGetCachedTexture(Key, Size, out GalImage Image))
|
||||
{
|
||||
if (NewImage.Equals(Image) && !QueryKeyUpload(Vmm, Key, Size, NvGpuBufferType.Texture))
|
||||
{
|
||||
Gpu.Renderer.Texture.Bind(Key, TexIndex);
|
||||
|
||||
HasCachedTexture = true;
|
||||
}
|
||||
}
|
||||
|
||||
if (!HasCachedTexture)
|
||||
{
|
||||
byte[] Data = TextureFactory.GetTextureData(Vmm, TicPosition);
|
||||
|
||||
Gpu.Renderer.Texture.Create(Key, Data, NewImage);
|
||||
}
|
||||
|
||||
Gpu.Renderer.Texture.Bind(Key, TexIndex);
|
||||
}
|
||||
|
||||
Gpu.Renderer.Texture.SetSampler(Sampler);
|
||||
}
|
||||
|
||||
private void UploadConstBuffers(NvGpuVmm Vmm, GalPipelineState State, long[] Keys)
|
||||
{
|
||||
for (int Stage = 0; Stage < Keys.Length; Stage++)
|
||||
{
|
||||
foreach (ShaderDeclInfo DeclInfo in Gpu.Renderer.Shader.GetConstBufferUsage(Keys[Stage]))
|
||||
{
|
||||
ConstBuffer Cb = ConstBuffers[Stage][DeclInfo.Cbuf];
|
||||
|
||||
if (!Cb.Enabled)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
long Key = Vmm.GetPhysicalAddress(Cb.Position);
|
||||
|
||||
if (QueryKeyUpload(Vmm, Key, Cb.Size, NvGpuBufferType.ConstBuffer))
|
||||
{
|
||||
IntPtr Source = Vmm.GetHostAddress(Cb.Position, Cb.Size);
|
||||
|
||||
Gpu.Renderer.Buffer.SetData(Key, Cb.Size, Source);
|
||||
}
|
||||
|
||||
State.ConstBufferKeys[Stage][DeclInfo.Cbuf] = Key;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void UploadVertexArrays(NvGpuVmm Vmm, GalPipelineState State)
|
||||
{
|
||||
long IndexPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.IndexArrayAddress);
|
||||
|
||||
long IboKey = Vmm.GetPhysicalAddress(IndexPosition);
|
||||
|
||||
int IndexEntryFmt = ReadRegister(NvGpuEngine3dReg.IndexArrayFormat);
|
||||
int IndexCount = ReadRegister(NvGpuEngine3dReg.IndexBatchCount);
|
||||
|
||||
GalIndexFormat IndexFormat = (GalIndexFormat)IndexEntryFmt;
|
||||
|
||||
int IndexEntrySize = 1 << IndexEntryFmt;
|
||||
|
||||
if (IndexEntrySize > 4)
|
||||
{
|
||||
throw new InvalidOperationException();
|
||||
}
|
||||
|
||||
if (IndexCount != 0)
|
||||
{
|
||||
int IbSize = IndexCount * IndexEntrySize;
|
||||
|
||||
bool IboCached = Gpu.Renderer.Rasterizer.IsIboCached(IboKey, (uint)IbSize);
|
||||
|
||||
if (!IboCached || QueryKeyUpload(Vmm, IboKey, (uint)IbSize, NvGpuBufferType.Index))
|
||||
{
|
||||
IntPtr DataAddress = Vmm.GetHostAddress(IndexPosition, IbSize);
|
||||
|
||||
Gpu.Renderer.Rasterizer.CreateIbo(IboKey, IbSize, DataAddress);
|
||||
}
|
||||
|
||||
Gpu.Renderer.Rasterizer.SetIndexArray(IbSize, IndexFormat);
|
||||
}
|
||||
|
||||
List<GalVertexAttrib>[] Attribs = new List<GalVertexAttrib>[32];
|
||||
|
||||
for (int Attr = 0; Attr < 16; Attr++)
|
||||
{
|
||||
int Packed = ReadRegister(NvGpuEngine3dReg.VertexAttribNFormat + Attr);
|
||||
|
||||
int ArrayIndex = Packed & 0x1f;
|
||||
|
||||
if (Attribs[ArrayIndex] == null)
|
||||
{
|
||||
Attribs[ArrayIndex] = new List<GalVertexAttrib>();
|
||||
}
|
||||
|
||||
Attribs[ArrayIndex].Add(new GalVertexAttrib(
|
||||
Attr,
|
||||
((Packed >> 6) & 0x1) != 0,
|
||||
(Packed >> 7) & 0x3fff,
|
||||
(GalVertexAttribSize)((Packed >> 21) & 0x3f),
|
||||
(GalVertexAttribType)((Packed >> 27) & 0x7),
|
||||
((Packed >> 31) & 0x1) != 0));
|
||||
}
|
||||
|
||||
State.VertexBindings = new GalVertexBinding[32];
|
||||
|
||||
for (int Index = 0; Index < 32; Index++)
|
||||
{
|
||||
if (Attribs[Index] == null)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
int Control = ReadRegister(NvGpuEngine3dReg.VertexArrayNControl + Index * 4);
|
||||
|
||||
bool Enable = (Control & 0x1000) != 0;
|
||||
|
||||
if (!Enable)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
long VertexPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.VertexArrayNAddress + Index * 4);
|
||||
long VertexEndPos = MakeInt64From2xInt32(NvGpuEngine3dReg.VertexArrayNEndAddr + Index * 2);
|
||||
|
||||
int VertexDivisor = ReadRegister(NvGpuEngine3dReg.VertexArrayNDivisor + Index * 4);
|
||||
|
||||
bool Instanced = (ReadRegister(NvGpuEngine3dReg.VertexArrayNInstance + Index) & 1) != 0;
|
||||
|
||||
int Stride = Control & 0xfff;
|
||||
|
||||
if (Instanced && VertexDivisor != 0)
|
||||
{
|
||||
VertexPosition += Stride * (CurrentInstance / VertexDivisor);
|
||||
}
|
||||
|
||||
if (VertexPosition > VertexEndPos)
|
||||
{
|
||||
//Instance is invalid, ignore the draw call
|
||||
continue;
|
||||
}
|
||||
|
||||
long VboKey = Vmm.GetPhysicalAddress(VertexPosition);
|
||||
|
||||
long VbSize = (VertexEndPos - VertexPosition) + 1;
|
||||
|
||||
bool VboCached = Gpu.Renderer.Rasterizer.IsVboCached(VboKey, VbSize);
|
||||
|
||||
if (!VboCached || QueryKeyUpload(Vmm, VboKey, VbSize, NvGpuBufferType.Vertex))
|
||||
{
|
||||
IntPtr DataAddress = Vmm.GetHostAddress(VertexPosition, VbSize);
|
||||
|
||||
Gpu.Renderer.Rasterizer.CreateVbo(VboKey, (int)VbSize, DataAddress);
|
||||
}
|
||||
|
||||
State.VertexBindings[Index].Enabled = true;
|
||||
State.VertexBindings[Index].Stride = Stride;
|
||||
State.VertexBindings[Index].VboKey = VboKey;
|
||||
State.VertexBindings[Index].Instanced = Instanced;
|
||||
State.VertexBindings[Index].Divisor = VertexDivisor;
|
||||
State.VertexBindings[Index].Attribs = Attribs[Index].ToArray();
|
||||
}
|
||||
}
|
||||
|
||||
private void DispatchRender(NvGpuVmm Vmm, GalPipelineState State)
|
||||
{
|
||||
int IndexCount = ReadRegister(NvGpuEngine3dReg.IndexBatchCount);
|
||||
int PrimCtrl = ReadRegister(NvGpuEngine3dReg.VertexBeginGl);
|
||||
|
||||
GalPrimitiveType PrimType = (GalPrimitiveType)(PrimCtrl & 0xffff);
|
||||
|
||||
bool InstanceNext = ((PrimCtrl >> 26) & 1) != 0;
|
||||
bool InstanceCont = ((PrimCtrl >> 27) & 1) != 0;
|
||||
|
||||
if (InstanceNext && InstanceCont)
|
||||
{
|
||||
throw new InvalidOperationException("GPU tried to increase and reset instance count at the same time");
|
||||
}
|
||||
|
||||
if (InstanceNext)
|
||||
{
|
||||
CurrentInstance++;
|
||||
}
|
||||
else if (!InstanceCont)
|
||||
{
|
||||
CurrentInstance = 0;
|
||||
}
|
||||
|
||||
State.Instance = CurrentInstance;
|
||||
|
||||
Gpu.Renderer.Pipeline.Bind(State);
|
||||
|
||||
if (IndexCount != 0)
|
||||
{
|
||||
int IndexEntryFmt = ReadRegister(NvGpuEngine3dReg.IndexArrayFormat);
|
||||
int IndexFirst = ReadRegister(NvGpuEngine3dReg.IndexBatchFirst);
|
||||
int VertexBase = ReadRegister(NvGpuEngine3dReg.VertexArrayElemBase);
|
||||
|
||||
long IndexPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.IndexArrayAddress);
|
||||
|
||||
long IboKey = Vmm.GetPhysicalAddress(IndexPosition);
|
||||
|
||||
Gpu.Renderer.Rasterizer.DrawElements(IboKey, IndexFirst, VertexBase, PrimType);
|
||||
}
|
||||
else
|
||||
{
|
||||
int VertexFirst = ReadRegister(NvGpuEngine3dReg.VertexArrayFirst);
|
||||
int VertexCount = ReadRegister(NvGpuEngine3dReg.VertexArrayCount);
|
||||
|
||||
Gpu.Renderer.Rasterizer.DrawArrays(VertexFirst, VertexCount, PrimType);
|
||||
}
|
||||
|
||||
//Is the GPU really clearing those registers after draw?
|
||||
WriteRegister(NvGpuEngine3dReg.IndexBatchFirst, 0);
|
||||
WriteRegister(NvGpuEngine3dReg.IndexBatchCount, 0);
|
||||
}
|
||||
|
||||
private enum QueryMode
|
||||
{
|
||||
WriteSeq,
|
||||
Sync,
|
||||
WriteCounterAndTimestamp
|
||||
}
|
||||
|
||||
private void QueryControl(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
WriteRegister(PBEntry);
|
||||
|
||||
long Position = MakeInt64From2xInt32(NvGpuEngine3dReg.QueryAddress);
|
||||
|
||||
int Seq = Registers[(int)NvGpuEngine3dReg.QuerySequence];
|
||||
int Ctrl = Registers[(int)NvGpuEngine3dReg.QueryControl];
|
||||
|
||||
QueryMode Mode = (QueryMode)(Ctrl & 3);
|
||||
|
||||
switch (Mode)
|
||||
{
|
||||
case QueryMode.WriteSeq: Vmm.WriteInt32(Position, Seq); break;
|
||||
|
||||
case QueryMode.WriteCounterAndTimestamp:
|
||||
{
|
||||
//TODO: Implement counters.
|
||||
long Counter = 1;
|
||||
|
||||
long Timestamp = (uint)Environment.TickCount;
|
||||
|
||||
Timestamp = (long)(Timestamp * 615384.615385);
|
||||
|
||||
Vmm.WriteInt64(Position + 0, Counter);
|
||||
Vmm.WriteInt64(Position + 8, Timestamp);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void CbData(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
long Position = MakeInt64From2xInt32(NvGpuEngine3dReg.ConstBufferAddress);
|
||||
|
||||
int Offset = ReadRegister(NvGpuEngine3dReg.ConstBufferOffset);
|
||||
|
||||
foreach (int Arg in PBEntry.Arguments)
|
||||
{
|
||||
Vmm.WriteInt32(Position + Offset, Arg);
|
||||
|
||||
Offset += 4;
|
||||
}
|
||||
|
||||
WriteRegister(NvGpuEngine3dReg.ConstBufferOffset, Offset);
|
||||
|
||||
UploadedKeys[(int)NvGpuBufferType.ConstBuffer].Clear();
|
||||
}
|
||||
|
||||
private void CbBind(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int Stage = (PBEntry.Method - 0x904) >> 3;
|
||||
|
||||
int Index = PBEntry.Arguments[0];
|
||||
|
||||
bool Enabled = (Index & 1) != 0;
|
||||
|
||||
Index = (Index >> 4) & 0x1f;
|
||||
|
||||
long Position = MakeInt64From2xInt32(NvGpuEngine3dReg.ConstBufferAddress);
|
||||
|
||||
long CbKey = Vmm.GetPhysicalAddress(Position);
|
||||
|
||||
int Size = ReadRegister(NvGpuEngine3dReg.ConstBufferSize);
|
||||
|
||||
if (!Gpu.Renderer.Buffer.IsCached(CbKey, Size))
|
||||
{
|
||||
Gpu.Renderer.Buffer.Create(CbKey, Size);
|
||||
}
|
||||
|
||||
ConstBuffer Cb = ConstBuffers[Stage][Index];
|
||||
|
||||
if (Cb.Position != Position || Cb.Enabled != Enabled || Cb.Size != Size)
|
||||
{
|
||||
ConstBuffers[Stage][Index].Position = Position;
|
||||
ConstBuffers[Stage][Index].Enabled = Enabled;
|
||||
ConstBuffers[Stage][Index].Size = Size;
|
||||
}
|
||||
}
|
||||
|
||||
private float GetFlipSign(NvGpuEngine3dReg Reg)
|
||||
{
|
||||
return MathF.Sign(ReadRegisterFloat(Reg));
|
||||
}
|
||||
|
||||
private long MakeInt64From2xInt32(NvGpuEngine3dReg Reg)
|
||||
{
|
||||
return
|
||||
(long)Registers[(int)Reg + 0] << 32 |
|
||||
(uint)Registers[(int)Reg + 1];
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int ArgsCount = PBEntry.Arguments.Count;
|
||||
|
||||
if (ArgsCount > 0)
|
||||
{
|
||||
Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
|
||||
}
|
||||
}
|
||||
|
||||
private int ReadRegister(NvGpuEngine3dReg Reg)
|
||||
{
|
||||
return Registers[(int)Reg];
|
||||
}
|
||||
|
||||
private float ReadRegisterFloat(NvGpuEngine3dReg Reg)
|
||||
{
|
||||
return BitConverter.Int32BitsToSingle(ReadRegister(Reg));
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuEngine3dReg Reg, int Value)
|
||||
{
|
||||
Registers[(int)Reg] = Value;
|
||||
}
|
||||
|
||||
public bool IsFrameBufferPosition(long Position)
|
||||
{
|
||||
return FrameBuffers.Contains(Position);
|
||||
}
|
||||
|
||||
private bool QueryKeyUpload(NvGpuVmm Vmm, long Key, long Size, NvGpuBufferType Type)
|
||||
{
|
||||
List<long> Uploaded = UploadedKeys[(int)Type];
|
||||
|
||||
if (Uploaded.Contains(Key))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
Uploaded.Add(Key);
|
||||
|
||||
return Vmm.IsRegionModified(Key, Size, Type);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,101 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
enum NvGpuEngine3dReg
|
||||
{
|
||||
FrameBufferNAddress = 0x200,
|
||||
FrameBufferNWidth = 0x202,
|
||||
FrameBufferNHeight = 0x203,
|
||||
FrameBufferNFormat = 0x204,
|
||||
ViewportNScaleX = 0x280,
|
||||
ViewportNScaleY = 0x281,
|
||||
ViewportNScaleZ = 0x282,
|
||||
ViewportNTranslateX = 0x283,
|
||||
ViewportNTranslateY = 0x284,
|
||||
ViewportNTranslateZ = 0x285,
|
||||
ViewportNHoriz = 0x300,
|
||||
ViewportNVert = 0x301,
|
||||
VertexArrayFirst = 0x35d,
|
||||
VertexArrayCount = 0x35e,
|
||||
ClearNColor = 0x360,
|
||||
ClearDepth = 0x364,
|
||||
ClearStencil = 0x368,
|
||||
StencilBackFuncRef = 0x3d5,
|
||||
StencilBackMask = 0x3d6,
|
||||
StencilBackFuncMask = 0x3d7,
|
||||
RTSeparateFragData = 0x3eb,
|
||||
ZetaAddress = 0x3f8,
|
||||
ZetaFormat = 0x3fa,
|
||||
ZetaBlockDimensions = 0x3fb,
|
||||
ZetaLayerStride = 0x3fc,
|
||||
VertexAttribNFormat = 0x458,
|
||||
RTControl = 0x487,
|
||||
ZetaHoriz = 0x48a,
|
||||
ZetaVert = 0x48b,
|
||||
ZetaArrayMode = 0x48c,
|
||||
DepthTestEnable = 0x4b3,
|
||||
IBlendEnable = 0x4b9,
|
||||
DepthTestFunction = 0x4c3,
|
||||
BlendSeparateAlpha = 0x4cf,
|
||||
BlendEquationRgb = 0x4d0,
|
||||
BlendFuncSrcRgb = 0x4d1,
|
||||
BlendFuncDstRgb = 0x4d2,
|
||||
BlendEquationAlpha = 0x4d3,
|
||||
BlendFuncSrcAlpha = 0x4d4,
|
||||
BlendFuncDstAlpha = 0x4d6,
|
||||
BlendEnableMaster = 0x4d7,
|
||||
IBlendNEnable = 0x4d8,
|
||||
StencilEnable = 0x4e0,
|
||||
StencilFrontOpFail = 0x4e1,
|
||||
StencilFrontOpZFail = 0x4e2,
|
||||
StencilFrontOpZPass = 0x4e3,
|
||||
StencilFrontFuncFunc = 0x4e4,
|
||||
StencilFrontFuncRef = 0x4e5,
|
||||
StencilFrontFuncMask = 0x4e6,
|
||||
StencilFrontMask = 0x4e7,
|
||||
VertexArrayElemBase = 0x50d,
|
||||
VertexArrayInstBase = 0x50e,
|
||||
ZetaEnable = 0x54e,
|
||||
TexHeaderPoolOffset = 0x55d,
|
||||
TexSamplerPoolOffset = 0x557,
|
||||
StencilTwoSideEnable = 0x565,
|
||||
StencilBackOpFail = 0x566,
|
||||
StencilBackOpZFail = 0x567,
|
||||
StencilBackOpZPass = 0x568,
|
||||
StencilBackFuncFunc = 0x569,
|
||||
ShaderAddress = 0x582,
|
||||
VertexBeginGl = 0x586,
|
||||
PrimRestartEnable = 0x591,
|
||||
PrimRestartIndex = 0x592,
|
||||
IndexArrayAddress = 0x5f2,
|
||||
IndexArrayEndAddr = 0x5f4,
|
||||
IndexArrayFormat = 0x5f6,
|
||||
IndexBatchFirst = 0x5f7,
|
||||
IndexBatchCount = 0x5f8,
|
||||
VertexArrayNInstance = 0x620,
|
||||
CullFaceEnable = 0x646,
|
||||
FrontFace = 0x647,
|
||||
CullFace = 0x648,
|
||||
QueryAddress = 0x6c0,
|
||||
QuerySequence = 0x6c2,
|
||||
QueryControl = 0x6c3,
|
||||
VertexArrayNControl = 0x700,
|
||||
VertexArrayNAddress = 0x701,
|
||||
VertexArrayNDivisor = 0x703,
|
||||
IBlendNSeparateAlpha = 0x780,
|
||||
IBlendNEquationRgb = 0x781,
|
||||
IBlendNFuncSrcRgb = 0x782,
|
||||
IBlendNFuncDstRgb = 0x783,
|
||||
IBlendNEquationAlpha = 0x784,
|
||||
IBlendNFuncSrcAlpha = 0x785,
|
||||
IBlendNFuncDstAlpha = 0x786,
|
||||
VertexArrayNEndAddr = 0x7c0,
|
||||
ShaderNControl = 0x800,
|
||||
ShaderNOffset = 0x801,
|
||||
ShaderNMaxGprs = 0x803,
|
||||
ShaderNType = 0x804,
|
||||
ConstBufferSize = 0x8e0,
|
||||
ConstBufferAddress = 0x8e1,
|
||||
ConstBufferOffset = 0x8e3,
|
||||
TextureCbIndex = 0x982
|
||||
}
|
||||
}
|
||||
|
|
@ -1,143 +0,0 @@
|
|||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.HLE.Gpu.Texture;
|
||||
using System.Collections.Generic;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
class NvGpuEngineDma : INvGpuEngine
|
||||
{
|
||||
public int[] Registers { get; private set; }
|
||||
|
||||
private NvGpu Gpu;
|
||||
|
||||
private Dictionary<int, NvGpuMethod> Methods;
|
||||
|
||||
public NvGpuEngineDma(NvGpu Gpu)
|
||||
{
|
||||
this.Gpu = Gpu;
|
||||
|
||||
Registers = new int[0x1d6];
|
||||
|
||||
Methods = new Dictionary<int, NvGpuMethod>();
|
||||
|
||||
void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
|
||||
{
|
||||
while (Count-- > 0)
|
||||
{
|
||||
Methods.Add(Meth, Method);
|
||||
|
||||
Meth += Stride;
|
||||
}
|
||||
}
|
||||
|
||||
AddMethod(0xc0, 1, 1, Execute);
|
||||
}
|
||||
|
||||
public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
|
||||
{
|
||||
Method(Vmm, PBEntry);
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteRegister(PBEntry);
|
||||
}
|
||||
}
|
||||
|
||||
private void Execute(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int Control = PBEntry.Arguments[0];
|
||||
|
||||
bool SrcLinear = ((Control >> 7) & 1) != 0;
|
||||
bool DstLinear = ((Control >> 8) & 1) != 0;
|
||||
|
||||
long SrcAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.SrcAddress);
|
||||
long DstAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.DstAddress);
|
||||
|
||||
int SrcPitch = ReadRegister(NvGpuEngineDmaReg.SrcPitch);
|
||||
int DstPitch = ReadRegister(NvGpuEngineDmaReg.DstPitch);
|
||||
|
||||
int DstBlkDim = ReadRegister(NvGpuEngineDmaReg.DstBlkDim);
|
||||
int DstSizeX = ReadRegister(NvGpuEngineDmaReg.DstSizeX);
|
||||
int DstSizeY = ReadRegister(NvGpuEngineDmaReg.DstSizeY);
|
||||
int DstSizeZ = ReadRegister(NvGpuEngineDmaReg.DstSizeZ);
|
||||
int DstPosXY = ReadRegister(NvGpuEngineDmaReg.DstPosXY);
|
||||
int DstPosZ = ReadRegister(NvGpuEngineDmaReg.DstPosZ);
|
||||
|
||||
int SrcBlkDim = ReadRegister(NvGpuEngineDmaReg.SrcBlkDim);
|
||||
int SrcSizeX = ReadRegister(NvGpuEngineDmaReg.SrcSizeX);
|
||||
int SrcSizeY = ReadRegister(NvGpuEngineDmaReg.SrcSizeY);
|
||||
int SrcSizeZ = ReadRegister(NvGpuEngineDmaReg.SrcSizeZ);
|
||||
int SrcPosXY = ReadRegister(NvGpuEngineDmaReg.SrcPosXY);
|
||||
int SrcPosZ = ReadRegister(NvGpuEngineDmaReg.SrcPosZ);
|
||||
|
||||
int DstPosX = (DstPosXY >> 0) & 0xffff;
|
||||
int DstPosY = (DstPosXY >> 16) & 0xffff;
|
||||
|
||||
int SrcPosX = (SrcPosXY >> 0) & 0xffff;
|
||||
int SrcPosY = (SrcPosXY >> 16) & 0xffff;
|
||||
|
||||
int SrcBlockHeight = 1 << ((SrcBlkDim >> 4) & 0xf);
|
||||
int DstBlockHeight = 1 << ((DstBlkDim >> 4) & 0xf);
|
||||
|
||||
ISwizzle SrcSwizzle;
|
||||
|
||||
if (SrcLinear)
|
||||
{
|
||||
SrcSwizzle = new LinearSwizzle(SrcPitch, 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
SrcSwizzle = new BlockLinearSwizzle(SrcSizeX, 1, SrcBlockHeight);
|
||||
}
|
||||
|
||||
ISwizzle DstSwizzle;
|
||||
|
||||
if (DstLinear)
|
||||
{
|
||||
DstSwizzle = new LinearSwizzle(DstPitch, 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
DstSwizzle = new BlockLinearSwizzle(DstSizeX, 1, DstBlockHeight);
|
||||
}
|
||||
|
||||
for (int Y = 0; Y < DstSizeY; Y++)
|
||||
for (int X = 0; X < DstSizeX; X++)
|
||||
{
|
||||
long SrcOffset = SrcAddress + (uint)SrcSwizzle.GetSwizzleOffset(X, Y);
|
||||
long DstOffset = DstAddress + (uint)DstSwizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
Vmm.WriteByte(DstOffset, Vmm.ReadByte(SrcOffset));
|
||||
}
|
||||
}
|
||||
|
||||
private long MakeInt64From2xInt32(NvGpuEngineDmaReg Reg)
|
||||
{
|
||||
return
|
||||
(long)Registers[(int)Reg + 0] << 32 |
|
||||
(uint)Registers[(int)Reg + 1];
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuPBEntry PBEntry)
|
||||
{
|
||||
int ArgsCount = PBEntry.Arguments.Count;
|
||||
|
||||
if (ArgsCount > 0)
|
||||
{
|
||||
Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
|
||||
}
|
||||
}
|
||||
|
||||
private int ReadRegister(NvGpuEngineDmaReg Reg)
|
||||
{
|
||||
return Registers[(int)Reg];
|
||||
}
|
||||
|
||||
private void WriteRegister(NvGpuEngineDmaReg Reg, int Value)
|
||||
{
|
||||
Registers[(int)Reg] = Value;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
enum NvGpuEngineDmaReg
|
||||
{
|
||||
SrcAddress = 0x100,
|
||||
DstAddress = 0x102,
|
||||
SrcPitch = 0x104,
|
||||
DstPitch = 0x105,
|
||||
DstBlkDim = 0x1c3,
|
||||
DstSizeX = 0x1c4,
|
||||
DstSizeY = 0x1c5,
|
||||
DstSizeZ = 0x1c6,
|
||||
DstPosZ = 0x1c7,
|
||||
DstPosXY = 0x1c8,
|
||||
SrcBlkDim = 0x1ca,
|
||||
SrcSizeX = 0x1cb,
|
||||
SrcSizeY = 0x1cc,
|
||||
SrcSizeZ = 0x1cd,
|
||||
SrcPosZ = 0x1ce,
|
||||
SrcPosXY = 0x1cf
|
||||
}
|
||||
}
|
||||
|
|
@ -1,198 +0,0 @@
|
|||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using System.Collections.Concurrent;
|
||||
using System.Threading;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
class NvGpuFifo
|
||||
{
|
||||
private const int MacrosCount = 0x80;
|
||||
private const int MacroIndexMask = MacrosCount - 1;
|
||||
|
||||
//Note: The size of the macro memory is unknown, we just make
|
||||
//a guess here and use 256kb as the size. Increase if needed.
|
||||
private const int MmeWords = 256 * 256;
|
||||
|
||||
private NvGpu Gpu;
|
||||
|
||||
private ConcurrentQueue<(NvGpuVmm, NvGpuPBEntry[])> BufferQueue;
|
||||
|
||||
private NvGpuEngine[] SubChannels;
|
||||
|
||||
public AutoResetEvent Event { get; private set; }
|
||||
|
||||
private struct CachedMacro
|
||||
{
|
||||
public int Position { get; private set; }
|
||||
|
||||
private MacroInterpreter Interpreter;
|
||||
|
||||
public CachedMacro(NvGpuFifo PFifo, INvGpuEngine Engine, int Position)
|
||||
{
|
||||
this.Position = Position;
|
||||
|
||||
Interpreter = new MacroInterpreter(PFifo, Engine);
|
||||
}
|
||||
|
||||
public void PushParam(int Param)
|
||||
{
|
||||
Interpreter?.Fifo.Enqueue(Param);
|
||||
}
|
||||
|
||||
public void Execute(NvGpuVmm Vmm, int[] Mme, int Param)
|
||||
{
|
||||
Interpreter?.Execute(Vmm, Mme, Position, Param);
|
||||
}
|
||||
}
|
||||
|
||||
private int CurrMacroPosition;
|
||||
private int CurrMacroBindIndex;
|
||||
|
||||
private CachedMacro[] Macros;
|
||||
|
||||
private int[] Mme;
|
||||
|
||||
public NvGpuFifo(NvGpu Gpu)
|
||||
{
|
||||
this.Gpu = Gpu;
|
||||
|
||||
BufferQueue = new ConcurrentQueue<(NvGpuVmm, NvGpuPBEntry[])>();
|
||||
|
||||
SubChannels = new NvGpuEngine[8];
|
||||
|
||||
Macros = new CachedMacro[MacrosCount];
|
||||
|
||||
Mme = new int[MmeWords];
|
||||
|
||||
Event = new AutoResetEvent(false);
|
||||
}
|
||||
|
||||
public void PushBuffer(NvGpuVmm Vmm, NvGpuPBEntry[] Buffer)
|
||||
{
|
||||
BufferQueue.Enqueue((Vmm, Buffer));
|
||||
|
||||
Event.Set();
|
||||
}
|
||||
|
||||
public void DispatchCalls()
|
||||
{
|
||||
while (Step());
|
||||
}
|
||||
|
||||
private (NvGpuVmm Vmm, NvGpuPBEntry[] Pb) Curr;
|
||||
|
||||
private int CurrPbEntryIndex;
|
||||
|
||||
public bool Step()
|
||||
{
|
||||
while (Curr.Pb == null || Curr.Pb.Length <= CurrPbEntryIndex)
|
||||
{
|
||||
if (!BufferQueue.TryDequeue(out Curr))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
Gpu.Engine3d.ResetCache();
|
||||
|
||||
CurrPbEntryIndex = 0;
|
||||
}
|
||||
|
||||
CallMethod(Curr.Vmm, Curr.Pb[CurrPbEntryIndex++]);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
private void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
if (PBEntry.Method < 0x80)
|
||||
{
|
||||
switch ((NvGpuFifoMeth)PBEntry.Method)
|
||||
{
|
||||
case NvGpuFifoMeth.BindChannel:
|
||||
{
|
||||
NvGpuEngine Engine = (NvGpuEngine)PBEntry.Arguments[0];
|
||||
|
||||
SubChannels[PBEntry.SubChannel] = Engine;
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case NvGpuFifoMeth.SetMacroUploadAddress:
|
||||
{
|
||||
CurrMacroPosition = PBEntry.Arguments[0];
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case NvGpuFifoMeth.SendMacroCodeData:
|
||||
{
|
||||
foreach (int Arg in PBEntry.Arguments)
|
||||
{
|
||||
Mme[CurrMacroPosition++] = Arg;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case NvGpuFifoMeth.SetMacroBindingIndex:
|
||||
{
|
||||
CurrMacroBindIndex = PBEntry.Arguments[0];
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case NvGpuFifoMeth.BindMacro:
|
||||
{
|
||||
int Position = PBEntry.Arguments[0];
|
||||
|
||||
Macros[CurrMacroBindIndex] = new CachedMacro(this, Gpu.Engine3d, Position);
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (SubChannels[PBEntry.SubChannel])
|
||||
{
|
||||
case NvGpuEngine._2d: Call2dMethod (Vmm, PBEntry); break;
|
||||
case NvGpuEngine._3d: Call3dMethod (Vmm, PBEntry); break;
|
||||
case NvGpuEngine.Dma: CallDmaMethod(Vmm, PBEntry); break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void Call2dMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
Gpu.Engine2d.CallMethod(Vmm, PBEntry);
|
||||
}
|
||||
|
||||
private void Call3dMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
if (PBEntry.Method < 0xe00)
|
||||
{
|
||||
Gpu.Engine3d.CallMethod(Vmm, PBEntry);
|
||||
}
|
||||
else
|
||||
{
|
||||
int MacroIndex = (PBEntry.Method >> 1) & MacroIndexMask;
|
||||
|
||||
if ((PBEntry.Method & 1) != 0)
|
||||
{
|
||||
foreach (int Arg in PBEntry.Arguments)
|
||||
{
|
||||
Macros[MacroIndex].PushParam(Arg);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Macros[MacroIndex].Execute(Vmm, Mme, PBEntry.Arguments[0]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void CallDmaMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
|
||||
{
|
||||
Gpu.EngineDma.CallMethod(Vmm, PBEntry);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
enum NvGpuFifoMeth
|
||||
{
|
||||
BindChannel = 0,
|
||||
SetMacroUploadAddress = 0x45,
|
||||
SendMacroCodeData = 0x46,
|
||||
SetMacroBindingIndex = 0x47,
|
||||
BindMacro = 0x48
|
||||
}
|
||||
}
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
using Ryujinx.HLE.Gpu.Memory;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Engines
|
||||
{
|
||||
delegate void NvGpuMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry);
|
||||
}
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Memory
|
||||
{
|
||||
enum NvGpuBufferType
|
||||
{
|
||||
Index,
|
||||
Vertex,
|
||||
Texture,
|
||||
ConstBuffer,
|
||||
Count
|
||||
}
|
||||
}
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
using System;
|
||||
using System.Collections.ObjectModel;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Memory
|
||||
{
|
||||
struct NvGpuPBEntry
|
||||
{
|
||||
public int Method { get; private set; }
|
||||
|
||||
public int SubChannel { get; private set; }
|
||||
|
||||
private int[] m_Arguments;
|
||||
|
||||
public ReadOnlyCollection<int> Arguments => Array.AsReadOnly(m_Arguments);
|
||||
|
||||
public NvGpuPBEntry(int Method, int SubChannel, params int[] Arguments)
|
||||
{
|
||||
this.Method = Method;
|
||||
this.SubChannel = SubChannel;
|
||||
this.m_Arguments = Arguments;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,101 +0,0 @@
|
|||
using System.Collections.Generic;
|
||||
using System.IO;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Memory
|
||||
{
|
||||
static class NvGpuPushBuffer
|
||||
{
|
||||
private enum SubmissionMode
|
||||
{
|
||||
Incrementing = 1,
|
||||
NonIncrementing = 3,
|
||||
Immediate = 4,
|
||||
IncrementOnce = 5
|
||||
}
|
||||
|
||||
public static NvGpuPBEntry[] Decode(byte[] Data)
|
||||
{
|
||||
using (MemoryStream MS = new MemoryStream(Data))
|
||||
{
|
||||
BinaryReader Reader = new BinaryReader(MS);
|
||||
|
||||
List<NvGpuPBEntry> PushBuffer = new List<NvGpuPBEntry>();
|
||||
|
||||
bool CanRead() => MS.Position + 4 <= MS.Length;
|
||||
|
||||
while (CanRead())
|
||||
{
|
||||
int Packed = Reader.ReadInt32();
|
||||
|
||||
int Meth = (Packed >> 0) & 0x1fff;
|
||||
int SubC = (Packed >> 13) & 7;
|
||||
int Args = (Packed >> 16) & 0x1fff;
|
||||
int Mode = (Packed >> 29) & 7;
|
||||
|
||||
switch ((SubmissionMode)Mode)
|
||||
{
|
||||
case SubmissionMode.Incrementing:
|
||||
{
|
||||
for (int Index = 0; Index < Args && CanRead(); Index++, Meth++)
|
||||
{
|
||||
PushBuffer.Add(new NvGpuPBEntry(Meth, SubC, Reader.ReadInt32()));
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case SubmissionMode.NonIncrementing:
|
||||
{
|
||||
int[] Arguments = new int[Args];
|
||||
|
||||
for (int Index = 0; Index < Arguments.Length; Index++)
|
||||
{
|
||||
if (!CanRead())
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
Arguments[Index] = Reader.ReadInt32();
|
||||
}
|
||||
|
||||
PushBuffer.Add(new NvGpuPBEntry(Meth, SubC, Arguments));
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case SubmissionMode.Immediate:
|
||||
{
|
||||
PushBuffer.Add(new NvGpuPBEntry(Meth, SubC, Args));
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case SubmissionMode.IncrementOnce:
|
||||
{
|
||||
if (CanRead())
|
||||
{
|
||||
PushBuffer.Add(new NvGpuPBEntry(Meth, SubC, Reader.ReadInt32()));
|
||||
}
|
||||
|
||||
if (CanRead() && Args > 1)
|
||||
{
|
||||
int[] Arguments = new int[Args - 1];
|
||||
|
||||
for (int Index = 0; Index < Arguments.Length && CanRead(); Index++)
|
||||
{
|
||||
Arguments[Index] = Reader.ReadInt32();
|
||||
}
|
||||
|
||||
PushBuffer.Add(new NvGpuPBEntry(Meth + 1, SubC, Arguments));
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return PushBuffer.ToArray();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,377 +0,0 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.Graphics.Gal;
|
||||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Memory
|
||||
{
|
||||
class NvGpuVmm : IAMemory, IGalMemory
|
||||
{
|
||||
public const long AddrSize = 1L << 40;
|
||||
|
||||
private const int PTLvl0Bits = 14;
|
||||
private const int PTLvl1Bits = 14;
|
||||
private const int PTPageBits = 12;
|
||||
|
||||
private const int PTLvl0Size = 1 << PTLvl0Bits;
|
||||
private const int PTLvl1Size = 1 << PTLvl1Bits;
|
||||
public const int PageSize = 1 << PTPageBits;
|
||||
|
||||
private const int PTLvl0Mask = PTLvl0Size - 1;
|
||||
private const int PTLvl1Mask = PTLvl1Size - 1;
|
||||
public const int PageMask = PageSize - 1;
|
||||
|
||||
private const int PTLvl0Bit = PTPageBits + PTLvl1Bits;
|
||||
private const int PTLvl1Bit = PTPageBits;
|
||||
|
||||
public AMemory Memory { get; private set; }
|
||||
|
||||
private NvGpuVmmCache Cache;
|
||||
|
||||
private const long PteUnmapped = -1;
|
||||
private const long PteReserved = -2;
|
||||
|
||||
private long[][] PageTable;
|
||||
|
||||
public NvGpuVmm(AMemory Memory)
|
||||
{
|
||||
this.Memory = Memory;
|
||||
|
||||
Cache = new NvGpuVmmCache();
|
||||
|
||||
PageTable = new long[PTLvl0Size][];
|
||||
}
|
||||
|
||||
public long Map(long PA, long VA, long Size)
|
||||
{
|
||||
lock (PageTable)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
SetPte(VA + Offset, PA + Offset);
|
||||
}
|
||||
}
|
||||
|
||||
return VA;
|
||||
}
|
||||
|
||||
public long Map(long PA, long Size)
|
||||
{
|
||||
lock (PageTable)
|
||||
{
|
||||
long VA = GetFreePosition(Size);
|
||||
|
||||
if (VA != -1)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
SetPte(VA + Offset, PA + Offset);
|
||||
}
|
||||
}
|
||||
|
||||
return VA;
|
||||
}
|
||||
}
|
||||
|
||||
public long ReserveFixed(long VA, long Size)
|
||||
{
|
||||
lock (PageTable)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
if (IsPageInUse(VA + Offset))
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
SetPte(VA + Offset, PteReserved);
|
||||
}
|
||||
}
|
||||
|
||||
return VA;
|
||||
}
|
||||
|
||||
public long Reserve(long Size, long Align)
|
||||
{
|
||||
lock (PageTable)
|
||||
{
|
||||
long Position = GetFreePosition(Size, Align);
|
||||
|
||||
if (Position != -1)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
SetPte(Position + Offset, PteReserved);
|
||||
}
|
||||
}
|
||||
|
||||
return Position;
|
||||
}
|
||||
}
|
||||
|
||||
public void Free(long VA, long Size)
|
||||
{
|
||||
lock (PageTable)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
SetPte(VA + Offset, PteUnmapped);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private long GetFreePosition(long Size, long Align = 1)
|
||||
{
|
||||
//Note: Address 0 is not considered valid by the driver,
|
||||
//when 0 is returned it's considered a mapping error.
|
||||
long Position = PageSize;
|
||||
long FreeSize = 0;
|
||||
|
||||
if (Align < 1)
|
||||
{
|
||||
Align = 1;
|
||||
}
|
||||
|
||||
Align = (Align + PageMask) & ~PageMask;
|
||||
|
||||
while (Position + FreeSize < AddrSize)
|
||||
{
|
||||
if (!IsPageInUse(Position + FreeSize))
|
||||
{
|
||||
FreeSize += PageSize;
|
||||
|
||||
if (FreeSize >= Size)
|
||||
{
|
||||
return Position;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Position += FreeSize + PageSize;
|
||||
FreeSize = 0;
|
||||
|
||||
long Remainder = Position % Align;
|
||||
|
||||
if (Remainder != 0)
|
||||
{
|
||||
Position = (Position - Remainder) + Align;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
public long GetPhysicalAddress(long VA)
|
||||
{
|
||||
long BasePos = GetPte(VA);
|
||||
|
||||
if (BasePos < 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return BasePos + (VA & PageMask);
|
||||
}
|
||||
|
||||
public bool IsRegionFree(long VA, long Size)
|
||||
{
|
||||
for (long Offset = 0; Offset < Size; Offset += PageSize)
|
||||
{
|
||||
if (IsPageInUse(VA + Offset))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
private bool IsPageInUse(long VA)
|
||||
{
|
||||
if (VA >> PTLvl0Bits + PTLvl1Bits + PTPageBits != 0)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
long L0 = (VA >> PTLvl0Bit) & PTLvl0Mask;
|
||||
long L1 = (VA >> PTLvl1Bit) & PTLvl1Mask;
|
||||
|
||||
if (PageTable[L0] == null)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
return PageTable[L0][L1] != PteUnmapped;
|
||||
}
|
||||
|
||||
private long GetPte(long Position)
|
||||
{
|
||||
long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
|
||||
long L1 = (Position >> PTLvl1Bit) & PTLvl1Mask;
|
||||
|
||||
if (PageTable[L0] == null)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
return PageTable[L0][L1];
|
||||
}
|
||||
|
||||
private void SetPte(long Position, long TgtAddr)
|
||||
{
|
||||
long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
|
||||
long L1 = (Position >> PTLvl1Bit) & PTLvl1Mask;
|
||||
|
||||
if (PageTable[L0] == null)
|
||||
{
|
||||
PageTable[L0] = new long[PTLvl1Size];
|
||||
|
||||
for (int Index = 0; Index < PTLvl1Size; Index++)
|
||||
{
|
||||
PageTable[L0][Index] = PteUnmapped;
|
||||
}
|
||||
}
|
||||
|
||||
PageTable[L0][L1] = TgtAddr;
|
||||
}
|
||||
|
||||
public bool IsRegionModified(long PA, long Size, NvGpuBufferType BufferType)
|
||||
{
|
||||
return Cache.IsRegionModified(Memory, BufferType, PA, Size);
|
||||
}
|
||||
|
||||
public IntPtr GetHostAddress(long Position, long Size)
|
||||
{
|
||||
return Memory.GetHostAddress(GetPhysicalAddress(Position), Size);
|
||||
}
|
||||
|
||||
public byte ReadByte(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadByte(Position);
|
||||
}
|
||||
|
||||
public ushort ReadUInt16(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadUInt16(Position);
|
||||
}
|
||||
|
||||
public uint ReadUInt32(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadUInt32(Position);
|
||||
}
|
||||
|
||||
public ulong ReadUInt64(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadUInt64(Position);
|
||||
}
|
||||
|
||||
public sbyte ReadSByte(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadSByte(Position);
|
||||
}
|
||||
|
||||
public short ReadInt16(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadInt16(Position);
|
||||
}
|
||||
|
||||
public int ReadInt32(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadInt32(Position);
|
||||
}
|
||||
|
||||
public long ReadInt64(long Position)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadInt64(Position);
|
||||
}
|
||||
|
||||
public byte[] ReadBytes(long Position, long Size)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
return Memory.ReadBytes(Position, Size);
|
||||
}
|
||||
|
||||
public void WriteByte(long Position, byte Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteByte(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteUInt16(long Position, ushort Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteUInt16(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteUInt32(long Position, uint Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteUInt32(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteUInt64(long Position, ulong Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteUInt64(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteSByte(long Position, sbyte Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteSByte(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteInt16(long Position, short Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteInt16(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteInt32(long Position, int Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteInt32(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteInt64(long Position, long Value)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteInt64(Position, Value);
|
||||
}
|
||||
|
||||
public void WriteBytes(long Position, byte[] Data)
|
||||
{
|
||||
Position = GetPhysicalAddress(Position);
|
||||
|
||||
Memory.WriteBytes(Position, Data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,308 +0,0 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.HLE.Memory;
|
||||
using System;
|
||||
using System.Collections.Generic;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Memory
|
||||
{
|
||||
class NvGpuVmmCache
|
||||
{
|
||||
private const int MaxCpCount = 10000;
|
||||
private const int MaxCpTimeDelta = 60000;
|
||||
|
||||
private class CachedPage
|
||||
{
|
||||
private struct Range
|
||||
{
|
||||
public long Start;
|
||||
public long End;
|
||||
|
||||
public Range(long Start, long End)
|
||||
{
|
||||
this.Start = Start;
|
||||
this.End = End;
|
||||
}
|
||||
}
|
||||
|
||||
private List<Range>[] Regions;
|
||||
|
||||
private HashSet<long> ResidencyKeys;
|
||||
|
||||
public LinkedListNode<long> Node { get; set; }
|
||||
|
||||
public int Timestamp { get; private set; }
|
||||
|
||||
public CachedPage()
|
||||
{
|
||||
Regions = new List<Range>[(int)NvGpuBufferType.Count];
|
||||
|
||||
for (int Index = 0; Index < Regions.Length; Index++)
|
||||
{
|
||||
Regions[Index] = new List<Range>();
|
||||
}
|
||||
|
||||
ResidencyKeys = new HashSet<long>();
|
||||
}
|
||||
|
||||
public void AddResidency(long Key)
|
||||
{
|
||||
ResidencyKeys.Add(Key);
|
||||
}
|
||||
|
||||
public void RemoveResidency(HashSet<long>[] Residency, long PageSize)
|
||||
{
|
||||
for (int i = 0; i < (int)NvGpuBufferType.Count; i++)
|
||||
{
|
||||
foreach (Range Region in Regions[i])
|
||||
{
|
||||
foreach (long Key in ResidencyKeys)
|
||||
{
|
||||
Residency[Region.Start / PageSize].Remove(Key);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public bool AddRange(long Start, long End, NvGpuBufferType BufferType)
|
||||
{
|
||||
List<Range> BtRegions = Regions[(int)BufferType];
|
||||
|
||||
for (int Index = 0; Index < BtRegions.Count; Index++)
|
||||
{
|
||||
Range Rg = BtRegions[Index];
|
||||
|
||||
if (Start >= Rg.Start && End <= Rg.End)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
if (Start <= Rg.End && Rg.Start <= End)
|
||||
{
|
||||
long MinStart = Math.Min(Rg.Start, Start);
|
||||
long MaxEnd = Math.Max(Rg.End, End);
|
||||
|
||||
BtRegions[Index] = new Range(MinStart, MaxEnd);
|
||||
|
||||
Timestamp = Environment.TickCount;
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
BtRegions.Add(new Range(Start, End));
|
||||
|
||||
Timestamp = Environment.TickCount;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
public int GetTotalCount()
|
||||
{
|
||||
int Count = 0;
|
||||
|
||||
for (int Index = 0; Index < Regions.Length; Index++)
|
||||
{
|
||||
Count += Regions[Index].Count;
|
||||
}
|
||||
|
||||
return Count;
|
||||
}
|
||||
}
|
||||
|
||||
private Dictionary<long, CachedPage> Cache;
|
||||
|
||||
private LinkedList<long> SortedCache;
|
||||
|
||||
private HashSet<long>[] Residency;
|
||||
|
||||
private long ResidencyPageSize;
|
||||
|
||||
private int CpCount;
|
||||
|
||||
public NvGpuVmmCache()
|
||||
{
|
||||
Cache = new Dictionary<long, CachedPage>();
|
||||
|
||||
SortedCache = new LinkedList<long>();
|
||||
}
|
||||
|
||||
public bool IsRegionModified(AMemory Memory, NvGpuBufferType BufferType, long PA, long Size)
|
||||
{
|
||||
(bool[] Modified, long ModifiedCount) = Memory.IsRegionModified(PA, Size);
|
||||
|
||||
PA = Memory.GetPhysicalAddress(PA);
|
||||
|
||||
ClearCachedPagesIfNeeded();
|
||||
|
||||
long PageSize = AMemory.PageSize;
|
||||
|
||||
EnsureResidencyInitialized(PageSize);
|
||||
|
||||
bool HasResidents = AddResidency(PA, Size);
|
||||
|
||||
if (!HasResidents && ModifiedCount == 0)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
long Mask = PageSize - 1;
|
||||
|
||||
long ResidencyKey = PA;
|
||||
|
||||
long PAEnd = PA + Size;
|
||||
|
||||
bool RegMod = false;
|
||||
|
||||
int Index = 0;
|
||||
|
||||
while (PA < PAEnd)
|
||||
{
|
||||
long Key = PA & ~AMemory.PageMask;
|
||||
|
||||
long PAPgEnd = Math.Min((PA + AMemory.PageSize) & ~AMemory.PageMask, PAEnd);
|
||||
|
||||
bool IsCached = Cache.TryGetValue(Key, out CachedPage Cp);
|
||||
|
||||
if (IsCached)
|
||||
{
|
||||
CpCount -= Cp.GetTotalCount();
|
||||
|
||||
SortedCache.Remove(Cp.Node);
|
||||
}
|
||||
else
|
||||
{
|
||||
Cp = new CachedPage();
|
||||
|
||||
Cache.Add(Key, Cp);
|
||||
}
|
||||
|
||||
if (Modified[Index++] && IsCached)
|
||||
{
|
||||
Cp = new CachedPage();
|
||||
|
||||
Cache[Key] = Cp;
|
||||
}
|
||||
|
||||
Cp.AddResidency(ResidencyKey);
|
||||
|
||||
Cp.Node = SortedCache.AddLast(Key);
|
||||
|
||||
RegMod |= Cp.AddRange(PA, PAPgEnd, BufferType);
|
||||
|
||||
CpCount += Cp.GetTotalCount();
|
||||
|
||||
PA = PAPgEnd;
|
||||
}
|
||||
|
||||
return RegMod;
|
||||
}
|
||||
|
||||
private bool AddResidency(long PA, long Size)
|
||||
{
|
||||
long PageSize = ResidencyPageSize;
|
||||
|
||||
long Mask = PageSize - 1;
|
||||
|
||||
long Key = PA;
|
||||
|
||||
bool ResidentFound = false;
|
||||
|
||||
for (long Cursor = PA & ~Mask; Cursor < ((PA + Size + PageSize - 1) & ~Mask); Cursor += PageSize)
|
||||
{
|
||||
long PageIndex = Cursor / PageSize;
|
||||
|
||||
Residency[PageIndex].Add(Key);
|
||||
|
||||
if (Residency[PageIndex].Count > 1)
|
||||
{
|
||||
ResidentFound = true;
|
||||
}
|
||||
}
|
||||
|
||||
return ResidentFound;
|
||||
}
|
||||
|
||||
private void EnsureResidencyInitialized(long PageSize)
|
||||
{
|
||||
if (Residency == null)
|
||||
{
|
||||
Residency = new HashSet<long>[DeviceMemory.RamSize / PageSize];
|
||||
|
||||
for (int i = 0; i < Residency.Length; i++)
|
||||
{
|
||||
Residency[i] = new HashSet<long>();
|
||||
}
|
||||
|
||||
ResidencyPageSize = PageSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ResidencyPageSize != PageSize)
|
||||
{
|
||||
throw new InvalidOperationException("Tried to change residency page size");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
private void ClearCachedPagesIfNeeded()
|
||||
{
|
||||
if (CpCount <= MaxCpCount)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
int Timestamp = Environment.TickCount;
|
||||
|
||||
int TimeDelta;
|
||||
|
||||
do
|
||||
{
|
||||
if (!TryPopOldestCachedPageKey(Timestamp, out long Key))
|
||||
{
|
||||
break;
|
||||
}
|
||||
|
||||
CachedPage Cp = Cache[Key];
|
||||
|
||||
Cp.RemoveResidency(Residency, ResidencyPageSize);
|
||||
|
||||
Cache.Remove(Key);
|
||||
|
||||
CpCount -= Cp.GetTotalCount();
|
||||
|
||||
TimeDelta = RingDelta(Cp.Timestamp, Timestamp);
|
||||
}
|
||||
while (CpCount > (MaxCpCount >> 1) || (uint)TimeDelta > (uint)MaxCpTimeDelta);
|
||||
}
|
||||
|
||||
private bool TryPopOldestCachedPageKey(int Timestamp, out long Key)
|
||||
{
|
||||
LinkedListNode<long> Node = SortedCache.First;
|
||||
|
||||
if (Node == null)
|
||||
{
|
||||
Key = 0;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
SortedCache.Remove(Node);
|
||||
|
||||
Key = Node.Value;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
private int RingDelta(int Old, int New)
|
||||
{
|
||||
if ((uint)New < (uint)Old)
|
||||
{
|
||||
return New + (~Old + 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
return New - Old;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu.Engines;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu
|
||||
{
|
||||
class NvGpu
|
||||
{
|
||||
public IGalRenderer Renderer { get; private set; }
|
||||
|
||||
public NvGpuFifo Fifo { get; private set; }
|
||||
|
||||
public NvGpuEngine2d Engine2d { get; private set; }
|
||||
public NvGpuEngine3d Engine3d { get; private set; }
|
||||
public NvGpuEngineDma EngineDma { get; private set; }
|
||||
|
||||
public NvGpu(IGalRenderer Renderer)
|
||||
{
|
||||
this.Renderer = Renderer;
|
||||
|
||||
Fifo = new NvGpuFifo(this);
|
||||
|
||||
Engine2d = new NvGpuEngine2d(this);
|
||||
Engine3d = new NvGpuEngine3d(this);
|
||||
EngineDma = new NvGpuEngineDma(this);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
class BlockLinearSwizzle : ISwizzle
|
||||
{
|
||||
private int BhShift;
|
||||
private int BppShift;
|
||||
private int BhMask;
|
||||
|
||||
private int XShift;
|
||||
private int GobStride;
|
||||
|
||||
public BlockLinearSwizzle(int Width, int Bpp, int BlockHeight = 16)
|
||||
{
|
||||
BhMask = (BlockHeight * 8) - 1;
|
||||
|
||||
BhShift = CountLsbZeros(BlockHeight * 8);
|
||||
BppShift = CountLsbZeros(Bpp);
|
||||
|
||||
int WidthInGobs = (int)MathF.Ceiling(Width * Bpp / 64f);
|
||||
|
||||
GobStride = 512 * BlockHeight * WidthInGobs;
|
||||
|
||||
XShift = CountLsbZeros(512 * BlockHeight);
|
||||
}
|
||||
|
||||
private int CountLsbZeros(int Value)
|
||||
{
|
||||
int Count = 0;
|
||||
|
||||
while (((Value >> Count) & 1) == 0)
|
||||
{
|
||||
Count++;
|
||||
}
|
||||
|
||||
return Count;
|
||||
}
|
||||
|
||||
public int GetSwizzleOffset(int X, int Y)
|
||||
{
|
||||
X <<= BppShift;
|
||||
|
||||
int Position = (Y >> BhShift) * GobStride;
|
||||
|
||||
Position += (X >> 6) << XShift;
|
||||
|
||||
Position += ((Y & BhMask) >> 3) << 9;
|
||||
|
||||
Position += ((X & 0x3f) >> 5) << 8;
|
||||
Position += ((Y & 0x07) >> 1) << 6;
|
||||
Position += ((X & 0x1f) >> 4) << 5;
|
||||
Position += ((Y & 0x01) >> 0) << 4;
|
||||
Position += ((X & 0x0f) >> 0) << 0;
|
||||
|
||||
return Position;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
interface ISwizzle
|
||||
{
|
||||
int GetSwizzleOffset(int X, int Y);
|
||||
}
|
||||
}
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
class LinearSwizzle : ISwizzle
|
||||
{
|
||||
private int Pitch;
|
||||
private int Bpp;
|
||||
|
||||
public LinearSwizzle(int Pitch, int Bpp)
|
||||
{
|
||||
this.Pitch = Pitch;
|
||||
this.Bpp = Bpp;
|
||||
}
|
||||
|
||||
public int GetSwizzleOffset(int X, int Y)
|
||||
{
|
||||
return X * Bpp + Y * Pitch;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
static class TextureFactory
|
||||
{
|
||||
public static GalImage MakeTexture(NvGpuVmm Vmm, long TicPosition)
|
||||
{
|
||||
int[] Tic = ReadWords(Vmm, TicPosition, 8);
|
||||
|
||||
GalTextureType RType = (GalTextureType)((Tic[0] >> 7) & 7);
|
||||
GalTextureType GType = (GalTextureType)((Tic[0] >> 10) & 7);
|
||||
GalTextureType BType = (GalTextureType)((Tic[0] >> 13) & 7);
|
||||
GalTextureType AType = (GalTextureType)((Tic[0] >> 16) & 7);
|
||||
|
||||
GalImageFormat Format = ImageFormatConverter.ConvertTexture((GalTextureFormat)(Tic[0] & 0x7f), RType, GType, BType, AType);
|
||||
|
||||
GalTextureSource XSource = (GalTextureSource)((Tic[0] >> 19) & 7);
|
||||
GalTextureSource YSource = (GalTextureSource)((Tic[0] >> 22) & 7);
|
||||
GalTextureSource ZSource = (GalTextureSource)((Tic[0] >> 25) & 7);
|
||||
GalTextureSource WSource = (GalTextureSource)((Tic[0] >> 28) & 7);
|
||||
|
||||
int Width = (Tic[4] & 0xffff) + 1;
|
||||
int Height = (Tic[5] & 0xffff) + 1;
|
||||
|
||||
return new GalImage(
|
||||
Width,
|
||||
Height,
|
||||
Format,
|
||||
XSource,
|
||||
YSource,
|
||||
ZSource,
|
||||
WSource);
|
||||
}
|
||||
|
||||
public static byte[] GetTextureData(NvGpuVmm Vmm, long TicPosition)
|
||||
{
|
||||
int[] Tic = ReadWords(Vmm, TicPosition, 8);
|
||||
|
||||
GalTextureFormat Format = (GalTextureFormat)(Tic[0] & 0x7f);
|
||||
|
||||
long TextureAddress = (uint)Tic[1];
|
||||
|
||||
TextureAddress |= (long)((ushort)Tic[2]) << 32;
|
||||
|
||||
TextureSwizzle Swizzle = (TextureSwizzle)((Tic[2] >> 21) & 7);
|
||||
|
||||
if (Swizzle == TextureSwizzle.BlockLinear ||
|
||||
Swizzle == TextureSwizzle.BlockLinearColorKey)
|
||||
{
|
||||
TextureAddress &= ~0x1ffL;
|
||||
}
|
||||
else if (Swizzle == TextureSwizzle.Pitch ||
|
||||
Swizzle == TextureSwizzle.PitchColorKey)
|
||||
{
|
||||
TextureAddress &= ~0x1fL;
|
||||
}
|
||||
|
||||
int Pitch = (Tic[3] & 0xffff) << 5;
|
||||
|
||||
int BlockHeightLog2 = (Tic[3] >> 3) & 7;
|
||||
int TileWidthLog2 = (Tic[3] >> 10) & 7;
|
||||
|
||||
int BlockHeight = 1 << BlockHeightLog2;
|
||||
int TileWidth = 1 << TileWidthLog2;
|
||||
|
||||
int Width = (Tic[4] & 0xffff) + 1;
|
||||
int Height = (Tic[5] & 0xffff) + 1;
|
||||
|
||||
TextureInfo Texture = new TextureInfo(
|
||||
TextureAddress,
|
||||
Width,
|
||||
Height,
|
||||
Pitch,
|
||||
BlockHeight,
|
||||
TileWidth,
|
||||
Swizzle,
|
||||
Format);
|
||||
|
||||
return TextureReader.Read(Vmm, Texture);
|
||||
}
|
||||
|
||||
public static GalTextureSampler MakeSampler(NvGpu Gpu, NvGpuVmm Vmm, long TscPosition)
|
||||
{
|
||||
int[] Tsc = ReadWords(Vmm, TscPosition, 8);
|
||||
|
||||
GalTextureWrap AddressU = (GalTextureWrap)((Tsc[0] >> 0) & 7);
|
||||
GalTextureWrap AddressV = (GalTextureWrap)((Tsc[0] >> 3) & 7);
|
||||
GalTextureWrap AddressP = (GalTextureWrap)((Tsc[0] >> 6) & 7);
|
||||
|
||||
GalTextureFilter MagFilter = (GalTextureFilter) ((Tsc[1] >> 0) & 3);
|
||||
GalTextureFilter MinFilter = (GalTextureFilter) ((Tsc[1] >> 4) & 3);
|
||||
GalTextureMipFilter MipFilter = (GalTextureMipFilter)((Tsc[1] >> 6) & 3);
|
||||
|
||||
GalColorF BorderColor = new GalColorF(
|
||||
BitConverter.Int32BitsToSingle(Tsc[4]),
|
||||
BitConverter.Int32BitsToSingle(Tsc[5]),
|
||||
BitConverter.Int32BitsToSingle(Tsc[6]),
|
||||
BitConverter.Int32BitsToSingle(Tsc[7]));
|
||||
|
||||
return new GalTextureSampler(
|
||||
AddressU,
|
||||
AddressV,
|
||||
AddressP,
|
||||
MinFilter,
|
||||
MagFilter,
|
||||
MipFilter,
|
||||
BorderColor);
|
||||
}
|
||||
|
||||
private static int[] ReadWords(NvGpuVmm Vmm, long Position, int Count)
|
||||
{
|
||||
int[] Words = new int[Count];
|
||||
|
||||
for (int Index = 0; Index < Count; Index++, Position += 4)
|
||||
{
|
||||
Words[Index] = Vmm.ReadInt32(Position);
|
||||
}
|
||||
|
||||
return Words;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,204 +0,0 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
static class TextureHelper
|
||||
{
|
||||
public static ISwizzle GetSwizzle(TextureInfo Texture, int BlockWidth, int Bpp)
|
||||
{
|
||||
int Width = (Texture.Width + (BlockWidth - 1)) / BlockWidth;
|
||||
|
||||
int AlignMask = Texture.TileWidth * (64 / Bpp) - 1;
|
||||
|
||||
Width = (Width + AlignMask) & ~AlignMask;
|
||||
|
||||
switch (Texture.Swizzle)
|
||||
{
|
||||
case TextureSwizzle._1dBuffer:
|
||||
case TextureSwizzle.Pitch:
|
||||
case TextureSwizzle.PitchColorKey:
|
||||
return new LinearSwizzle(Texture.Pitch, Bpp);
|
||||
|
||||
case TextureSwizzle.BlockLinear:
|
||||
case TextureSwizzle.BlockLinearColorKey:
|
||||
return new BlockLinearSwizzle(Width, Bpp, Texture.BlockHeight);
|
||||
}
|
||||
|
||||
throw new NotImplementedException(Texture.Swizzle.ToString());
|
||||
}
|
||||
|
||||
public static int GetTextureSize(GalImage Image)
|
||||
{
|
||||
switch (Image.Format)
|
||||
{
|
||||
case GalImageFormat.R32G32B32A32_SFLOAT:
|
||||
case GalImageFormat.R32G32B32A32_SINT:
|
||||
case GalImageFormat.R32G32B32A32_UINT:
|
||||
return Image.Width * Image.Height * 16;
|
||||
|
||||
case GalImageFormat.R16G16B16A16_SFLOAT:
|
||||
case GalImageFormat.R16G16B16A16_SINT:
|
||||
case GalImageFormat.R16G16B16A16_SNORM:
|
||||
case GalImageFormat.R16G16B16A16_UINT:
|
||||
case GalImageFormat.R16G16B16A16_UNORM:
|
||||
case GalImageFormat.D32_SFLOAT_S8_UINT:
|
||||
case GalImageFormat.R32G32_SFLOAT:
|
||||
case GalImageFormat.R32G32_SINT:
|
||||
case GalImageFormat.R32G32_UINT:
|
||||
return Image.Width * Image.Height * 8;
|
||||
|
||||
case GalImageFormat.A8B8G8R8_SINT_PACK32:
|
||||
case GalImageFormat.A8B8G8R8_SNORM_PACK32:
|
||||
case GalImageFormat.A8B8G8R8_UINT_PACK32:
|
||||
case GalImageFormat.A8B8G8R8_UNORM_PACK32:
|
||||
case GalImageFormat.A8B8G8R8_SRGB_PACK32:
|
||||
case GalImageFormat.A2B10G10R10_SINT_PACK32:
|
||||
case GalImageFormat.A2B10G10R10_SNORM_PACK32:
|
||||
case GalImageFormat.A2B10G10R10_UINT_PACK32:
|
||||
case GalImageFormat.A2B10G10R10_UNORM_PACK32:
|
||||
case GalImageFormat.R16G16_SFLOAT:
|
||||
case GalImageFormat.R16G16_SINT:
|
||||
case GalImageFormat.R16G16_SNORM:
|
||||
case GalImageFormat.R16G16_UINT:
|
||||
case GalImageFormat.R16G16_UNORM:
|
||||
case GalImageFormat.R32_SFLOAT:
|
||||
case GalImageFormat.R32_SINT:
|
||||
case GalImageFormat.R32_UINT:
|
||||
case GalImageFormat.D32_SFLOAT:
|
||||
case GalImageFormat.B10G11R11_UFLOAT_PACK32:
|
||||
case GalImageFormat.D24_UNORM_S8_UINT:
|
||||
return Image.Width * Image.Height * 4;
|
||||
|
||||
case GalImageFormat.B4G4R4A4_UNORM_PACK16:
|
||||
case GalImageFormat.A1R5G5B5_UNORM_PACK16:
|
||||
case GalImageFormat.B5G6R5_UNORM_PACK16:
|
||||
case GalImageFormat.R8G8_SINT:
|
||||
case GalImageFormat.R8G8_SNORM:
|
||||
case GalImageFormat.R8G8_UINT:
|
||||
case GalImageFormat.R8G8_UNORM:
|
||||
case GalImageFormat.R16_SFLOAT:
|
||||
case GalImageFormat.R16_SINT:
|
||||
case GalImageFormat.R16_SNORM:
|
||||
case GalImageFormat.R16_UINT:
|
||||
case GalImageFormat.R16_UNORM:
|
||||
case GalImageFormat.D16_UNORM:
|
||||
return Image.Width * Image.Height * 2;
|
||||
|
||||
case GalImageFormat.R8_SINT:
|
||||
case GalImageFormat.R8_SNORM:
|
||||
case GalImageFormat.R8_UINT:
|
||||
case GalImageFormat.R8_UNORM:
|
||||
return Image.Width * Image.Height;
|
||||
|
||||
case GalImageFormat.BC1_RGBA_UNORM_BLOCK:
|
||||
case GalImageFormat.BC4_SNORM_BLOCK:
|
||||
case GalImageFormat.BC4_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 4, 4, 8);
|
||||
}
|
||||
|
||||
case GalImageFormat.BC6H_SFLOAT_BLOCK:
|
||||
case GalImageFormat.BC6H_UFLOAT_BLOCK:
|
||||
case GalImageFormat.BC7_UNORM_BLOCK:
|
||||
case GalImageFormat.BC2_UNORM_BLOCK:
|
||||
case GalImageFormat.BC3_UNORM_BLOCK:
|
||||
case GalImageFormat.BC5_SNORM_BLOCK:
|
||||
case GalImageFormat.BC5_UNORM_BLOCK:
|
||||
case GalImageFormat.ASTC_4x4_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 4, 4, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_5x5_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 5, 5, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_6x6_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 6, 6, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_8x8_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 8, 8, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_10x10_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 10, 10, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_12x12_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 12, 12, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_5x4_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 5, 4, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_6x5_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 6, 5, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_8x6_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 8, 6, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_10x8_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 10, 8, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_12x10_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 12, 10, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_8x5_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 8, 5, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_10x5_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 10, 5, 16);
|
||||
}
|
||||
|
||||
case GalImageFormat.ASTC_10x6_UNORM_BLOCK:
|
||||
{
|
||||
return CompressedTextureSize(Image.Width, Image.Height, 10, 6, 16);
|
||||
}
|
||||
}
|
||||
|
||||
throw new NotImplementedException(Image.Format.ToString());
|
||||
}
|
||||
|
||||
public static int CompressedTextureSize(int TextureWidth, int TextureHeight, int BlockWidth, int BlockHeight, int Bpb)
|
||||
{
|
||||
int W = (TextureWidth + (BlockWidth - 1)) / BlockWidth;
|
||||
int H = (TextureHeight + (BlockHeight - 1)) / BlockHeight;
|
||||
|
||||
return W * H * Bpb;
|
||||
}
|
||||
|
||||
public static (AMemory Memory, long Position) GetMemoryAndPosition(
|
||||
IAMemory Memory,
|
||||
long Position)
|
||||
{
|
||||
if (Memory is NvGpuVmm Vmm)
|
||||
{
|
||||
return (Vmm.Memory, Vmm.GetPhysicalAddress(Position));
|
||||
}
|
||||
|
||||
return ((AMemory)Memory, Position);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,60 +0,0 @@
|
|||
using Ryujinx.Graphics.Gal;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
struct TextureInfo
|
||||
{
|
||||
public long Position { get; private set; }
|
||||
|
||||
public int Width { get; private set; }
|
||||
public int Height { get; private set; }
|
||||
public int Pitch { get; private set; }
|
||||
|
||||
public int BlockHeight { get; private set; }
|
||||
public int TileWidth { get; private set; }
|
||||
|
||||
public TextureSwizzle Swizzle { get; private set; }
|
||||
|
||||
public GalTextureFormat Format { get; private set; }
|
||||
|
||||
public TextureInfo(
|
||||
long Position,
|
||||
int Width,
|
||||
int Height)
|
||||
{
|
||||
this.Position = Position;
|
||||
this.Width = Width;
|
||||
this.Height = Height;
|
||||
|
||||
Pitch = 0;
|
||||
|
||||
BlockHeight = 16;
|
||||
|
||||
TileWidth = 1;
|
||||
|
||||
Swizzle = TextureSwizzle.BlockLinear;
|
||||
|
||||
Format = GalTextureFormat.A8B8G8R8;
|
||||
}
|
||||
|
||||
public TextureInfo(
|
||||
long Position,
|
||||
int Width,
|
||||
int Height,
|
||||
int Pitch,
|
||||
int BlockHeight,
|
||||
int TileWidth,
|
||||
TextureSwizzle Swizzle,
|
||||
GalTextureFormat Format)
|
||||
{
|
||||
this.Position = Position;
|
||||
this.Width = Width;
|
||||
this.Height = Height;
|
||||
this.Pitch = Pitch;
|
||||
this.BlockHeight = BlockHeight;
|
||||
this.TileWidth = TileWidth;
|
||||
this.Swizzle = Swizzle;
|
||||
this.Format = Format;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,366 +0,0 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.Graphics.Gal;
|
||||
using System;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
static class TextureReader
|
||||
{
|
||||
public static byte[] Read(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
switch (Texture.Format)
|
||||
{
|
||||
case GalTextureFormat.R32G32B32A32: return Read16Bpp (Memory, Texture);
|
||||
case GalTextureFormat.R16G16B16A16: return Read8Bpp (Memory, Texture);
|
||||
case GalTextureFormat.R32G32: return Read8Bpp (Memory, Texture);
|
||||
case GalTextureFormat.A8B8G8R8: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.A2B10G10R10: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.R32: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.BF10GF11RF11: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.Z24S8: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.A1B5G5R5: return Read5551 (Memory, Texture);
|
||||
case GalTextureFormat.B5G6R5: return Read565 (Memory, Texture);
|
||||
case GalTextureFormat.A4B4G4R4: return Read2Bpp (Memory, Texture);
|
||||
case GalTextureFormat.G8R8: return Read2Bpp (Memory, Texture);
|
||||
case GalTextureFormat.R16: return Read2Bpp (Memory, Texture);
|
||||
case GalTextureFormat.R8: return Read1Bpp (Memory, Texture);
|
||||
case GalTextureFormat.BC6H_SF16: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.BC6H_UF16: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.BC7U: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.BC1: return Read8Bpt4x4 (Memory, Texture);
|
||||
case GalTextureFormat.BC2: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.BC3: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.BC4: return Read8Bpt4x4 (Memory, Texture);
|
||||
case GalTextureFormat.BC5: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.ZF32: return Read4Bpp (Memory, Texture);
|
||||
case GalTextureFormat.ZF32_X24S8: return Read8Bpp (Memory, Texture);
|
||||
case GalTextureFormat.Astc2D4x4: return Read16BptCompressedTexture(Memory, Texture, 4, 4);
|
||||
case GalTextureFormat.Astc2D5x5: return Read16BptCompressedTexture(Memory, Texture, 5, 5);
|
||||
case GalTextureFormat.Astc2D6x6: return Read16BptCompressedTexture(Memory, Texture, 6, 6);
|
||||
case GalTextureFormat.Astc2D8x8: return Read16BptCompressedTexture(Memory, Texture, 8, 8);
|
||||
case GalTextureFormat.Astc2D10x10: return Read16BptCompressedTexture(Memory, Texture, 10, 10);
|
||||
case GalTextureFormat.Astc2D12x12: return Read16BptCompressedTexture(Memory, Texture, 12, 12);
|
||||
case GalTextureFormat.Astc2D5x4: return Read16BptCompressedTexture(Memory, Texture, 5, 4);
|
||||
case GalTextureFormat.Astc2D6x5: return Read16BptCompressedTexture(Memory, Texture, 6, 5);
|
||||
case GalTextureFormat.Astc2D8x6: return Read16BptCompressedTexture(Memory, Texture, 8, 6);
|
||||
case GalTextureFormat.Astc2D10x8: return Read16BptCompressedTexture(Memory, Texture, 10, 8);
|
||||
case GalTextureFormat.Astc2D12x10: return Read16BptCompressedTexture(Memory, Texture, 12, 10);
|
||||
case GalTextureFormat.Astc2D8x5: return Read16BptCompressedTexture(Memory, Texture, 8, 5);
|
||||
case GalTextureFormat.Astc2D10x5: return Read16BptCompressedTexture(Memory, Texture, 10, 5);
|
||||
case GalTextureFormat.Astc2D10x6: return Read16BptCompressedTexture(Memory, Texture, 10, 6);
|
||||
}
|
||||
|
||||
throw new NotImplementedException("0x" + ((int)Texture.Format).ToString("x2"));
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read1Bpp(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 1);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
byte Pixel = CpuMem.ReadByte(Position + Offset);
|
||||
|
||||
*(BuffPtr + OutOffs) = Pixel;
|
||||
|
||||
OutOffs++;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read5551(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 2];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 2);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
uint Pixel = (uint)CpuMem.ReadInt16(Position + Offset);
|
||||
|
||||
Pixel = (Pixel & 0x001f) << 11 |
|
||||
(Pixel & 0x03e0) << 1 |
|
||||
(Pixel & 0x7c00) >> 9 |
|
||||
(Pixel & 0x8000) >> 15;
|
||||
|
||||
*(short*)(BuffPtr + OutOffs) = (short)Pixel;
|
||||
|
||||
OutOffs += 2;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read565(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 2];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 2);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
uint Pixel = (uint)CpuMem.ReadInt16(Position + Offset);
|
||||
|
||||
Pixel = (Pixel & 0x001f) << 11 |
|
||||
(Pixel & 0x07e0) |
|
||||
(Pixel & 0xf800) >> 11;
|
||||
|
||||
*(short*)(BuffPtr + OutOffs) = (short)Pixel;
|
||||
|
||||
OutOffs += 2;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read2Bpp(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 2];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 2);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
short Pixel = CpuMem.ReadInt16(Position + Offset);
|
||||
|
||||
*(short*)(BuffPtr + OutOffs) = Pixel;
|
||||
|
||||
OutOffs += 2;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read4Bpp(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 4];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 4);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
int Pixel = CpuMem.ReadInt32(Position + Offset);
|
||||
|
||||
*(int*)(BuffPtr + OutOffs) = Pixel;
|
||||
|
||||
OutOffs += 4;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read8Bpp(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 8];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 8);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
long Pixel = CpuMem.ReadInt64(Position + Offset);
|
||||
|
||||
*(long*)(BuffPtr + OutOffs) = Pixel;
|
||||
|
||||
OutOffs += 8;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read16Bpp(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = Texture.Width;
|
||||
int Height = Texture.Height;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 16];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 16);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
long PxLow = CpuMem.ReadInt64(Position + Offset + 0);
|
||||
long PxHigh = CpuMem.ReadInt64(Position + Offset + 8);
|
||||
|
||||
*(long*)(BuffPtr + OutOffs + 0) = PxLow;
|
||||
*(long*)(BuffPtr + OutOffs + 8) = PxHigh;
|
||||
|
||||
OutOffs += 16;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read8Bpt4x4(IAMemory Memory, TextureInfo Texture)
|
||||
{
|
||||
int Width = (Texture.Width + 3) / 4;
|
||||
int Height = (Texture.Height + 3) / 4;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 8];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 4, 8);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
long Tile = CpuMem.ReadInt64(Position + Offset);
|
||||
|
||||
*(long*)(BuffPtr + OutOffs) = Tile;
|
||||
|
||||
OutOffs += 8;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
|
||||
private unsafe static byte[] Read16BptCompressedTexture(IAMemory Memory, TextureInfo Texture, int BlockWidth, int BlockHeight)
|
||||
{
|
||||
int Width = (Texture.Width + (BlockWidth - 1)) / BlockWidth;
|
||||
int Height = (Texture.Height + (BlockHeight - 1)) / BlockHeight;
|
||||
|
||||
byte[] Output = new byte[Width * Height * 16];
|
||||
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, BlockWidth, 16);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Output)
|
||||
{
|
||||
long OutOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Height; Y++)
|
||||
for (int X = 0; X < Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
long Tile0 = CpuMem.ReadInt64(Position + Offset + 0);
|
||||
long Tile1 = CpuMem.ReadInt64(Position + Offset + 8);
|
||||
|
||||
*(long*)(BuffPtr + OutOffs + 0) = Tile0;
|
||||
*(long*)(BuffPtr + OutOffs + 8) = Tile1;
|
||||
|
||||
OutOffs += 16;
|
||||
}
|
||||
}
|
||||
|
||||
return Output;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
enum TextureSwizzle
|
||||
{
|
||||
_1dBuffer = 0,
|
||||
PitchColorKey = 1,
|
||||
Pitch = 2,
|
||||
BlockLinear = 3,
|
||||
BlockLinearColorKey = 4
|
||||
}
|
||||
}
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
using ChocolArm64.Memory;
|
||||
|
||||
namespace Ryujinx.HLE.Gpu.Texture
|
||||
{
|
||||
static class TextureWriter
|
||||
{
|
||||
public unsafe static void Write(IAMemory Memory, TextureInfo Texture, byte[] Data)
|
||||
{
|
||||
ISwizzle Swizzle = TextureHelper.GetSwizzle(Texture, 1, 4);
|
||||
|
||||
(AMemory CpuMem, long Position) = TextureHelper.GetMemoryAndPosition(
|
||||
Memory,
|
||||
Texture.Position);
|
||||
|
||||
fixed (byte* BuffPtr = Data)
|
||||
{
|
||||
long InOffs = 0;
|
||||
|
||||
for (int Y = 0; Y < Texture.Height; Y++)
|
||||
for (int X = 0; X < Texture.Width; X++)
|
||||
{
|
||||
long Offset = (uint)Swizzle.GetSwizzleOffset(X, Y);
|
||||
|
||||
int Pixel = *(int*)(BuffPtr + InOffs);
|
||||
|
||||
CpuMem.WriteInt32(Position + Offset, Pixel);
|
||||
|
||||
InOffs += 4;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.Graphics.Memory;
|
||||
using System.Collections.Generic;
|
||||
|
||||
namespace Ryujinx.HLE.HOS.Services.Nv.NvGpuAS
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.Graphics.Memory;
|
||||
using Ryujinx.HLE.HOS.Services.Nv.NvMap;
|
||||
using Ryujinx.HLE.Logging;
|
||||
using System;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.Graphics.Memory;
|
||||
using Ryujinx.HLE.HOS.Services.Nv.NvGpuAS;
|
||||
using Ryujinx.HLE.Logging;
|
||||
using System;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
using ChocolArm64.Memory;
|
||||
using Ryujinx.HLE.Gpu.Memory;
|
||||
using Ryujinx.Graphics.Memory;
|
||||
using Ryujinx.HLE.Logging;
|
||||
using Ryujinx.HLE.Utilities;
|
||||
using System.Collections.Concurrent;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu.Texture;
|
||||
using Ryujinx.Graphics.Texture;
|
||||
using Ryujinx.HLE.HOS.Kernel;
|
||||
using Ryujinx.HLE.HOS.Services.Nv.NvMap;
|
||||
using Ryujinx.HLE.Logging;
|
||||
|
|
@ -303,7 +303,7 @@ namespace Ryujinx.HLE.HOS.Services.Android
|
|||
int Right = Crop.Right;
|
||||
int Bottom = Crop.Bottom;
|
||||
|
||||
Renderer.QueueAction(() => Renderer.FrameBuffer.SetTransform(FlipX, FlipY, Top, Left, Right, Bottom));
|
||||
Renderer.QueueAction(() => Renderer.RenderTarget.SetTransform(FlipX, FlipY, Top, Left, Right, Bottom));
|
||||
|
||||
//TODO: Support double buffering here aswell, it is broken for GPU
|
||||
//frame buffers because it seems to be completely out of sync.
|
||||
|
|
@ -311,7 +311,7 @@ namespace Ryujinx.HLE.HOS.Services.Android
|
|||
{
|
||||
//Frame buffer is rendered to by the GPU, we can just
|
||||
//bind the frame buffer texture, it's not necessary to read anything.
|
||||
Renderer.QueueAction(() => Renderer.FrameBuffer.Set(FbAddr));
|
||||
Renderer.QueueAction(() => Renderer.RenderTarget.Set(FbAddr));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -321,7 +321,7 @@ namespace Ryujinx.HLE.HOS.Services.Android
|
|||
|
||||
byte[] Data = TextureReader.Read(Context.Memory, Texture);
|
||||
|
||||
Renderer.QueueAction(() => Renderer.FrameBuffer.Set(Data, FbWidth, FbHeight));
|
||||
Renderer.QueueAction(() => Renderer.RenderTarget.Set(Data, FbWidth, FbHeight));
|
||||
}
|
||||
|
||||
Context.Device.Gpu.Renderer.QueueAction(() => ReleaseBuffer(Slot));
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
using Ryujinx.Audio;
|
||||
using Ryujinx.Graphics;
|
||||
using Ryujinx.Graphics.Gal;
|
||||
using Ryujinx.HLE.Gpu;
|
||||
using Ryujinx.HLE.HOS;
|
||||
using Ryujinx.HLE.Input;
|
||||
using Ryujinx.HLE.Logging;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue