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Add SHA1C, SHA1H, SHA1M, SHA1P, SHA1SU0, SHA1SU1 and Isb instructions; add 6 Tests (closed box). (#483)

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* Update AOpCodeTable.cs

* Update AInstEmitSystem.cs

* Update AInstEmitSimdHash.cs

* Update ASoftFallback.cs

* Update CpuTestSimdReg.cs

* Update CpuTestSimd.cs
This commit is contained in:
LDj3SNuD 2018-10-28 23:27:50 +01:00 • committed by gdkchan
parent 111d14f74a
commit b956bbc32c
6 changed files with 400 additions and 132 deletions
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83
ChocolArm64/Instruction/AInstEmitSimdHash.cs
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@ -1,10 +1,89 @@
using ChocolArm64.Decoder;
using ChocolArm64.Translation;
using static ChocolArm64.Instruction.AInstEmitSimdHelper;
namespace ChocolArm64.Instruction
{
static partial class AInstEmit
{
#region "Sha1"
public static void Sha1c_V(AILEmitterCtx Context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashChoose));
Context.EmitStvec(Op.Rd);
}
public static void Sha1h_V(AILEmitterCtx Context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.FixedRotate));
EmitScalarSet(Context, Op.Rd, 2);
}
public static void Sha1m_V(AILEmitterCtx Context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashMajority));
Context.EmitStvec(Op.Rd);
}
public static void Sha1p_V(AILEmitterCtx Context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
Context.EmitLdvec(Op.Rd);
EmitVectorExtractZx(Context, Op.Rn, 0, 2);
Context.EmitLdvec(Op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashParity));
Context.EmitStvec(Op.Rd);
}
public static void Sha1su0_V(AILEmitterCtx Context)
{
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
Context.EmitLdvec(Op.Rd);
Context.EmitLdvec(Op.Rn);
Context.EmitLdvec(Op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha1SchedulePart1));
Context.EmitStvec(Op.Rd);
}
public static void Sha1su1_V(AILEmitterCtx Context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
Context.EmitLdvec(Op.Rd);
Context.EmitLdvec(Op.Rn);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha1SchedulePart2));
Context.EmitStvec(Op.Rd);
}
#endregion
#region "Sha256"
public static void Sha256h_V(AILEmitterCtx Context)
{
@ -39,7 +118,7 @@ namespace ChocolArm64.Instruction
Context.EmitLdvec(Op.Rd);
Context.EmitLdvec(Op.Rn);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.SchedulePart1));
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha256SchedulePart1));
Context.EmitStvec(Op.Rd);
}
@ -52,7 +131,7 @@ namespace ChocolArm64.Instruction
Context.EmitLdvec(Op.Rn);
Context.EmitLdvec(Op.Rm);
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.SchedulePart2));
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Sha256SchedulePart2));
Context.EmitStvec(Op.Rd);
}