drashna/ryujinx
1
0
Fork 0
Code Activity Actions

Add a new JIT compiler for CPU code (#693)

Browse source 
* Start of the ARMeilleure project

* Refactoring around the old IRAdapter, now renamed to PreAllocator

* Optimize the LowestBitSet method

* Add CLZ support and fix CLS implementation

* Add missing Equals and GetHashCode overrides on some structs, misc small tweaks

* Implement the ByteSwap IR instruction, and some refactoring on the assembler

* Implement the DivideUI IR instruction and fix 64-bits IDIV

* Correct constant operand type on CSINC

* Move division instructions implementation to InstEmitDiv

* Fix destination type for the ConditionalSelect IR instruction

* Implement UMULH and SMULH, with new IR instructions

* Fix some issues with shift instructions

* Fix constant types for BFM instructions

* Fix up new tests using the new V128 struct

* Update tests

* Move DIV tests to a separate file

* Add support for calls, and some instructions that depends on them

* Start adding support for SIMD & FP types, along with some of the related ARM instructions

* Fix some typos and the divide instruction with FP operands

* Fix wrong method call on Clz_V

* Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes

* Implement SIMD logical instructions and more misc. fixes

* Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations

* Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes

* Implement SIMD shift instruction and fix Dup_V

* Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table

* Fix check with tolerance on tester

* Implement FP & SIMD comparison instructions, and some fixes

* Update FCVT (Scalar) encoding on the table to support the Half-float variants

* Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes

* Use old memory access methods, made a start on SIMD memory insts support, some fixes

* Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes

* Fix arguments count with struct return values, other fixes

* More instructions

* Misc. fixes and integrate LDj3SNuD fixes

* Update tests

* Add a faster linear scan allocator, unwinding support on windows, and other changes

* Update Ryujinx.HLE

* Update Ryujinx.Graphics

* Fix V128 return pointer passing, RCX is clobbered

* Update Ryujinx.Tests

* Update ITimeZoneService

* Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks

* Use generic GetFunctionPointerForDelegate method and other tweaks

* Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics

* Remove some unused code on the assembler

* Fix REX.W prefix regression on float conversion instructions, add some sort of profiler

* Add hardware capability detection

* Fix regression on Sha1h and revert Fcm** changes

* Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator

* Fix silly mistake introduced on last commit on CpuId

* Generate inline stack probes when the stack allocation is too large

* Initial support for the System-V ABI

* Support multiple destination operands

* Fix SSE2 VectorInsert8 path, and other fixes

* Change placement of XMM callee save and restore code to match other compilers

* Rename Dest to Destination and Inst to Instruction

* Fix a regression related to calls and the V128 type

* Add an extra space on comments to match code style

* Some refactoring

* Fix vector insert FP32 SSE2 path

* Port over the ARM32 instructions

* Avoid memory protection races on JIT Cache

* Another fix on VectorInsert FP32 (thanks to LDj3SNuD

* Float operands don't need to use the same register when VEX is supported

* Add a new register allocator, higher quality code for hot code (tier up), and other tweaks

* Some nits, small improvements on the pre allocator

* CpuThreadState is gone

* Allow changing CPU emulators with a config entry

* Add runtime identifiers on the ARMeilleure project

* Allow switching between CPUs through a config entry (pt. 2)

* Change win10-x64 to win-x64 on projects

* Update the Ryujinx project to use ARMeilleure

* Ensure that the selected register is valid on the hybrid allocator

* Allow exiting on returns to 0 (should fix test regression)

* Remove register assignments for most used variables on the hybrid allocator

* Do not use fixed registers as spill temp

* Add missing namespace and remove unneeded using

* Address PR feedback

* Fix types, etc

* Enable AssumeStrictAbiCompliance by default

* Ensure that Spill and Fill don't load or store any more than necessary
This commit is contained in:
gdkchan 2019-08-08 15:56:22 -03:00 • committed by emmauss
parent 1ba58e9942
commit a731ab3a2a
310 changed files with 37389 additions and 2086 deletions
Download patch file Download diff file Expand all files Collapse all files

149
Ryujinx.HLE/HOS/Kernel/SupervisorCall/SvcThread.cs
View file

@ -1,4 +1,5 @@
using ChocolArm64.Memory;
using ARMeilleure.Memory;
using ARMeilleure.State;
using Ryujinx.HLE.HOS.Kernel.Common;
using Ryujinx.HLE.HOS.Kernel.Process;
using Ryujinx.HLE.HOS.Kernel.Threading;
@ -347,83 +348,91 @@ namespace Ryujinx.HLE.HOS.Kernel.SupervisorCall
return KernelResult.InvalidThread;
}
MemoryManager memory = currentProcess.CpuMemory;
IMemoryManager memory = currentProcess.CpuMemory;
memory.WriteUInt64((long)address + 0x0, thread.Context.ThreadState.X0);
memory.WriteUInt64((long)address + 0x8, thread.Context.ThreadState.X1);
memory.WriteUInt64((long)address + 0x10, thread.Context.ThreadState.X2);
memory.WriteUInt64((long)address + 0x18, thread.Context.ThreadState.X3);
memory.WriteUInt64((long)address + 0x20, thread.Context.ThreadState.X4);
memory.WriteUInt64((long)address + 0x28, thread.Context.ThreadState.X5);
memory.WriteUInt64((long)address + 0x30, thread.Context.ThreadState.X6);
memory.WriteUInt64((long)address + 0x38, thread.Context.ThreadState.X7);
memory.WriteUInt64((long)address + 0x40, thread.Context.ThreadState.X8);
memory.WriteUInt64((long)address + 0x48, thread.Context.ThreadState.X9);
memory.WriteUInt64((long)address + 0x50, thread.Context.ThreadState.X10);
memory.WriteUInt64((long)address + 0x58, thread.Context.ThreadState.X11);
memory.WriteUInt64((long)address + 0x60, thread.Context.ThreadState.X12);
memory.WriteUInt64((long)address + 0x68, thread.Context.ThreadState.X13);
memory.WriteUInt64((long)address + 0x70, thread.Context.ThreadState.X14);
memory.WriteUInt64((long)address + 0x78, thread.Context.ThreadState.X15);
memory.WriteUInt64((long)address + 0x80, thread.Context.ThreadState.X16);
memory.WriteUInt64((long)address + 0x88, thread.Context.ThreadState.X17);
memory.WriteUInt64((long)address + 0x90, thread.Context.ThreadState.X18);
memory.WriteUInt64((long)address + 0x98, thread.Context.ThreadState.X19);
memory.WriteUInt64((long)address + 0xa0, thread.Context.ThreadState.X20);
memory.WriteUInt64((long)address + 0xa8, thread.Context.ThreadState.X21);
memory.WriteUInt64((long)address + 0xb0, thread.Context.ThreadState.X22);
memory.WriteUInt64((long)address + 0xb8, thread.Context.ThreadState.X23);
memory.WriteUInt64((long)address + 0xc0, thread.Context.ThreadState.X24);
memory.WriteUInt64((long)address + 0xc8, thread.Context.ThreadState.X25);
memory.WriteUInt64((long)address + 0xd0, thread.Context.ThreadState.X26);
memory.WriteUInt64((long)address + 0xd8, thread.Context.ThreadState.X27);
memory.WriteUInt64((long)address + 0xe0, thread.Context.ThreadState.X28);
memory.WriteUInt64((long)address + 0xe8, thread.Context.ThreadState.X29);
memory.WriteUInt64((long)address + 0xf0, thread.Context.ThreadState.X30);
memory.WriteUInt64((long)address + 0xf8, thread.Context.ThreadState.X31);
memory.WriteUInt64((long)address + 0x0, thread.Context.GetX(0));
memory.WriteUInt64((long)address + 0x8, thread.Context.GetX(1));
memory.WriteUInt64((long)address + 0x10, thread.Context.GetX(2));
memory.WriteUInt64((long)address + 0x18, thread.Context.GetX(3));
memory.WriteUInt64((long)address + 0x20, thread.Context.GetX(4));
memory.WriteUInt64((long)address + 0x28, thread.Context.GetX(5));
memory.WriteUInt64((long)address + 0x30, thread.Context.GetX(6));
memory.WriteUInt64((long)address + 0x38, thread.Context.GetX(7));
memory.WriteUInt64((long)address + 0x40, thread.Context.GetX(8));
memory.WriteUInt64((long)address + 0x48, thread.Context.GetX(9));
memory.WriteUInt64((long)address + 0x50, thread.Context.GetX(10));
memory.WriteUInt64((long)address + 0x58, thread.Context.GetX(11));
memory.WriteUInt64((long)address + 0x60, thread.Context.GetX(12));
memory.WriteUInt64((long)address + 0x68, thread.Context.GetX(13));
memory.WriteUInt64((long)address + 0x70, thread.Context.GetX(14));
memory.WriteUInt64((long)address + 0x78, thread.Context.GetX(15));
memory.WriteUInt64((long)address + 0x80, thread.Context.GetX(16));
memory.WriteUInt64((long)address + 0x88, thread.Context.GetX(17));
memory.WriteUInt64((long)address + 0x90, thread.Context.GetX(18));
memory.WriteUInt64((long)address + 0x98, thread.Context.GetX(19));
memory.WriteUInt64((long)address + 0xa0, thread.Context.GetX(20));
memory.WriteUInt64((long)address + 0xa8, thread.Context.GetX(21));
memory.WriteUInt64((long)address + 0xb0, thread.Context.GetX(22));
memory.WriteUInt64((long)address + 0xb8, thread.Context.GetX(23));
memory.WriteUInt64((long)address + 0xc0, thread.Context.GetX(24));
memory.WriteUInt64((long)address + 0xc8, thread.Context.GetX(25));
memory.WriteUInt64((long)address + 0xd0, thread.Context.GetX(26));
memory.WriteUInt64((long)address + 0xd8, thread.Context.GetX(27));
memory.WriteUInt64((long)address + 0xe0, thread.Context.GetX(28));
memory.WriteUInt64((long)address + 0xe8, thread.Context.GetX(29));
memory.WriteUInt64((long)address + 0xf0, thread.Context.GetX(30));
memory.WriteUInt64((long)address + 0xf8, thread.Context.GetX(31));
memory.WriteInt64((long)address + 0x100, thread.LastPc);
memory.WriteUInt64((long)address + 0x108, (ulong)thread.Context.ThreadState.Psr);
memory.WriteUInt64((long)address + 0x108, (ulong)GetPsr(thread.Context));
memory.WriteVector128((long)address + 0x110, thread.Context.ThreadState.V0);
memory.WriteVector128((long)address + 0x120, thread.Context.ThreadState.V1);
memory.WriteVector128((long)address + 0x130, thread.Context.ThreadState.V2);
memory.WriteVector128((long)address + 0x140, thread.Context.ThreadState.V3);
memory.WriteVector128((long)address + 0x150, thread.Context.ThreadState.V4);
memory.WriteVector128((long)address + 0x160, thread.Context.ThreadState.V5);
memory.WriteVector128((long)address + 0x170, thread.Context.ThreadState.V6);
memory.WriteVector128((long)address + 0x180, thread.Context.ThreadState.V7);
memory.WriteVector128((long)address + 0x190, thread.Context.ThreadState.V8);
memory.WriteVector128((long)address + 0x1a0, thread.Context.ThreadState.V9);
memory.WriteVector128((long)address + 0x1b0, thread.Context.ThreadState.V10);
memory.WriteVector128((long)address + 0x1c0, thread.Context.ThreadState.V11);
memory.WriteVector128((long)address + 0x1d0, thread.Context.ThreadState.V12);
memory.WriteVector128((long)address + 0x1e0, thread.Context.ThreadState.V13);
memory.WriteVector128((long)address + 0x1f0, thread.Context.ThreadState.V14);
memory.WriteVector128((long)address + 0x200, thread.Context.ThreadState.V15);
memory.WriteVector128((long)address + 0x210, thread.Context.ThreadState.V16);
memory.WriteVector128((long)address + 0x220, thread.Context.ThreadState.V17);
memory.WriteVector128((long)address + 0x230, thread.Context.ThreadState.V18);
memory.WriteVector128((long)address + 0x240, thread.Context.ThreadState.V19);
memory.WriteVector128((long)address + 0x250, thread.Context.ThreadState.V20);
memory.WriteVector128((long)address + 0x260, thread.Context.ThreadState.V21);
memory.WriteVector128((long)address + 0x270, thread.Context.ThreadState.V22);
memory.WriteVector128((long)address + 0x280, thread.Context.ThreadState.V23);
memory.WriteVector128((long)address + 0x290, thread.Context.ThreadState.V24);
memory.WriteVector128((long)address + 0x2a0, thread.Context.ThreadState.V25);
memory.WriteVector128((long)address + 0x2b0, thread.Context.ThreadState.V26);
memory.WriteVector128((long)address + 0x2c0, thread.Context.ThreadState.V27);
memory.WriteVector128((long)address + 0x2d0, thread.Context.ThreadState.V28);
memory.WriteVector128((long)address + 0x2e0, thread.Context.ThreadState.V29);
memory.WriteVector128((long)address + 0x2f0, thread.Context.ThreadState.V30);
memory.WriteVector128((long)address + 0x300, thread.Context.ThreadState.V31);
memory.WriteVector128((long)address + 0x110, thread.Context.GetV(0));
memory.WriteVector128((long)address + 0x120, thread.Context.GetV(1));
memory.WriteVector128((long)address + 0x130, thread.Context.GetV(2));
memory.WriteVector128((long)address + 0x140, thread.Context.GetV(3));
memory.WriteVector128((long)address + 0x150, thread.Context.GetV(4));
memory.WriteVector128((long)address + 0x160, thread.Context.GetV(5));
memory.WriteVector128((long)address + 0x170, thread.Context.GetV(6));
memory.WriteVector128((long)address + 0x180, thread.Context.GetV(7));
memory.WriteVector128((long)address + 0x190, thread.Context.GetV(8));
memory.WriteVector128((long)address + 0x1a0, thread.Context.GetV(9));
memory.WriteVector128((long)address + 0x1b0, thread.Context.GetV(10));
memory.WriteVector128((long)address + 0x1c0, thread.Context.GetV(11));
memory.WriteVector128((long)address + 0x1d0, thread.Context.GetV(12));
memory.WriteVector128((long)address + 0x1e0, thread.Context.GetV(13));
memory.WriteVector128((long)address + 0x1f0, thread.Context.GetV(14));
memory.WriteVector128((long)address + 0x200, thread.Context.GetV(15));
memory.WriteVector128((long)address + 0x210, thread.Context.GetV(16));
memory.WriteVector128((long)address + 0x220, thread.Context.GetV(17));
memory.WriteVector128((long)address + 0x230, thread.Context.GetV(18));
memory.WriteVector128((long)address + 0x240, thread.Context.GetV(19));
memory.WriteVector128((long)address + 0x250, thread.Context.GetV(20));
memory.WriteVector128((long)address + 0x260, thread.Context.GetV(21));
memory.WriteVector128((long)address + 0x270, thread.Context.GetV(22));
memory.WriteVector128((long)address + 0x280, thread.Context.GetV(23));
memory.WriteVector128((long)address + 0x290, thread.Context.GetV(24));
memory.WriteVector128((long)address + 0x2a0, thread.Context.GetV(25));
memory.WriteVector128((long)address + 0x2b0, thread.Context.GetV(26));
memory.WriteVector128((long)address + 0x2c0, thread.Context.GetV(27));
memory.WriteVector128((long)address + 0x2d0, thread.Context.GetV(28));
memory.WriteVector128((long)address + 0x2e0, thread.Context.GetV(29));
memory.WriteVector128((long)address + 0x2f0, thread.Context.GetV(30));
memory.WriteVector128((long)address + 0x300, thread.Context.GetV(31));
memory.WriteInt32((long)address + 0x310, thread.Context.ThreadState.Fpcr);
memory.WriteInt32((long)address + 0x314, thread.Context.ThreadState.Fpsr);
memory.WriteInt64((long)address + 0x318, thread.Context.ThreadState.Tpidr);
memory.WriteInt32((long)address + 0x310, (int)thread.Context.Fpcr);
memory.WriteInt32((long)address + 0x314, (int)thread.Context.Fpsr);
memory.WriteInt64((long)address + 0x318, thread.Context.Tpidr);
return KernelResult.Success;
}
private static int GetPsr(IExecutionContext context)
{
return (context.GetPstateFlag(PState.NFlag) ? (1 << 31) : 0) |
(context.GetPstateFlag(PState.ZFlag) ? (1 << 30) : 0) |
(context.GetPstateFlag(PState.CFlag) ? (1 << 29) : 0) |
(context.GetPstateFlag(PState.VFlag) ? (1 << 28) : 0);
}
}
}