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Implement speculative translation on the CPU (#515)

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* Implement speculative translation on the cpu, and change the way how branches to unknown or untranslated addresses works

* Port t0opt changes and other cleanups

* Change namespace from translation related classes to ChocolArm64.Translation, other minor tweaks

* Fix typo

* Translate higher quality code for indirect jumps aswell, and on some cases that were missed when lower quality (tier 0) code was available

* Remove debug print

* Remove direct argument passing optimization, and enable tail calls for BR instructions

* Call delegates directly with Callvirt rather than calling Execute, do not emit calls for tier 0 code

* Remove unused property

* Rename argument on ArmSubroutine delegate
This commit is contained in:
gdkchan 2019-02-04 18:26:05 -03:00 • committed by GitHub
parent f5b4f6ccc4
commit a694420d11
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GPG key ID: 4AEE18F83AFDEB23
21 changed files with 656 additions and 376 deletions
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30
ChocolArm64/Instructions/InstEmitFlow.cs
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@ -3,6 +3,8 @@ using ChocolArm64.State;
using ChocolArm64.Translation;
using System.Reflection.Emit;
using static ChocolArm64.Instructions.InstEmitFlowHelper;
namespace ChocolArm64.Instructions
{
static partial class InstEmit
@ -39,7 +41,7 @@ namespace ChocolArm64.Instructions
context.EmitStint(RegisterAlias.Lr);
context.EmitStoreState();
InstEmitFlowHelper.EmitCall(context, op.Imm);
EmitCall(context, op.Imm);
}
public static void Blr(ILEmitterCtx context)
@ -51,7 +53,7 @@ namespace ChocolArm64.Instructions
context.EmitStint(RegisterAlias.Lr);
context.EmitStoreState();
context.Emit(OpCodes.Ret);
EmitVirtualCall(context);
}
public static void Br(ILEmitterCtx context)
@ -61,7 +63,7 @@ namespace ChocolArm64.Instructions
context.EmitStoreState();
context.EmitLdintzr(op.Rn);
context.Emit(OpCodes.Ret);
EmitVirtualJump(context);
}
public static void Cbnz(ILEmitterCtx context) => EmitCb(context, OpCodes.Bne_Un);
@ -106,10 +108,17 @@ namespace ChocolArm64.Instructions
{
OpCodeBImm64 op = (OpCodeBImm64)context.CurrOp;
if (context.CurrBlock.Next != null &&
context.CurrBlock.Branch != null)
if (context.CurrBlock.Branch != null)
{
context.EmitCondBranch(context.GetLabel(op.Imm), cond);
if (context.CurrBlock.Next == null)
{
context.EmitStoreState();
context.EmitLdc_I8(op.Position + 4);
context.Emit(OpCodes.Ret);
}
}
else
{
@ -135,10 +144,17 @@ namespace ChocolArm64.Instructions
{
OpCodeBImm64 op = (OpCodeBImm64)context.CurrOp;
if (context.CurrBlock.Next != null &&
context.CurrBlock.Branch != null)
if (context.CurrBlock.Branch != null)
{
context.Emit(ilOp, context.GetLabel(op.Imm));
if (context.CurrBlock.Next == null)
{
context.EmitStoreState();
context.EmitLdc_I8(op.Position + 4);
context.Emit(OpCodes.Ret);
}
}
else
{