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Update ADC test, add WZR/WSP, ADCS, SBCS test (#37)

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* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab
This commit is contained in:
MS-DOS1999 2018-02-25 02:50:58 +01:00 • committed by gdkchan
parent e90a0f0e33
commit a4ff0d3484
2 changed files with 62 additions and 9 deletions
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7
Ryujinx.Tests/Cpu/CpuTest.cs
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@ -57,13 +57,14 @@ namespace Ryujinx.Tests.Cpu
Position += 4;
}
protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0,
protected void SetThreadState(ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X31 = 0,
AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false)
{
Thread.ThreadState.X0 = X0;
Thread.ThreadState.X1 = X1;
Thread.ThreadState.X2 = X2;
Thread.ThreadState.X31 = X31;
Thread.ThreadState.V0 = V0;
Thread.ThreadState.V1 = V1;
Thread.ThreadState.V2 = V2;
@ -91,14 +92,14 @@ namespace Ryujinx.Tests.Cpu
}
protected AThreadState SingleOpcode(uint Opcode,
ulong X0 = 0, ulong X1 = 0, ulong X2 = 0,
ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, ulong X31 = 0,
AVec V0 = default(AVec), AVec V1 = default(AVec), AVec V2 = default(AVec),
bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false)
{
this.Opcode(Opcode);
this.Opcode(0xD4200000); // BRK #0
this.Opcode(0xD65F03C0); // RET
SetThreadState(X0, X1, X2, V0, V1, V2, Overflow, Carry, Zero, Negative);
SetThreadState(X0, X1, X2, X31, V0, V1, V2, Overflow, Carry, Zero, Negative);
ExecuteOpcodes();
return GetThreadState();