Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload * Add files via upload * Add files via upload * CPE * Add EmitSse42Crc32() * Update CpuTestSimdCmp.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update Instructions.cs
This commit is contained in:
LDj3SNuD
gdkchan
parent
37a6e84fd4
commit
8f6387128a
13 changed files with 698 additions and 120 deletions
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@ -113,6 +113,22 @@ namespace Ryujinx.Tests.Cpu
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return GetThreadState();
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}
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protected static Vector128<float> MakeVectorE0(double A0)
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{
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return Sse.StaticCast<long, float>(Sse2.SetVector128(0, BitConverter.DoubleToInt64Bits(A0)));
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}
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protected static Vector128<float> MakeVectorE0E1(double A0, double A1)
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{
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return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(A1),
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BitConverter.DoubleToInt64Bits(A0)));
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}
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protected static Vector128<float> MakeVectorE1(double A1)
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{
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return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(A1), 0));
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}
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protected static double VectorExtractDouble(Vector128<float> Vector, byte Index)
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{
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long Value = Sse41.Extract(Sse.StaticCast<float, long>(Vector), Index);
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@ -120,24 +136,19 @@ namespace Ryujinx.Tests.Cpu
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return BitConverter.Int64BitsToDouble(Value);
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}
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protected static Vector128<float> MakeVectorE0(double A)
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protected static Vector128<float> MakeVectorE0(ulong A0)
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{
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return Sse.StaticCast<long, float>(Sse2.SetVector128(0, BitConverter.DoubleToInt64Bits(A)));
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(0, A0));
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}
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protected static Vector128<float> MakeVectorE0(ulong A)
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protected static Vector128<float> MakeVectorE0E1(ulong A0, ulong A1)
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{
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(0, A));
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(A1, A0));
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}
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protected static Vector128<float> MakeVectorE0E1(ulong A, ulong B)
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protected static Vector128<float> MakeVectorE1(ulong A1)
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{
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(B, A));
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}
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protected static Vector128<float> MakeVectorE1(ulong B)
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{
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(B, 0));
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return Sse.StaticCast<ulong, float>(Sse2.SetVector128(A1, 0));
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}
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protected static ulong GetVectorE0(Vector128<float> Vector)
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@ -628,6 +628,47 @@ namespace Ryujinx.Tests.Cpu
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});
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}
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[Test, Description("CNT <Vd>.<T>, <Vn>.<T>")]
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public void Cnt_V_8B([ValueSource("_8B_")] [Random(1)] ulong A)
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{
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uint Opcode = 0x0E205820; // CNT V0.8B, V1.8B
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Bits Op = new Bits(Opcode);
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Vector128<float> V0 = MakeVectorE1(TestContext.CurrentContext.Random.NextULong());
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Vector128<float> V1 = MakeVectorE0(A);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
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AArch64.V(1, new Bits(A));
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SimdFp.Cnt_V(Op[30], Op[23, 22], Op[9, 5], Op[4, 0]);
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(AArch64.V(64, 0).ToUInt64()));
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Assert.That(GetVectorE1(ThreadState.V0), Is.Zero);
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});
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}
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[Test, Pairwise, Description("CNT <Vd>.<T>, <Vn>.<T>")]
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public void Cnt_V_16B([ValueSource("_8B_")] [Random(1)] ulong A0,
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[ValueSource("_8B_")] [Random(1)] ulong A1)
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{
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uint Opcode = 0x4E205820; // CNT V0.16B, V1.16B
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Bits Op = new Bits(Opcode);
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Vector128<float> V1 = MakeVectorE0E1(A0, A1);
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
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AArch64.Vpart(1, 0, new Bits(A0));
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AArch64.Vpart(1, 1, new Bits(A1));
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SimdFp.Cnt_V(Op[30], Op[23, 22], Op[9, 5], Op[4, 0]);
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(AArch64.Vpart(64, 0, 0).ToUInt64()));
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Assert.That(GetVectorE1(ThreadState.V0), Is.EqualTo(AArch64.Vpart(64, 0, 1).ToUInt64()));
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});
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}
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[Test, Description("NEG <V><d>, <V><n>")]
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public void Neg_S_D([ValueSource("_1D_")] [Random(1)] ulong A)
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{
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@ -176,10 +176,13 @@ namespace Ryujinx.Tests.Cpu
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{
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AThreadState ThreadState = SingleOpcode(0x4EA1D802, V0: Sse.SetAllVector128(A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)0), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)1), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)2), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)3), Is.EqualTo(1 / A));
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Assert.Multiple(() =>
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{
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)0), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)1), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)2), Is.EqualTo(1 / A));
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Assert.That(Sse41.Extract(ThreadState.V2, (byte)3), Is.EqualTo(1 / A));
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});
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}
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[Test, Description("FRECPS D0, D1, D2")]
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@ -199,10 +202,13 @@ namespace Ryujinx.Tests.Cpu
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V2: Sse.SetAllVector128(A),
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V0: Sse.SetAllVector128(B));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)0), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)1), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)2), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)3), Is.EqualTo(2 - (A * B)));
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Assert.Multiple(() =>
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{
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)0), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)1), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)2), Is.EqualTo(2 - (A * B)));
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Assert.That(Sse41.Extract(ThreadState.V4, (byte)3), Is.EqualTo(2 - (A * B)));
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});
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}
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[TestCase(0x3FE66666u, false, 0x40000000u)]
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375
Ryujinx.Tests/Cpu/CpuTestSimdCmp.cs
Normal file
375
Ryujinx.Tests/Cpu/CpuTestSimdCmp.cs
Normal file
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@ -0,0 +1,375 @@
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using ChocolArm64.State;
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using NUnit.Framework;
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using System;
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTestSimdCmp : CpuTest
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{
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#region "ValueSource"
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private static float[] _floats_()
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{
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return new float[] { float.NegativeInfinity, float.MinValue, -1f, -0f,
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+0f, +1f, float.MaxValue, float.PositiveInfinity };
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}
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private static double[] _doubles_()
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{
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return new double[] { double.NegativeInfinity, double.MinValue, -1d, -0d,
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+0d, +1d, double.MaxValue, double.PositiveInfinity };
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}
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#endregion
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[Test, Description("FCMEQ D0, D1, D2 | FCMGE D0, D1, D2 | FCMGT D0, D1, D2")]
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public void Fcmeq_Fcmge_Fcmgt_Reg_S_D([ValueSource("_doubles_")] [Random(8)] double A,
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[ValueSource("_doubles_")] [Random(8)] double B,
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[Values(0u, 1u, 3u)] uint EU) // EQ, GE, GT
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{
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uint Opcode = 0x5E62E420 | ((EU & 1) << 29) | ((EU >> 1) << 23);
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Vector128<float> V0 = Sse.StaticCast<double, float>(Sse2.SetAllVector128(TestContext.CurrentContext.Random.NextDouble()));
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Vector128<float> V1 = Sse.StaticCast<double, float>(Sse2.SetScalarVector128(A));
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Vector128<float> V2 = Sse.StaticCast<double, float>(Sse2.SetScalarVector128(B));
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, V2: V2);
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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switch (EU)
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{
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case 0: Exp = (A == B ? Ones : Zeros); break;
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case 1: Exp = (A >= B ? Ones : Zeros); break;
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case 3: Exp = (A > B ? Ones : Zeros); break;
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}
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Assert.Multiple(() =>
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{
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Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
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Assert.That(VectorExtractDouble(ThreadState.V0, (byte)1), Is.Zero);
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});
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}
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[Test, Description("FCMEQ S0, S1, S2 | FCMGE S0, S1, S2 | FCMGT S0, S1, S2")]
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public void Fcmeq_Fcmge_Fcmgt_Reg_S_S([ValueSource("_floats_")] [Random(8)] float A,
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[ValueSource("_floats_")] [Random(8)] float B,
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[Values(0u, 1u, 3u)] uint EU) // EQ, GE, GT
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{
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uint Opcode = 0x5E22E420 | ((EU & 1) << 29) | ((EU >> 1) << 23);
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Vector128<float> V0 = Sse.SetAllVector128(TestContext.CurrentContext.Random.NextFloat());
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Vector128<float> V1 = Sse.SetScalarVector128(A);
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Vector128<float> V2 = Sse.SetScalarVector128(B);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, V2: V2);
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
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switch (EU)
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{
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case 0: Exp = (A == B ? Ones : Zeros); break;
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case 1: Exp = (A >= B ? Ones : Zeros); break;
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case 3: Exp = (A > B ? Ones : Zeros); break;
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}
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Assert.Multiple(() =>
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{
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
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Assert.That(Sse41.Extract(ThreadState.V0, (byte)1), Is.Zero);
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Assert.That(Sse41.Extract(ThreadState.V0, (byte)2), Is.Zero);
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Assert.That(Sse41.Extract(ThreadState.V0, (byte)3), Is.Zero);
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});
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}
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[Test, Description("FCMEQ V0.2D, V1.2D, V2.2D | FCMGE V0.2D, V1.2D, V2.2D | FCMGT V0.2D, V1.2D, V2.2D")]
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public void Fcmeq_Fcmge_Fcmgt_Reg_V_2D([ValueSource("_doubles_")] [Random(8)] double A,
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[ValueSource("_doubles_")] [Random(8)] double B,
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[Values(0u, 1u, 3u)] uint EU) // EQ, GE, GT
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{
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uint Opcode = 0x4E62E420 | ((EU & 1) << 29) | ((EU >> 1) << 23);
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Vector128<float> V1 = Sse.StaticCast<double, float>(Sse2.SetAllVector128(A));
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Vector128<float> V2 = Sse.StaticCast<double, float>(Sse2.SetAllVector128(B));
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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switch (EU)
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{
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case 0: Exp = (A == B ? Ones : Zeros); break;
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case 1: Exp = (A >= B ? Ones : Zeros); break;
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case 3: Exp = (A > B ? Ones : Zeros); break;
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}
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Assert.Multiple(() =>
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{
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Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
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Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
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});
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}
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[Test, Description("FCMEQ V0.2S, V1.2S, V2.2S | FCMGE V0.2S, V1.2S, V2.2S | FCMGT V0.2S, V1.2S, V2.2S")]
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public void Fcmeq_Fcmge_Fcmgt_Reg_V_2S([ValueSource("_floats_")] [Random(8)] float A,
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[ValueSource("_floats_")] [Random(8)] float B,
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[Values(0u, 1u, 3u)] uint EU) // EQ, GE, GT
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{
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uint Opcode = 0x0E22E420 | ((EU & 1) << 29) | ((EU >> 1) << 23);
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Vector128<float> V0 = Sse.SetAllVector128(TestContext.CurrentContext.Random.NextFloat());
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Vector128<float> V1 = Sse.SetVector128(0, 0, A, A);
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Vector128<float> V2 = Sse.SetVector128(0, 0, B, B);
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1, V2: V2);
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
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switch (EU)
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{
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case 0: Exp = (A == B ? Ones : Zeros); break;
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case 1: Exp = (A >= B ? Ones : Zeros); break;
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case 3: Exp = (A > B ? Ones : Zeros); break;
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}
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Assert.Multiple(() =>
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{
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
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Assert.That(Sse41.Extract(ThreadState.V0, (byte)2), Is.Zero);
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Assert.That(Sse41.Extract(ThreadState.V0, (byte)3), Is.Zero);
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});
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}
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[Test, Description("FCMEQ V0.4S, V1.4S, V2.4S | FCMGE V0.4S, V1.4S, V2.4S | FCMGT V0.4S, V1.4S, V2.4S")]
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public void Fcmeq_Fcmge_Fcmgt_Reg_V_4S([ValueSource("_floats_")] [Random(8)] float A,
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[ValueSource("_floats_")] [Random(8)] float B,
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[Values(0u, 1u, 3u)] uint EU) // EQ, GE, GT
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{
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uint Opcode = 0x4E22E420 | ((EU & 1) << 29) | ((EU >> 1) << 23);
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Vector128<float> V1 = Sse.SetAllVector128(A);
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Vector128<float> V2 = Sse.SetAllVector128(B);
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
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switch (EU)
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{
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case 0: Exp = (A == B ? Ones : Zeros); break;
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case 1: Exp = (A >= B ? Ones : Zeros); break;
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case 3: Exp = (A > B ? Ones : Zeros); break;
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}
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Assert.Multiple(() =>
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{
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)2)), Is.EquivalentTo(Exp));
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Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)3)), Is.EquivalentTo(Exp));
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});
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}
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[Test, Description("FCMGT D0, D1, #0.0 | FCMGE D0, D1, #0.0 | FCMEQ D0, D1, #0.0 | FCMLE D0, D1, #0.0 | FCMLT D0, D1, #0.0")]
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public void Fcmgt_Fcmge_Fcmeq_Fcmle_Fcmlt_Zero_S_D([ValueSource("_doubles_")] [Random(8)] double A,
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[Values(0u, 1u, 2u, 3u)] uint opU, // GT, GE, EQ, LE
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[Values(0u, 1u)] uint bit13) // "LT"
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{
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uint Opcode = 0x5EE0C820 | (((opU & 1) & ~bit13) << 29) | (bit13 << 13) | (((opU >> 1) & ~bit13) << 12);
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Vector128<float> V0 = Sse.StaticCast<double, float>(Sse2.SetAllVector128(TestContext.CurrentContext.Random.NextDouble()));
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Vector128<float> V1 = Sse.StaticCast<double, float>(Sse2.SetScalarVector128(A));
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
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double Zero = +0d;
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byte[] Exp = default(byte[]);
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byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
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byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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||||
|
||||
if (bit13 == 0)
|
||||
{
|
||||
switch (opU)
|
||||
{
|
||||
case 0: Exp = (A > Zero ? Ones : Zeros); break;
|
||||
case 1: Exp = (A >= Zero ? Ones : Zeros); break;
|
||||
case 2: Exp = (A == Zero ? Ones : Zeros); break;
|
||||
case 3: Exp = (Zero >= A ? Ones : Zeros); break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Exp = (Zero > A ? Ones : Zeros);
|
||||
}
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
|
||||
Assert.That(VectorExtractDouble(ThreadState.V0, (byte)1), Is.Zero);
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("FCMGT S0, S1, #0.0 | FCMGE S0, S1, #0.0 | FCMEQ S0, S1, #0.0 | FCMLE S0, S1, #0.0 | FCMLT S0, S1, #0.0")]
|
||||
public void Fcmgt_Fcmge_Fcmeq_Fcmle_Fcmlt_Zero_S_S([ValueSource("_floats_")] [Random(8)] float A,
|
||||
[Values(0u, 1u, 2u, 3u)] uint opU, // GT, GE, EQ, LE
|
||||
[Values(0u, 1u)] uint bit13) // "LT"
|
||||
{
|
||||
uint Opcode = 0x5EA0C820 | (((opU & 1) & ~bit13) << 29) | (bit13 << 13) | (((opU >> 1) & ~bit13) << 12);
|
||||
Vector128<float> V0 = Sse.SetAllVector128(TestContext.CurrentContext.Random.NextFloat());
|
||||
Vector128<float> V1 = Sse.SetScalarVector128(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
float Zero = +0f;
|
||||
byte[] Exp = default(byte[]);
|
||||
byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
|
||||
byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
if (bit13 == 0)
|
||||
{
|
||||
switch (opU)
|
||||
{
|
||||
case 0: Exp = (A > Zero ? Ones : Zeros); break;
|
||||
case 1: Exp = (A >= Zero ? Ones : Zeros); break;
|
||||
case 2: Exp = (A == Zero ? Ones : Zeros); break;
|
||||
case 3: Exp = (Zero >= A ? Ones : Zeros); break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Exp = (Zero > A ? Ones : Zeros);
|
||||
}
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
|
||||
Assert.That(Sse41.Extract(ThreadState.V0, (byte)1), Is.Zero);
|
||||
Assert.That(Sse41.Extract(ThreadState.V0, (byte)2), Is.Zero);
|
||||
Assert.That(Sse41.Extract(ThreadState.V0, (byte)3), Is.Zero);
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("FCMGT V0.2D, V1.2D, #0.0 | FCMGE V0.2D, V1.2D, #0.0 | FCMEQ V0.2D, V1.2D, #0.0 | FCMLE V0.2D, V1.2D, #0.0 | FCMLT V0.2D, V1.2D, #0.0")]
|
||||
public void Fcmgt_Fcmge_Fcmeq_Fcmle_Fcmlt_Zero_V_2D([ValueSource("_doubles_")] [Random(8)] double A,
|
||||
[Values(0u, 1u, 2u, 3u)] uint opU, // GT, GE, EQ, LE
|
||||
[Values(0u, 1u)] uint bit13) // "LT"
|
||||
{
|
||||
uint Opcode = 0x4EE0C820 | (((opU & 1) & ~bit13) << 29) | (bit13 << 13) | (((opU >> 1) & ~bit13) << 12);
|
||||
Vector128<float> V1 = Sse.StaticCast<double, float>(Sse2.SetAllVector128(A));
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
|
||||
double Zero = +0d;
|
||||
byte[] Exp = default(byte[]);
|
||||
byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
|
||||
byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
if (bit13 == 0)
|
||||
{
|
||||
switch (opU)
|
||||
{
|
||||
case 0: Exp = (A > Zero ? Ones : Zeros); break;
|
||||
case 1: Exp = (A >= Zero ? Ones : Zeros); break;
|
||||
case 2: Exp = (A == Zero ? Ones : Zeros); break;
|
||||
case 3: Exp = (Zero >= A ? Ones : Zeros); break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Exp = (Zero > A ? Ones : Zeros);
|
||||
}
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
|
||||
Assert.That(BitConverter.GetBytes(VectorExtractDouble(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("FCMGT V0.2S, V1.2S, #0.0 | FCMGE V0.2S, V1.2S, #0.0 | FCMEQ V0.2S, V1.2S, #0.0 | FCMLE V0.2S, V1.2S, #0.0 | FCMLT V0.2S, V1.2S, #0.0")]
|
||||
public void Fcmgt_Fcmge_Fcmeq_Fcmle_Fcmlt_Zero_V_2S([ValueSource("_floats_")] [Random(8)] float A,
|
||||
[Values(0u, 1u, 2u, 3u)] uint opU, // GT, GE, EQ, LE
|
||||
[Values(0u, 1u)] uint bit13) // "LT"
|
||||
{
|
||||
uint Opcode = 0x0EA0C820 | (((opU & 1) & ~bit13) << 29) | (bit13 << 13) | (((opU >> 1) & ~bit13) << 12);
|
||||
Vector128<float> V0 = Sse.SetAllVector128(TestContext.CurrentContext.Random.NextFloat());
|
||||
Vector128<float> V1 = Sse.SetVector128(0, 0, A, A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V0: V0, V1: V1);
|
||||
|
||||
float Zero = +0f;
|
||||
byte[] Exp = default(byte[]);
|
||||
byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
|
||||
byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
if (bit13 == 0)
|
||||
{
|
||||
switch (opU)
|
||||
{
|
||||
case 0: Exp = (A > Zero ? Ones : Zeros); break;
|
||||
case 1: Exp = (A >= Zero ? Ones : Zeros); break;
|
||||
case 2: Exp = (A == Zero ? Ones : Zeros); break;
|
||||
case 3: Exp = (Zero >= A ? Ones : Zeros); break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Exp = (Zero > A ? Ones : Zeros);
|
||||
}
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
|
||||
Assert.That(Sse41.Extract(ThreadState.V0, (byte)2), Is.Zero);
|
||||
Assert.That(Sse41.Extract(ThreadState.V0, (byte)3), Is.Zero);
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("FCMGT V0.4S, V1.4S, #0.0 | FCMGE V0.4S, V1.4S, #0.0 | FCMEQ V0.4S, V1.4S, #0.0 | FCMLE V0.4S, V1.4S, #0.0 | FCMLT V0.4S, V1.4S, #0.0")]
|
||||
public void Fcmgt_Fcmge_Fcmeq_Fcmle_Fcmlt_Zero_V_4S([ValueSource("_floats_")] [Random(8)] float A,
|
||||
[Values(0u, 1u, 2u, 3u)] uint opU, // GT, GE, EQ, LE
|
||||
[Values(0u, 1u)] uint bit13) // "LT"
|
||||
{
|
||||
uint Opcode = 0x4EA0C820 | (((opU & 1) & ~bit13) << 29) | (bit13 << 13) | (((opU >> 1) & ~bit13) << 12);
|
||||
Vector128<float> V1 = Sse.SetAllVector128(A);
|
||||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1);
|
||||
|
||||
float Zero = +0f;
|
||||
byte[] Exp = default(byte[]);
|
||||
byte[] Ones = new byte[] {0xFF, 0xFF, 0xFF, 0xFF};
|
||||
byte[] Zeros = new byte[] {0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
if (bit13 == 0)
|
||||
{
|
||||
switch (opU)
|
||||
{
|
||||
case 0: Exp = (A > Zero ? Ones : Zeros); break;
|
||||
case 1: Exp = (A >= Zero ? Ones : Zeros); break;
|
||||
case 2: Exp = (A == Zero ? Ones : Zeros); break;
|
||||
case 3: Exp = (Zero >= A ? Ones : Zeros); break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Exp = (Zero > A ? Ones : Zeros);
|
||||
}
|
||||
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)0)), Is.EquivalentTo(Exp));
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)1)), Is.EquivalentTo(Exp));
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)2)), Is.EquivalentTo(Exp));
|
||||
Assert.That(BitConverter.GetBytes(Sse41.Extract(ThreadState.V0, (byte)3)), Is.EquivalentTo(Exp));
|
||||
});
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -19,12 +19,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
|
||||
|
||||
Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0);
|
||||
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("TRN1 V0.8B, V1.8B, V2.8B")]
|
||||
|
|
@ -39,14 +40,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
|
||||
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A4));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B4));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A6));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B6));
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A4));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B4));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A6));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B6));
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("TRN2 V0.4S, V1.4S, V2.4S")]
|
||||
|
|
@ -59,10 +63,13 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
|
||||
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
|
||||
});
|
||||
}
|
||||
|
||||
[Test, Description("TRN2 V0.8B, V1.8B, V2.8B")]
|
||||
|
|
@ -77,14 +84,17 @@ namespace Ryujinx.Tests.Cpu
|
|||
|
||||
AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
|
||||
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A5));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B5));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A7));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B7));
|
||||
Assert.Multiple(() =>
|
||||
{
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A5));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B5));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A7));
|
||||
Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B7));
|
||||
});
|
||||
}
|
||||
|
||||
[TestCase(0u, 0u, 0x2313221221112010ul, 0x0000000000000000ul)]
|
||||
|
|
|
|||
|
|
@ -1826,7 +1826,7 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
// addp_advsimd_pair.html
|
||||
public static void Addp_S(Bits size, Bits Rn, Bits Rd)
|
||||
{
|
||||
/* Decode Scalar */
|
||||
/* Decode */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
|
||||
|
|
@ -1875,7 +1875,7 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
{
|
||||
const bool U = false;
|
||||
|
||||
/* Decode */
|
||||
/* Decode Vector */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
|
||||
|
|
@ -1917,7 +1917,7 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
{
|
||||
const bool U = true;
|
||||
|
||||
/* Decode */
|
||||
/* Decode Vector */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
|
||||
|
|
@ -2654,6 +2654,37 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
V(d, result);
|
||||
}
|
||||
|
||||
// cnt_advsimd.html
|
||||
public static void Cnt_V(bool Q, Bits size, Bits Rn, Bits Rd)
|
||||
{
|
||||
/* Decode Vector */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
|
||||
/* if size != '00' then ReservedValue(); */
|
||||
|
||||
int esize = 8;
|
||||
int datasize = (Q ? 128 : 64);
|
||||
int elements = datasize / 8;
|
||||
|
||||
/* Operation */
|
||||
/* CheckFPAdvSIMDEnabled64(); */
|
||||
|
||||
Bits result = new Bits(datasize);
|
||||
Bits operand = V(datasize, n);
|
||||
|
||||
BigInteger count;
|
||||
|
||||
for (int e = 0; e <= elements - 1; e++)
|
||||
{
|
||||
count = (BigInteger)BitCount(Elem(operand, e, esize));
|
||||
|
||||
Elem(result, e, esize, count.SubBigInteger(esize - 1, 0));
|
||||
}
|
||||
|
||||
V(d, result);
|
||||
}
|
||||
|
||||
// neg_advsimd.html#NEG_asisdmisc_R
|
||||
public static void Neg_S(Bits size, Bits Rn, Bits Rd)
|
||||
{
|
||||
|
|
@ -2745,7 +2776,7 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
// not_advsimd.html
|
||||
public static void Not_V(bool Q, Bits Rn, Bits Rd)
|
||||
{
|
||||
/* Decode */
|
||||
/* Decode Vector */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
|
||||
|
|
@ -3095,7 +3126,7 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
// addp_advsimd_vec.html
|
||||
public static void Addp_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
|
||||
{
|
||||
/* Decode Vector */
|
||||
/* Decode */
|
||||
int d = (int)UInt(Rd);
|
||||
int n = (int)UInt(Rn);
|
||||
int m = (int)UInt(Rm);
|
||||
|
|
|
|||
|
|
@ -586,6 +586,24 @@ namespace Ryujinx.Tests.Cpu.Tester
|
|||
return (x >= 0 ? x : -x);
|
||||
}
|
||||
|
||||
// shared_pseudocode.html#impl-shared.BitCount.1
|
||||
public static int BitCount(Bits x)
|
||||
{
|
||||
int N = x.Count;
|
||||
|
||||
int result = 0;
|
||||
|
||||
for (int i = 0; i <= N - 1; i++)
|
||||
{
|
||||
if (x[i])
|
||||
{
|
||||
result = result + 1;
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
// shared_pseudocode.html#impl-shared.CountLeadingSignBits.1
|
||||
public static int CountLeadingSignBits(Bits x)
|
||||
{
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue