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Refactoring and optimization on CPU translation (#661)

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* Refactoring and optimization on CPU translation

* Remove now unused property

* Rename ilBlock -> block (local)

* Change equality comparison on RegisterMask for consistency

Co-Authored-By: gdkchan <gab.dark.100@gmail.com>

* Add back the aggressive inlining attribute to the Synchronize method

* Implement IEquatable on the Register struct

* Fix identation
This commit is contained in:
gdkchan 2019-04-26 01:55:12 -03:00 • committed by jduncanator
parent 2b8eac1bce
commit 8a7d99cdea
48 changed files with 1257 additions and 1280 deletions
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4
ChocolArm64/Instructions/InstEmitFlow32.cs
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@ -19,7 +19,7 @@ namespace ChocolArm64.Instructions
}
else
{
context.EmitStoreState();
context.EmitStoreContext();
context.EmitLdc_I8(op.Imm);
context.Emit(OpCodes.Ret);
@ -40,7 +40,7 @@ namespace ChocolArm64.Instructions
{
IOpCode32BReg op = (IOpCode32BReg)context.CurrOp;
context.EmitStoreState();
context.EmitStoreContext();
EmitLoadFromRegister(context, op.Rm);