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Refactoring and optimization on CPU translation (#661)

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* Refactoring and optimization on CPU translation

* Remove now unused property

* Rename ilBlock -> block (local)

* Change equality comparison on RegisterMask for consistency

Co-Authored-By: gdkchan <gab.dark.100@gmail.com>

* Add back the aggressive inlining attribute to the Synchronize method

* Implement IEquatable on the Register struct

* Fix identation
This commit is contained in:
gdkchan 2019-04-26 01:55:12 -03:00 • committed by jduncanator
parent 2b8eac1bce
commit 8a7d99cdea
48 changed files with 1257 additions and 1280 deletions
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9
ChocolArm64/Instructions/InstEmitException.cs
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@ -1,4 +1,5 @@
using ChocolArm64.Decoders;
using ChocolArm64.IntermediateRepresentation;
using ChocolArm64.State;
using ChocolArm64.Translation;
using System.Reflection.Emit;
@ -21,7 +22,7 @@ namespace ChocolArm64.Instructions
{
OpCodeException64 op = (OpCodeException64)context.CurrOp;
context.EmitStoreState();
context.EmitStoreContext();
context.EmitLdarg(TranslatedSub.StateArgIdx);
@ -48,7 +49,7 @@ namespace ChocolArm64.Instructions
if (context.CurrBlock.Next != null)
{
context.EmitLoadState();
context.EmitLoadContext();
}
else
{
@ -62,7 +63,7 @@ namespace ChocolArm64.Instructions
{
OpCode64 op = context.CurrOp;
context.EmitStoreState();
context.EmitStoreContext();
context.EmitLdarg(TranslatedSub.StateArgIdx);
@ -73,7 +74,7 @@ namespace ChocolArm64.Instructions
if (context.CurrBlock.Next != null)
{
context.EmitLoadState();
context.EmitLoadContext();
}
else
{