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Add SHADD, SHSUB, UHSUB, SRHADD, URHADD, instructions; add 12 Tests. (#380)

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* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Instructions.cs

* Update CpuTestSimdReg.cs

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdCrypto.cs
This commit is contained in:
LDj3SNuD 2018-08-27 08:44:01 +02:00 • committed by gdkchan
parent 43c4e7c78d
commit 68300368d7
7 changed files with 775 additions and 53 deletions
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92
ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs
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@ -1042,6 +1042,28 @@ namespace ChocolArm64.Instruction
EmitVectorWidenRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Add));
}
public static void Shadd_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpSx(Context, () =>
{
Context.Emit(OpCodes.Add);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr);
});
}
public static void Shsub_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpSx(Context, () =>
{
Context.Emit(OpCodes.Sub);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr);
});
}
public static void Smax_V(AILEmitterCtx Context)
{
Type[] Types = new Type[] { typeof(long), typeof(long) };
@ -1181,6 +1203,20 @@ namespace ChocolArm64.Instruction
EmitVectorSaturatingNarrowOpSxZx(Context, () => { });
}
public static void Srhadd_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpSx(Context, () =>
{
Context.Emit(OpCodes.Add);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Add);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr);
});
}
public static void Ssubw_V(AILEmitterCtx Context)
{
EmitVectorWidenRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Sub));
@ -1303,28 +1339,20 @@ namespace ChocolArm64.Instruction
{
Context.Emit(OpCodes.Add);
Context.EmitLdc_I4(1);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr_Un);
});
}
public static void Umin_V(AILEmitterCtx Context)
public static void Uhsub_V(AILEmitterCtx Context)
{
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
EmitVectorBinaryOpZx(Context, () =>
{
Context.Emit(OpCodes.Sub);
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
EmitVectorBinaryOpZx(Context, () => Context.EmitCall(MthdInfo));
}
public static void Uminp_V(AILEmitterCtx Context)
{
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
EmitVectorPairwiseOpZx(Context, () => Context.EmitCall(MthdInfo));
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr_Un);
});
}
public static void Umax_V(AILEmitterCtx Context)
@ -1345,6 +1373,24 @@ namespace ChocolArm64.Instruction
EmitVectorPairwiseOpZx(Context, () => Context.EmitCall(MthdInfo));
}
public static void Umin_V(AILEmitterCtx Context)
{
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
EmitVectorBinaryOpZx(Context, () => Context.EmitCall(MthdInfo));
}
public static void Uminp_V(AILEmitterCtx Context)
{
Type[] Types = new Type[] { typeof(ulong), typeof(ulong) };
MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
EmitVectorPairwiseOpZx(Context, () => Context.EmitCall(MthdInfo));
}
public static void Umull_V(AILEmitterCtx Context)
{
EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
@ -1380,6 +1426,20 @@ namespace ChocolArm64.Instruction
EmitVectorSaturatingNarrowOpZxZx(Context, () => { });
}
public static void Urhadd_V(AILEmitterCtx Context)
{
EmitVectorBinaryOpZx(Context, () =>
{
Context.Emit(OpCodes.Add);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Add);
Context.Emit(OpCodes.Ldc_I4_1);
Context.Emit(OpCodes.Shr_Un);
});
}
public static void Usqadd_S(AILEmitterCtx Context)
{
EmitScalarSaturatingBinaryOpZx(Context, SaturatingFlags.Accumulate);