Implement remaining shader double-precision instructions (#2845)
* Implement remaining shader double-precision instructions * Shader cache version bump
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a0aa87366c
commit
650cc41c02
12 changed files with 282 additions and 121 deletions
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@ -11,6 +11,156 @@ namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void DsetR(EmitterContext context)
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{
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InstDsetR op = context.GetOp<InstDsetR>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcReg(context, op.SrcB, isFP64: true);
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EmitFset(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.Dest,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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op.BVal,
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op.WriteCC,
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isFP64: true);
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}
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public static void DsetI(EmitterContext context)
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{
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InstDsetI op = context.GetOp<InstDsetI>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcImm(context, Imm20ToFloat(op.Imm20), isFP64: true);
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EmitFset(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.Dest,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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op.BVal,
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op.WriteCC,
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isFP64: true);
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}
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public static void DsetC(EmitterContext context)
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{
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InstDsetC op = context.GetOp<InstDsetC>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset, isFP64: true);
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EmitFset(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.Dest,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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op.BVal,
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op.WriteCC,
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isFP64: true);
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}
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public static void DsetpR(EmitterContext context)
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{
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InstDsetpR op = context.GetOp<InstDsetpR>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcReg(context, op.SrcB, isFP64: true);
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EmitFsetp(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.DestPred,
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op.DestPredInv,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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writeCC: false,
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isFP64: true);
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}
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public static void DsetpI(EmitterContext context)
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{
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InstDsetpI op = context.GetOp<InstDsetpI>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcImm(context, Imm20ToFloat(op.Imm20), isFP64: true);
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EmitFsetp(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.DestPred,
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op.DestPredInv,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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writeCC: false,
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isFP64: true);
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}
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public static void DsetpC(EmitterContext context)
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{
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InstDsetpC op = context.GetOp<InstDsetpC>();
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var srcA = GetSrcReg(context, op.SrcA, isFP64: true);
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var srcB = GetSrcCbuf(context, op.CbufSlot, op.CbufOffset, isFP64: true);
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EmitFsetp(
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context,
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op.FComp,
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op.Bop,
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srcA,
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srcB,
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op.SrcPred,
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op.SrcPredInv,
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op.DestPred,
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op.DestPredInv,
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op.AbsA,
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op.AbsB,
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op.NegA,
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op.NegB,
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writeCC: false,
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isFP64: true);
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}
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public static void FcmpR(EmitterContext context)
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{
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InstFcmpR op = context.GetOp<InstFcmpR>();
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@ -240,12 +390,15 @@ namespace Ryujinx.Graphics.Shader.Instructions
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bool negateA,
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bool negateB,
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bool boolFloat,
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bool writeCC)
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bool writeCC,
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bool isFP64 = false)
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{
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srcA = context.FPAbsNeg(srcA, absoluteA, negateA);
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srcB = context.FPAbsNeg(srcB, absoluteB, negateB);
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Instruction fpType = isFP64 ? Instruction.FP64 : Instruction.FP32;
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Operand res = GetFPComparison(context, cmpOp, srcA, srcB);
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srcA = context.FPAbsNeg(srcA, absoluteA, negateA, fpType);
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srcB = context.FPAbsNeg(srcB, absoluteB, negateB, fpType);
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Operand res = GetFPComparison(context, cmpOp, srcA, srcB, fpType);
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Operand pred = GetPredicate(context, srcPred, srcPredInv);
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res = GetPredLogicalOp(context, logicOp, res, pred);
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@ -282,12 +435,15 @@ namespace Ryujinx.Graphics.Shader.Instructions
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bool absoluteB,
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bool negateA,
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bool negateB,
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bool writeCC)
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bool writeCC,
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bool isFP64 = false)
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{
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srcA = context.FPAbsNeg(srcA, absoluteA, negateA);
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srcB = context.FPAbsNeg(srcB, absoluteB, negateB);
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Instruction fpType = isFP64 ? Instruction.FP64 : Instruction.FP32;
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Operand p0Res = GetFPComparison(context, cmpOp, srcA, srcB);
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srcA = context.FPAbsNeg(srcA, absoluteA, negateA, fpType);
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srcB = context.FPAbsNeg(srcB, absoluteB, negateB, fpType);
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Operand p0Res = GetFPComparison(context, cmpOp, srcA, srcB, fpType);
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Operand p1Res = context.BitwiseNot(p0Res);
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Operand pred = GetPredicate(context, srcPred, srcPredInv);
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@ -367,7 +523,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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context.Copy(Register(destPredInv, RegisterType.Predicate), p1Res);
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}
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private static Operand GetFPComparison(EmitterContext context, FComp cond, Operand srcA, Operand srcB)
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private static Operand GetFPComparison(EmitterContext context, FComp cond, Operand srcA, Operand srcB, Instruction fpType = Instruction.FP32)
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{
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Operand res;
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@ -381,7 +537,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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}
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else if (cond == FComp.Nan || cond == FComp.Num)
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{
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res = context.BitwiseOr(context.IsNan(srcA), context.IsNan(srcB));
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res = context.BitwiseOr(context.IsNan(srcA, fpType), context.IsNan(srcB, fpType));
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if (cond == FComp.Num)
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{
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@ -404,12 +560,12 @@ namespace Ryujinx.Graphics.Shader.Instructions
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default: throw new ArgumentException($"Unexpected condition \"{cond}\".");
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}
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res = context.Add(inst | Instruction.FP32, Local(), srcA, srcB);
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res = context.Add(inst | fpType, Local(), srcA, srcB);
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if ((cond & FComp.Nan) != 0)
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{
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res = context.BitwiseOr(res, context.IsNan(srcA));
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res = context.BitwiseOr(res, context.IsNan(srcB));
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res = context.BitwiseOr(res, context.IsNan(srcA, fpType));
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res = context.BitwiseOr(res, context.IsNan(srcB, fpType));
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}
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}
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