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Misc. CPU improvements (#519)

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* Fix and simplify TranslatorCache

* Fix some assignment alignments, remove some unused usings

* Changes to ILEmitter, separate it from ILEmitterCtx

* Rename ILEmitter to ILMethodBuilder

* Rename LdrLit and *_Fix opcodes

* Revert TranslatorCache impl to the more performant one, fix a few issues with it

* Allow EmitOpCode to be called even after everything has been emitted

* Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point

* Remove unneeded temp use

* Add missing exit call on TestExclusive

* Use better hash

* Implement the == and != operators
This commit is contained in:
gdkchan 2018-12-10 22:58:52 -02:00 • committed by GitHub
parent f1529b1bc2
commit 36e8e074c9
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GPG key ID: 4AEE18F83AFDEB23
41 changed files with 943 additions and 915 deletions
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40
ChocolArm64/Decoders/Decoder.cs
View file

@ -28,11 +28,11 @@ namespace ChocolArm64.Decoders
return block;
}
public static (Block[] Graph, Block Root) DecodeSubroutine(
TranslatorCache cache,
CpuThreadState state,
MemoryManager memory,
long start)
public static Block DecodeSubroutine(
TranslatorCache cache,
CpuThreadState state,
MemoryManager memory,
long start)
{
Dictionary<long, Block> visited = new Dictionary<long, Block>();
Dictionary<long, Block> visitedEnd = new Dictionary<long, Block>();
@ -53,7 +53,7 @@ namespace ChocolArm64.Decoders
return output;
}
Block root = Enqueue(start);
Block entry = Enqueue(start);
while (blocks.Count > 0)
{
@ -118,33 +118,7 @@ namespace ChocolArm64.Decoders
visitedEnd.Add(current.EndPosition, current);
}
//Make and sort Graph blocks array by position.
Block[] graph = new Block[visited.Count];
while (visited.Count > 0)
{
ulong firstPos = ulong.MaxValue;
foreach (Block block in visited.Values)
{
if (firstPos > (ulong)block.Position)
firstPos = (ulong)block.Position;
}
Block current = visited[(long)firstPos];
do
{
graph[graph.Length - visited.Count] = current;
visited.Remove(current.Position);
current = current.Next;
}
while (current != null);
}
return (graph, root);
return entry;
}
private static void FillBlock(CpuThreadState state, MemoryManager memory, Block block)

5
ChocolArm64/Decoders/OpCodeAlu64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{
@ -12,8 +11,8 @@ namespace ChocolArm64.Decoders
public OpCodeAlu64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
Rd = (opCode >> 0) & 0x1f;
Rn = (opCode >> 5) & 0x1f;
Rd = (opCode >> 0) & 0x1f;
Rn = (opCode >> 5) & 0x1f;
DataOp = (DataOp)((opCode >> 24) & 0x3);
RegisterSize = (opCode >> 31) != 0

2
ChocolArm64/Decoders/OpCodeAluRs64.cs
View file

@ -22,7 +22,7 @@ namespace ChocolArm64.Decoders
Shift = shift;
Rm = (opCode >> 16) & 0x1f;
Rm = (opCode >> 16) & 0x1f;
ShiftType = (ShiftType)((opCode >> 22) & 0x3);
}
}

4
ChocolArm64/Decoders/OpCodeAluRx64.cs
View file

@ -11,9 +11,9 @@ namespace ChocolArm64.Decoders
public OpCodeAluRx64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
Shift = (opCode >> 10) & 0x7;
Shift = (opCode >> 10) & 0x7;
IntType = (IntType)((opCode >> 13) & 0x7);
Rm = (opCode >> 16) & 0x1f;
Rm = (opCode >> 16) & 0x1f;
}
}
}

1
ChocolArm64/Decoders/OpCodeBImmCmp64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{

4
ChocolArm64/Decoders/OpCodeCcmp64.cs
View file

@ -21,9 +21,9 @@ namespace ChocolArm64.Decoders
return;
}
Nzcv = (opCode >> 0) & 0xf;
Nzcv = (opCode >> 0) & 0xf;
Cond = (Cond)((opCode >> 12) & 0xf);
RmImm = (opCode >> 16) & 0x1f;
RmImm = (opCode >> 16) & 0x1f;
Rd = CpuThreadState.ZrIndex;
}

2
ChocolArm64/Decoders/OpCodeCsel64.cs
View file

@ -10,7 +10,7 @@ namespace ChocolArm64.Decoders
public OpCodeCsel64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
Rm = (opCode >> 16) & 0x1f;
Rm = (opCode >> 16) & 0x1f;
Cond = (Cond)((opCode >> 12) & 0xf);
}
}

2
ChocolArm64/Decoders/OpCodeMemImm64.cs
View file

@ -41,7 +41,7 @@ namespace ChocolArm64.Decoders
if (WBack || Unscaled)
{
//9-bits Signed Immediate.
Imm = (opCode << 43) >> 55;
Imm = (opCode << 11) >> 23;
}
else
{

6
ChocolArm64/Decoders/OpCodeMemReg64.cs
View file

@ -11,10 +11,10 @@ namespace ChocolArm64.Decoders
public OpCodeMemReg64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
Shift = ((opCode >> 12) & 0x1) != 0;
Shift = ((opCode >> 12) & 0x1) != 0;
IntType = (IntType)((opCode >> 13) & 0x7);
Rm = (opCode >> 16) & 0x1f;
Extend64 = ((opCode >> 22) & 0x3) == 2;
Rm = (opCode >> 16) & 0x1f;
Extend64 = ((opCode >> 22) & 0x3) == 2;
}
}
}

1
ChocolArm64/Decoders/OpCodeMov64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{

1
ChocolArm64/Decoders/OpCodeSimdCvt64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{

5
ChocolArm64/Decoders/OpCodeSimdImm64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{
@ -61,12 +60,12 @@ namespace ChocolArm64.Decoders
else if ((modeHigh & 0b110) == 0b100)
{
//16-bits shifted Immediate.
Size = 1; imm <<= (modeHigh & 1) << 3;
Size = 1; imm <<= (modeHigh & 1) << 3;
}
else if ((modeHigh & 0b100) == 0b000)
{
//32-bits shifted Immediate.
Size = 2; imm <<= modeHigh << 3;
Size = 2; imm <<= modeHigh << 3;
}
else if ((modeHigh & 0b111) == 0b110)
{

1
ChocolArm64/Decoders/OpCodeSimdMemMs64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{

1
ChocolArm64/Decoders/OpCodeSimdMemSs64.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
using ChocolArm64.State;
namespace ChocolArm64.Decoders
{

8
ChocolArm64/Decoders/ShiftType.cs
View file

@ -2,9 +2,9 @@ namespace ChocolArm64.Decoders
{
enum ShiftType
{
Lsl,
Lsr,
Asr,
Ror
Lsl = 0,
Lsr = 1,
Asr = 2,
Ror = 3
}
}