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Implement Shader Instructions SUATOM and SURED (#2090)

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* Initial Implementation

* Further improvements (no support for float/64-bit types)

* Merge atomic and reduce instructions, add missing format switch

* Fix rebase issues.

* Not used.

* Whoops. Fixed.

* Partial implementation of inc/dec, cleanup and TODOs

* Remove testing path

* Address Feedback
This commit is contained in:
riperiperi 2021-08-31 06:51:57 +01:00 • committed by GitHub
parent 416dc8fde4
commit 142cededd4
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16 changed files with 510 additions and 18 deletions
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44
Ryujinx.Graphics.Shader/Decoders/OpCodeSured.cs Normal file
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using Ryujinx.Graphics.Shader.Instructions;
namespace Ryujinx.Graphics.Shader.Decoders
{
enum ClampMode
{
Ignore = 0,
Trap = 2
}
class OpCodeSured : OpCodeTextureBase
{
public Register Ra { get; }
public Register Rb { get; }
public Register Rc { get; }
public ReductionType Type { get; }
public AtomicOp AtomicOp { get; }
public ImageDimensions Dimensions { get; }
public ClampMode ClampMode { get; }
public bool UseType { get; }
public bool IsBindless { get; }
public bool ByteAddress { get; }
public new static OpCode Create(InstEmitter emitter, ulong address, long opCode) => new OpCodeSured(emitter, address, opCode);
public OpCodeSured(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
{
Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
Rb = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
Rc = new Register(opCode.Extract(39, 8), RegisterType.Gpr);
Type = (ReductionType)opCode.Extract(20, 3);
ByteAddress = opCode.Extract(23);
AtomicOp = (AtomicOp)opCode.Extract(24, 3);
Dimensions = (ImageDimensions)opCode.Extract(33, 3);
ClampMode = (ClampMode)opCode.Extract(49, 2);
IsBindless = !opCode.Extract(51);
UseType = opCode.Extract(52);
}
}
}