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Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)

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* Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths).

No test provided (i.e. draft).

* Ptc InternalVersion = 1577
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LDj3SNuD 2020-10-13 22:41:33 +02:00 • committed by GitHub
parent 329ba5b39b
commit 04e330cc00
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GPG key ID: 4AEE18F83AFDEB23
10 changed files with 171 additions and 15 deletions
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25
ARMeilleure/Decoders/OpCode32SimdShImm.cs
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@ -2,34 +2,33 @@
{
class OpCode32SimdShImm : OpCode32Simd
{
public int Immediate { get; private set; }
public int Shift { get; private set; }
public OpCode32SimdShImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
Immediate = (opCode >> 16) & 0x3f;
var limm = ((opCode >> 1) & 0x40) | Immediate;
int imm6 = (opCode >> 16) & 0x3f;
int limm6 = ((opCode >> 1) & 0x40) | imm6;
if ((limm & 0x40) == 0b1000000)
if ((limm6 & 0x40) == 0b1000000)
{
Size = 3;
Shift = Immediate;
}
else if ((limm & 0x60) == 0b0100000)
Shift = imm6;
}
else if ((limm6 & 0x60) == 0b0100000)
{
Size = 2;
Shift = Immediate - 32;
Shift = imm6 - 32;
}
else if ((limm & 0x70) == 0b0010000)
else if ((limm6 & 0x70) == 0b0010000)
{
Size = 1;
Shift = Immediate - 16;
Shift = imm6 - 16;
}
else if ((limm & 0x78) == 0b0001000)
else if ((limm6 & 0x78) == 0b0001000)
{
Size = 0;
Shift = Immediate - 8;
}
Shift = imm6 - 8;
}
else
{
Instruction = InstDescriptor.Undefined;