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Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)

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* Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths).

No test provided (i.e. draft).

* Ptc InternalVersion = 1577
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LDj3SNuD 2020-10-13 22:41:33 +02:00 • committed by GitHub
parent 329ba5b39b
commit 04e330cc00
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10 changed files with 171 additions and 15 deletions
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7
ARMeilleure/Decoders/OpCode32SimdRegLong.cs
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@ -8,7 +8,14 @@
{
Q = false;
RegisterSize = RegisterSize.Simd64;
Polynomial = ((opCode >> 9) & 0x1) != 0;
// Subclasses have their own handling of Vx to account for before checking.
if (GetType() == typeof(OpCode32SimdRegLong) && DecoderHelper.VectorArgumentsInvalid(true, Vd))
{
Instruction = InstDescriptor.Undefined;
}
}
}
}