More reliable .d file generation
Also generated inside the obj dir instead of separate deps folder.
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@ -278,7 +278,7 @@ LST = $(patsubst %.c,$(OBJDIR)/%.lst,$(patsubst %.cpp,$(OBJDIR)/%.lst,$(patsubst
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# Compiler flags to generate dependency files.
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#GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d
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GENDEPFLAGS = -MMD -MP -MF $(BUILD_DIR)/.dep/$(subst /,_,$(subst $(BUILD_DIR)/,,$@)).d
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GENDEPFLAGS = -MMD -MP -MF $(patsubst %.o,%.td,$@)
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# Combine all necessary flags and optional flags.
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@ -288,6 +288,8 @@ ALL_CFLAGS = $(MCUFLAGS) $(CFLAGS) $(GENDEPFLAGS) $(EXTRAFLAGS)
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ALL_CPPFLAGS = $(MCUFLAGS) -x c++ $(CPPFLAGS) $(GENDEPFLAGS) $(EXTRAFLAGS)
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ALL_ASFLAGS = $(MCUFLAGS) -x assembler-with-cpp $(ASFLAGS) $(EXTRAFLAGS)
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MOVE_DEP = mv -f $(patsubst %.o,%.td,$@) $(patsubst %.o,%.d,$@)
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# Default target.
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all: build sizeafter
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@ -390,17 +392,17 @@ BEGIN = gccversion check_submodule sizebefore
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define GEN_OBJRULE
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# Compile: create object files from C source files.
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$1/%.o : %.c | $(BEGIN)
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$1/%.o : %.c $1/%.d | $(BEGIN)
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@mkdir -p $$(@D)
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@$$(SILENT) || printf "$$(MSG_COMPILING) $$<" | $$(AWK_CMD)
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$$(eval CMD=$$(CC) -c $$(ALL_CFLAGS) $$< -o $$@)
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$$(eval CMD=$$(CC) -c $$(ALL_CFLAGS) $$< -o $$@ && $$(MOVE_DEP))
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@$$(BUILD_CMD)
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# Compile: create object files from C++ source files.
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$1/%.o : %.cpp | $(BEGIN)
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$1/%.o : %.cpp $1/%.d | $(BEGIN)
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@mkdir -p $$(@D)
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@$$(SILENT) || printf "$$(MSG_COMPILING_CPP) $$<" | $$(AWK_CMD)
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$$(eval CMD=$$(CC) -c $$(ALL_CPPFLAGS) $$< -o $$@)
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$$(eval CMD=$$(CC) -c $$(ALL_CPPFLAGS) $$< -o $$@ && $$(MOVE_DEP))
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@$(BUILD_CMD)
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# Assemble: create object files from assembler source files.
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@ -409,9 +411,15 @@ $1/%.o : %.S | $(BEGIN)
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@$(SILENT) || printf "$$(MSG_ASSEMBLING) $$<" | $$(AWK_CMD)
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$$(eval CMD=$$(CC) -c $$(ALL_ASFLAGS) $$< -o $$@)
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@$$(BUILD_CMD)
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endef
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# We have to use static rules for the .d files for some reason
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DEPS = $(patsubst %.o,%.d,$(OBJ))
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# Keep the .d files
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.PRECIOUS: $(DEPS)
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# Empty rule to force recompilation if the .d file is missing
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$(DEPS):
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# Since the object files could be in two different folders, generate
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# separate rules for them, rather than having too generic rules
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$(eval $(call GEN_OBJRULE,$(OBJDIR)))
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@ -434,7 +442,7 @@ $(eval $(call GEN_OBJRULE,$(KBOBJDIR)))
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$(CC) -E -mmcu=$(MCU) $(CFLAGS) $< -o $@
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# Target: clean project.
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clean:
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clean:
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show_path:
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@echo VPATH=$(VPATH)
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@ -515,7 +523,7 @@ $(shell mkdir $(OBJDIR) 2>/dev/null)
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$(shell mkdir $(KBOBJDIR) 2>/dev/null)
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# Include the dependency files.
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-include $(shell mkdir $(BUILD_DIR)/.dep 2>/dev/null) $(wildcard $(BUILD_DIR)/.dep/*)
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-include $(patsubst %.o,%.d,$(OBJ))
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# Listing of phony targets.
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