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[Core] Add support for RISC-V builds and GD32VF103 MCU (#12508)

* Add support for RISC-V builds and GD32VF103 MCU

* Add toolchain selection in chibios.mk based on the mcu selected in
mcu_selection.mk
* Reorder and added comments to chibios.mk to have a streamlined makefile
* Add GD32VF103 mcu to possible targets for QMK.
* Add STM32 compatibility for GD32VF103 MCU, this is hacky but more efficent
  then rewriting every driver.
* Add GigaDevice DFU bootloader as flash target, please note that
  dfu-util of at least version 0.10 is needed.
* Add analog driver compatibility
* Add apa102 bitbang driver compatibility
* Add ws2812 bitbang driver compatibility
* Add eeprom in flash emulation compatibility
* Allow faster re-builds with ccache

* Add SiPeed Longan Nano to platform files

* Add SiPeed Longan Nano Onekeys

* Make quine compatible with other bootloaders

* Support builds with picolibc

* Add risc-v toolchain to arch and debian/ubuntu scripts
This commit is contained in:
Stefan Kerkmann 2021-10-18 07:23:20 +02:00 committed by GitHub
parent 7e3ff206b8
commit e50867d52d
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
31 changed files with 900 additions and 122 deletions

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@ -95,6 +95,28 @@ void enter_bootloader_mode_if_requested(void) {
}
}
#elif defined(GD32VF103)
# define DBGMCU_KEY_UNLOCK 0x4B5A6978
# define DBGMCU_CMD_RESET 0x1
__IO uint32_t *DBGMCU_KEY = (uint32_t *)DBGMCU_BASE + 0x0CU;
__IO uint32_t *DBGMCU_CMD = (uint32_t *)DBGMCU_BASE + 0x08U;
__attribute__((weak)) void bootloader_jump(void) {
/* The MTIMER unit of the GD32VF103 doesn't have the MSFRST
* register to generate a software reset request.
* BUT instead two undocumented registers in the debug peripheral
* that allow issueing a software reset. WHO would need the MSFRST
* register anyway? Source:
* https://github.com/esmil/gd32vf103inator/blob/master/include/gd32vf103/dbg.h */
*DBGMCU_KEY = DBGMCU_KEY_UNLOCK;
*DBGMCU_CMD = DBGMCU_CMD_RESET;
}
void enter_bootloader_mode_if_requested(void) { /* Jumping to bootloader is not possible from user code. */
}
#elif defined(KL2x) || defined(K20x) || defined(MK66F18) || defined(MIMXRT1062) // STM32_BOOTLOADER_DUAL_BANK // STM32_BOOTLOADER_ADDRESS
/* Kinetis */

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@ -39,6 +39,25 @@
# endif
#endif
// GD32 compatibility
#if defined(MCU_GD32V)
# define CPU_CLOCK GD32_SYSCLK
# if defined(GD32VF103)
# define USE_GPIOV1
# define USE_I2CV1
# define PAL_MODE_ALTERNATE_OPENDRAIN PAL_MODE_GD32_ALTERNATE_OPENDRAIN
# define PAL_MODE_ALTERNATE_PUSHPULL PAL_MODE_GD32_ALTERNATE_PUSHPULL
# endif
#endif
#if defined(GD32VF103)
/* This chip has the same API as STM32F103, but uses different names for literally the same thing.
* As of 4.7.2021 QMK is tailored to use STM32 defines/names, for compatibility sake
* we just redefine the GD32 names. */
# include "gd32v_compatibility.h"
#endif
// teensy compatibility
#if defined(MCU_KINETIS)
# define CPU_CLOCK KINETIS_SYSCLK_FREQUENCY

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@ -18,7 +18,7 @@
#include <hal.h>
#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT)
# if defined(STM32F103xB) || defined(STM32F042x6)
# if defined(STM32F103xB) || defined(STM32F042x6) || defined(GD32VF103C8) || defined(GD32VF103CB)
# ifndef FEE_PAGE_SIZE
# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte
# endif
@ -45,7 +45,9 @@
#if !defined(FEE_MCU_FLASH_SIZE)
# if defined(STM32F042x6)
# define FEE_MCU_FLASH_SIZE 32 // Size in Kb
# elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB)
# elif defined(GD32VF103C8)
# define FEE_MCU_FLASH_SIZE 64 // Size in Kb
# elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB) || defined(GD32VF103CB)
# define FEE_MCU_FLASH_SIZE 128 // Size in Kb
# elif defined(STM32F303xC) || defined(STM32F401xC)
# define FEE_MCU_FLASH_SIZE 256 // Size in Kb

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@ -23,6 +23,11 @@
# define FLASH_SR_WRPERR FLASH_SR_WRPRTERR
#endif
#if defined(MCU_GD32V)
/* GigaDevice GD32VF103 is a STM32F103 clone at heart. */
# include "gd32v_compatibility.h"
#endif
#if defined(STM32F4XX)
# define FLASH_SR_PGERR (FLASH_SR_PGSERR | FLASH_SR_PGPERR | FLASH_SR_PGAERR)

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@ -0,0 +1,120 @@
/* Copyright 2021 QMK
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
/* GD32VF103 has the same API as STM32F103, but uses different names for literally the same thing.
* As of 23.7.2021 QMK is tailored to use STM32 defines/names, for compatibility sake
* we just redefine the GD32 names. */
/* Close your eyes kids. */
#define MCU_STM32
/* AFIO redefines */
#define MAPR PCF0
#define AFIO_MAPR_USART1_REMAP AFIO_PCF0_USART0_REMAP
#define AFIO_MAPR_USART2_REMAP AFIO_PCF0_USART1_REMAP
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP AFIO_PCF0_USART2_REMAP_PARTIALREMAP
#define AFIO_MAPR_USART3_REMAP_FULLREMAP AFIO_PCF0_USART2_REMAP_FULLREMAP
/* DMA redefines. */
#define STM32_DMA_STREAM(stream) GD32_DMA_STREAM(stream)
#define STM32_DMA_STREAM_ID(peripheral, channel) GD32_DMA_STREAM_ID(peripheral - 1, channel - 1)
#define STM32_DMA_CR_DIR_M2P GD32_DMA_CTL_DIR_M2P
#define STM32_DMA_CR_PSIZE_WORD GD32_DMA_CTL_PWIDTH_WORD
#define STM32_DMA_CR_MSIZE_WORD GD32_DMA_CTL_MWIDTH_WORD
#define STM32_DMA_CR_MINC GD32_DMA_CTL_MNAGA
#define STM32_DMA_CR_CIRC GD32_DMA_CTL_CMEN
#define STM32_DMA_CR_PL GD32_DMA_CTL_PRIO
#define STM32_DMA_CR_CHSEL GD32_DMA_CTL_CHSEL
#define cr1 ctl0
#define cr2 ctl1
#define cr3 ctl2
#define dier dmainten
/* ADC redefines */
#if HAL_USE_ADC
# define STM32_ADC_USE_ADC1 GD32_ADC_USE_ADC0
# define smpr1 sampt0
# define smpr2 sampt1
# define sqr1 rsq0
# define sqr2 rsq1
# define sqr3 rsq2
# define ADC_SMPR2_SMP_AN0 ADC_SAMPT1_SMP_SPT0
# define ADC_SMPR2_SMP_AN1 ADC_SAMPT1_SMP_SPT1
# define ADC_SMPR2_SMP_AN2 ADC_SAMPT1_SMP_SPT2
# define ADC_SMPR2_SMP_AN3 ADC_SAMPT1_SMP_SPT3
# define ADC_SMPR2_SMP_AN4 ADC_SAMPT1_SMP_SPT4
# define ADC_SMPR2_SMP_AN5 ADC_SAMPT1_SMP_SPT5
# define ADC_SMPR2_SMP_AN6 ADC_SAMPT1_SMP_SPT6
# define ADC_SMPR2_SMP_AN7 ADC_SAMPT1_SMP_SPT7
# define ADC_SMPR2_SMP_AN8 ADC_SAMPT1_SMP_SPT8
# define ADC_SMPR2_SMP_AN9 ADC_SAMPT1_SMP_SPT9
# define ADC_SMPR1_SMP_AN10 ADC_SAMPT0_SMP_SPT10
# define ADC_SMPR1_SMP_AN11 ADC_SAMPT0_SMP_SPT11
# define ADC_SMPR1_SMP_AN12 ADC_SAMPT0_SMP_SPT12
# define ADC_SMPR1_SMP_AN13 ADC_SAMPT0_SMP_SPT13
# define ADC_SMPR1_SMP_AN14 ADC_SAMPT0_SMP_SPT14
# define ADC_SMPR1_SMP_AN15 ADC_SAMPT0_SMP_SPT15
# define ADC_SQR3_SQ1_N ADC_RSQ2_RSQ1_N
#endif
/* FLASH redefines */
#if defined(EEPROM_ENABLE)
# define SR STAT
# define FLASH_SR_BSY FLASH_STAT_BUSY
# define FLASH_SR_PGERR FLASH_STAT_PGERR
# define FLASH_SR_EOP FLASH_STAT_ENDF
# define FLASH_SR_WRPRTERR FLASH_STAT_WPERR
# define FLASH_SR_WRPERR FLASH_SR_WRPRTERR
# define FLASH_OBR_OPTERR FLASH_OBSTAT_OBERR
# define AR ADDR
# define CR CTL
# define FLASH_CR_PER FLASH_CTL_PER
# define FLASH_CR_STRT FLASH_CTL_START
# define FLASH_CR_LOCK FLASH_CTL_LK
# define FLASH_CR_PG FLASH_CTL_PG
# define KEYR KEY
#endif
/* Serial USART redefines. */
#if HAL_USE_SERIAL
# if !defined(SERIAL_USART_CR1)
# define SERIAL_USART_CR1 (USART_CTL0_PCEN | USART_CTL0_PM | USART_CTL0_WL) // parity enable, odd parity, 9 bit length
# endif
# if !defined(SERIAL_USART_CR2)
# define SERIAL_USART_CR2 (USART_CTL1_STB_1) // 2 stop bits
# endif
# if !defined(SERIAL_USART_CR3)
# define SERIAL_USART_CR3 0x0
# endif
# define USART_CR3_HDSEL USART_CTL2_HDEN
# define CCR CHCV
#endif
/* SPI redefines. */
#if HAL_USE_SPI
# define SPI_CR1_LSBFIRST SPI_CTL0_LF
# define SPI_CR1_CPHA SPI_CTL0_CKPH
# define SPI_CR1_CPOL SPI_CTL0_CKPL
# define SPI_CR1_BR_0 SPI_CTL0_PSC_0
# define SPI_CR1_BR_1 SPI_CTL0_PSC_1
# define SPI_CR1_BR_2 SPI_CTL0_PSC_2
#endif

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@ -18,6 +18,12 @@
#include <sys/stat.h>
#include <sys/types.h>
/* To compile the ChibiOS syscall stubs with picolibc
* the _reent struct has to be defined. */
#if defined(USE_PICOLIBC)
struct _reent;
#endif
#pragma GCC diagnostic ignored "-Wmissing-prototypes"
__attribute__((weak, used)) int _open_r(struct _reent *r, const char *path, int flag, int m) {