Initial arm->chibios pass - simplify some platform logic (#8450)
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21 changed files with 15 additions and 29 deletions
276
drivers/chibios/analog.c
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276
drivers/chibios/analog.c
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/* Copyright 2019 Drew Mills
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "quantum.h"
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#include "analog.h"
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#include "ch.h"
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#include <hal.h>
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#if !HAL_USE_ADC
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# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
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#endif
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#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4
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# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
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#endif
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#if STM32_ADC_DUAL_MODE
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# error "STM32 ADC Dual Mode is not supported at this time."
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#endif
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#if STM32_ADCV3_OVERSAMPLING
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# error "STM32 ADCV3 Oversampling is not supported at this time."
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#endif
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// Otherwise assume V3
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#if defined(STM32F0XX) || defined(STM32L0XX)
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# define USE_ADCV1
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#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
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# define USE_ADCV2
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#endif
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// BODGE to make v2 look like v1,3 and 4
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#ifdef USE_ADCV2
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480
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# endif
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5
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# endif
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// we still sample at 12bit, but scale down to the requested bit range
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# define ADC_CFGR1_RES_12BIT 12
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# define ADC_CFGR1_RES_10BIT 10
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# define ADC_CFGR1_RES_8BIT 8
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# define ADC_CFGR1_RES_6BIT 6
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#endif
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/* User configurable ADC options */
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#ifndef ADC_COUNT
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# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX)
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# define ADC_COUNT 1
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# elif defined(STM32F3XX)
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# define ADC_COUNT 4
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# else
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# error "ADC_COUNT has not been set for this ARM microcontroller."
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# endif
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#endif
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#ifndef ADC_NUM_CHANNELS
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# define ADC_NUM_CHANNELS 1
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#elif ADC_NUM_CHANNELS != 1
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# error "The ARM ADC implementation currently only supports reading one channel at a time."
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#endif
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#ifndef ADC_BUFFER_DEPTH
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# define ADC_BUFFER_DEPTH 1
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#endif
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// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
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#ifndef ADC_SAMPLING_RATE
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# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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#endif
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// Options are 12, 10, 8, and 6 bit.
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#ifndef ADC_RESOLUTION
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# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
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#endif
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static ADCConfig adcCfg = {};
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static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
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// Initialize to max number of ADCs, set to empty object to initialize all to false.
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static bool adcInitialized[ADC_COUNT] = {};
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// TODO: add back TR handling???
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static ADCConversionGroup adcConversionGroup = {
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.circular = FALSE,
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.num_channels = (uint16_t)(ADC_NUM_CHANNELS),
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#if defined(USE_ADCV1)
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.cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
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.smpr = ADC_SAMPLING_RATE,
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#elif defined(USE_ADCV2)
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# if !defined(STM32F1XX)
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.cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
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# endif
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.smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
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.smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
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#else
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.cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
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.smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
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#endif
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};
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// clang-format off
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__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
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switch (pin) {
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#if defined(STM32F0XX)
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case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
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case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
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case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
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case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
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case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
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case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
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case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
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case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
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case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
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case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
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case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
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case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
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case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
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case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
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case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
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case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
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#elif defined(STM32F3XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN1, 1 );
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case A5: return TO_MUX( ADC_CHANNEL_IN2, 1 );
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case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
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case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
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case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
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case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
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case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
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case B12: return TO_MUX( ADC_CHANNEL_IN2, 3 );
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case B13: return TO_MUX( ADC_CHANNEL_IN3, 3 );
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case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
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case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
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case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
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case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
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case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
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case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
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case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
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case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
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case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
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case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
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case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
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case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
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case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
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case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
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case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
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case E7: return TO_MUX( ADC_CHANNEL_IN13, 2 );
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case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
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case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
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case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 );
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case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 );
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case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 );
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case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
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case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
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case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
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case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
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case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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#elif defined(STM32F4XX) // TODO: add all pins
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case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
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//case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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#elif defined(STM32F1XX) // TODO: add all pins
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case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
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#endif
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}
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// return an adc that would never be used so intToADCDriver will bail out
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return TO_MUX(0, 0xFF);
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}
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// clang-format on
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static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
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switch (adcInt) {
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#if STM32_ADC_USE_ADC1
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case 0:
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return &ADCD1;
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#endif
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#if STM32_ADC_USE_ADC2
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case 1:
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return &ADCD2;
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#endif
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#if STM32_ADC_USE_ADC3
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case 2:
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return &ADCD3;
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#endif
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#if STM32_ADC_USE_ADC4
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case 3:
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return &ADCD4;
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#endif
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}
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return NULL;
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}
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static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
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if (!adcInitialized[adc]) {
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adcStart(adcDriver, &adcCfg);
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adcInitialized[adc] = true;
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}
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}
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int16_t analogReadPin(pin_t pin) {
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palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
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return adc_read(pinToMux(pin));
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}
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int16_t analogReadPinAdc(pin_t pin, uint8_t adc) {
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palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
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adc_mux target = pinToMux(pin);
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target.adc = adc;
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return adc_read(target);
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}
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int16_t adc_read(adc_mux mux) {
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#if defined(USE_ADCV1)
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// TODO: fix previous assumption of only 1 input...
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adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
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#elif defined(USE_ADCV2)
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adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
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#else
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adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
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#endif
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ADCDriver* targetDriver = intToADCDriver(mux.adc);
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if (!targetDriver) {
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return 0;
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}
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manageAdcInitializationDriver(mux.adc, targetDriver);
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if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) {
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return 0;
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}
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#ifdef USE_ADCV2
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// fake 12-bit -> N-bit scale
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return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
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#else
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// already handled as part of adcConvert
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return *sampleBuffer;
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#endif
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}
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41
drivers/chibios/analog.h
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41
drivers/chibios/analog.h
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/* Copyright 2019 Drew Mills
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <stdint.h>
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#include "quantum.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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uint16_t input;
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uint8_t adc;
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} adc_mux;
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#define TO_MUX(i, a) \
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(adc_mux) { i, a }
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int16_t analogReadPin(pin_t pin);
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int16_t analogReadPinAdc(pin_t pin, uint8_t adc);
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adc_mux pinToMux(pin_t pin);
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int16_t adc_read(adc_mux mux);
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#ifdef __cplusplus
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}
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#endif
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114
drivers/chibios/i2c_master.c
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114
drivers/chibios/i2c_master.c
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/* Copyright 2018 Jack Humbert
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* Copyright 2018 Yiancar
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This library is only valid for STM32 processors.
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* This library follows the convention of the AVR i2c_master library.
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* As a result addresses are expected to be already shifted (addr << 1).
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* I2CD1 is the default driver which corresponds to pins B6 and B7. This
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* can be changed.
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* Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
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* STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used
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* but using any other I2C pins should be trivial.
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*/
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#include "quantum.h"
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#include "i2c_master.h"
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#include <string.h>
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#include <hal.h>
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static uint8_t i2c_address;
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static const I2CConfig i2cconfig = {
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#ifdef USE_I2CV1
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I2C1_OPMODE,
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I2C1_CLOCK_SPEED,
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I2C1_DUTY_CYCLE,
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#else
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// This configures the I2C clock to 400khz assuming a 72Mhz clock
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// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
|
||||
STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
|
||||
#endif
|
||||
};
|
||||
|
||||
static i2c_status_t chibios_to_qmk(const msg_t* status) {
|
||||
switch (*status) {
|
||||
case I2C_NO_ERROR:
|
||||
return I2C_STATUS_SUCCESS;
|
||||
case I2C_TIMEOUT:
|
||||
return I2C_STATUS_TIMEOUT;
|
||||
// I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
|
||||
default:
|
||||
return I2C_STATUS_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((weak)) void i2c_init(void) {
|
||||
// Try releasing special pins for a short time
|
||||
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
|
||||
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
|
||||
|
||||
chThdSleepMilliseconds(10);
|
||||
#if defined(USE_GPIOV1)
|
||||
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
|
||||
#else
|
||||
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
|
||||
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
|
||||
#endif
|
||||
}
|
||||
|
||||
i2c_status_t i2c_start(uint8_t address) {
|
||||
i2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
return I2C_STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = address;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = devaddr;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
|
||||
uint8_t complete_packet[length + 1];
|
||||
for (uint8_t i = 0; i < length; i++) {
|
||||
complete_packet[i + 1] = data[i];
|
||||
}
|
||||
complete_packet[0] = regaddr;
|
||||
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
|
||||
i2c_address = devaddr;
|
||||
i2cStart(&I2C_DRIVER, &i2cconfig);
|
||||
msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, TIME_MS2I(timeout));
|
||||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
void i2c_stop(void) { i2cStop(&I2C_DRIVER); }
|
106
drivers/chibios/i2c_master.h
Normal file
106
drivers/chibios/i2c_master.h
Normal file
|
@ -0,0 +1,106 @@
|
|||
/* Copyright 2018 Jack Humbert
|
||||
* Copyright 2018 Yiancar
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/* This library follows the convention of the AVR i2c_master library.
|
||||
* As a result addresses are expected to be already shifted (addr << 1).
|
||||
* I2CD1 is the default driver which corresponds to pins B6 and B7. This
|
||||
* can be changed.
|
||||
* Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
|
||||
* STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file.
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include "ch.h"
|
||||
#include <hal.h>
|
||||
|
||||
#ifdef I2C1_BANK
|
||||
# define I2C1_SCL_BANK I2C1_BANK
|
||||
# define I2C1_SDA_BANK I2C1_BANK
|
||||
#endif
|
||||
|
||||
#ifndef I2C1_SCL_BANK
|
||||
# define I2C1_SCL_BANK GPIOB
|
||||
#endif
|
||||
|
||||
#ifndef I2C1_SDA_BANK
|
||||
# define I2C1_SDA_BANK GPIOB
|
||||
#endif
|
||||
|
||||
#ifndef I2C1_SCL
|
||||
# define I2C1_SCL 6
|
||||
#endif
|
||||
#ifndef I2C1_SDA
|
||||
# define I2C1_SDA 7
|
||||
#endif
|
||||
|
||||
#ifdef USE_I2CV1
|
||||
# ifndef I2C1_OPMODE
|
||||
# define I2C1_OPMODE OPMODE_I2C
|
||||
# endif
|
||||
# ifndef I2C1_CLOCK_SPEED
|
||||
# define I2C1_CLOCK_SPEED 100000 /* 400000 */
|
||||
# endif
|
||||
# ifndef I2C1_DUTY_CYCLE
|
||||
# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
|
||||
# endif
|
||||
#else
|
||||
// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
|
||||
// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
|
||||
# ifndef I2C1_TIMINGR_PRESC
|
||||
# define I2C1_TIMINGR_PRESC 0U
|
||||
# endif
|
||||
# ifndef I2C1_TIMINGR_SCLDEL
|
||||
# define I2C1_TIMINGR_SCLDEL 7U
|
||||
# endif
|
||||
# ifndef I2C1_TIMINGR_SDADEL
|
||||
# define I2C1_TIMINGR_SDADEL 0U
|
||||
# endif
|
||||
# ifndef I2C1_TIMINGR_SCLH
|
||||
# define I2C1_TIMINGR_SCLH 38U
|
||||
# endif
|
||||
# ifndef I2C1_TIMINGR_SCLL
|
||||
# define I2C1_TIMINGR_SCLL 129U
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifndef I2C_DRIVER
|
||||
# define I2C_DRIVER I2CD1
|
||||
#endif
|
||||
|
||||
#ifndef USE_GPIOV1
|
||||
// The default PAL alternate modes are used to signal that the pins are used for I2C
|
||||
# ifndef I2C1_SCL_PAL_MODE
|
||||
# define I2C1_SCL_PAL_MODE 4
|
||||
# endif
|
||||
# ifndef I2C1_SDA_PAL_MODE
|
||||
# define I2C1_SDA_PAL_MODE 4
|
||||
# endif
|
||||
#endif
|
||||
|
||||
typedef int16_t i2c_status_t;
|
||||
|
||||
#define I2C_STATUS_SUCCESS (0)
|
||||
#define I2C_STATUS_ERROR (-1)
|
||||
#define I2C_STATUS_TIMEOUT (-2)
|
||||
|
||||
void i2c_init(void);
|
||||
i2c_status_t i2c_start(uint8_t address);
|
||||
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
|
||||
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
|
||||
i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
|
||||
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
|
||||
void i2c_stop(void);
|
95
drivers/chibios/ws2812.c
Normal file
95
drivers/chibios/ws2812.c
Normal file
|
@ -0,0 +1,95 @@
|
|||
#include "quantum.h"
|
||||
#include "ws2812.h"
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
|
||||
/* Adapted from https://github.com/bigjosh/SimpleNeoPixelDemo/ */
|
||||
|
||||
#ifndef NOP_FUDGE
|
||||
# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX)
|
||||
# define NOP_FUDGE 0.4
|
||||
# else
|
||||
# error("NOP_FUDGE configuration required")
|
||||
# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#define NUMBER_NOPS 6
|
||||
#define CYCLES_PER_SEC (STM32_SYSCLK / NUMBER_NOPS * NOP_FUDGE)
|
||||
#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
|
||||
#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC)
|
||||
#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE)
|
||||
|
||||
#define wait_ns(x) \
|
||||
do { \
|
||||
for (int i = 0; i < NS_TO_CYCLES(x); i++) { \
|
||||
__asm__ volatile("nop\n\t" \
|
||||
"nop\n\t" \
|
||||
"nop\n\t" \
|
||||
"nop\n\t" \
|
||||
"nop\n\t" \
|
||||
"nop\n\t"); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
// These are the timing constraints taken mostly from the WS2812 datasheets
|
||||
// These are chosen to be conservative and avoid problems rather than for maximum throughput
|
||||
|
||||
#define T1H 900 // Width of a 1 bit in ns
|
||||
#define T1L (1250 - T1H) // Width of a 1 bit in ns
|
||||
|
||||
#define T0H 350 // Width of a 0 bit in ns
|
||||
#define T0L (1250 - T0H) // Width of a 0 bit in ns
|
||||
|
||||
// The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased
|
||||
// to values like 600000 ns. If it is too small, the pixels will show nothing most of the time.
|
||||
#define RES 10000 // Width of the low gap between bits to cause a frame to latch
|
||||
|
||||
void sendByte(uint8_t byte) {
|
||||
// WS2812 protocol wants most significant bits first
|
||||
for (unsigned char bit = 0; bit < 8; bit++) {
|
||||
bool is_one = byte & (1 << (7 - bit));
|
||||
// using something like wait_ns(is_one ? T1L : T0L) here throws off timings
|
||||
if (is_one) {
|
||||
// 1
|
||||
writePinHigh(RGB_DI_PIN);
|
||||
wait_ns(T1H);
|
||||
writePinLow(RGB_DI_PIN);
|
||||
wait_ns(T1L);
|
||||
} else {
|
||||
// 0
|
||||
writePinHigh(RGB_DI_PIN);
|
||||
wait_ns(T0H);
|
||||
writePinLow(RGB_DI_PIN);
|
||||
wait_ns(T0L);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void ws2812_init(void) { setPinOutput(RGB_DI_PIN); }
|
||||
|
||||
// Setleds for standard RGB
|
||||
void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) {
|
||||
static bool s_init = false;
|
||||
if (!s_init) {
|
||||
ws2812_init();
|
||||
s_init = true;
|
||||
}
|
||||
|
||||
// this code is very time dependent, so we need to disable interrupts
|
||||
chSysLock();
|
||||
|
||||
for (uint8_t i = 0; i < leds; i++) {
|
||||
// WS2812 protocol dictates grb order
|
||||
sendByte(ledarray[i].g);
|
||||
sendByte(ledarray[i].r);
|
||||
sendByte(ledarray[i].b);
|
||||
#ifdef RGBW
|
||||
sendByte(ledarray[i].w);
|
||||
#endif
|
||||
}
|
||||
|
||||
wait_ns(RES);
|
||||
|
||||
chSysUnlock();
|
||||
}
|
16
drivers/chibios/ws2812.h
Normal file
16
drivers/chibios/ws2812.h
Normal file
|
@ -0,0 +1,16 @@
|
|||
#pragma once
|
||||
|
||||
#include "quantum/color.h"
|
||||
|
||||
/* User Interface
|
||||
*
|
||||
* Input:
|
||||
* ledarray: An array of GRB data describing the LED colors
|
||||
* number_of_leds: The number of LEDs to write
|
||||
*
|
||||
* The functions will perform the following actions:
|
||||
* - Set the data-out pin as output
|
||||
* - Send out the LED data
|
||||
* - Wait 50us to reset the LEDs
|
||||
*/
|
||||
void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds);
|
207
drivers/chibios/ws2812_pwm.c
Normal file
207
drivers/chibios/ws2812_pwm.c
Normal file
|
@ -0,0 +1,207 @@
|
|||
#include "ws2812.h"
|
||||
#include "quantum.h"
|
||||
#include "hal.h"
|
||||
|
||||
/* Adapted from https://github.com/joewa/WS2812-LED-Driver_ChibiOS/ */
|
||||
|
||||
#ifdef RGBW
|
||||
# error "RGBW not supported"
|
||||
#endif
|
||||
|
||||
#ifndef WS2812_PWM_DRIVER
|
||||
# define WS2812_PWM_DRIVER PWMD2 // TIMx
|
||||
#endif
|
||||
#ifndef WS2812_PWM_CHANNEL
|
||||
# define WS2812_PWM_CHANNEL 2 // Channel
|
||||
#endif
|
||||
#ifndef WS2812_PWM_PAL_MODE
|
||||
# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value
|
||||
#endif
|
||||
#ifndef WS2812_DMA_STREAM
|
||||
# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP
|
||||
#endif
|
||||
#ifndef WS2812_DMA_CHANNEL
|
||||
# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP
|
||||
#endif
|
||||
|
||||
#ifndef WS2812_PWM_TARGET_PERIOD
|
||||
//# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...?
|
||||
# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1
|
||||
#endif
|
||||
|
||||
/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
|
||||
|
||||
#define WS2812_PWM_FREQUENCY (STM32_SYSCLK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */
|
||||
#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */
|
||||
|
||||
/**
|
||||
* @brief Number of bit-periods to hold the data line low at the end of a frame
|
||||
*
|
||||
* The reset period for each frame must be at least 50 uS; so we add in 50 bit-times
|
||||
* of zeroes at the end. (50 bits)*(1.25 uS/bit) = 62.5 uS, which gives us some
|
||||
* slack in the timing requirements
|
||||
*/
|
||||
#define WS2812_RESET_BIT_N (50)
|
||||
#define WS2812_COLOR_BIT_N (RGBLED_NUM * 24) /**< Number of data bits */
|
||||
#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */
|
||||
|
||||
/**
|
||||
* @brief High period for a zero, in ticks
|
||||
*
|
||||
* Per the datasheet:
|
||||
* WS2812:
|
||||
* - T0H: 200 nS to 500 nS, inclusive
|
||||
* - T0L: 650 nS to 950 nS, inclusive
|
||||
* WS2812B:
|
||||
* - T0H: 200 nS to 500 nS, inclusive
|
||||
* - T0L: 750 nS to 1050 nS, inclusive
|
||||
*
|
||||
* The duty cycle is calculated for a high period of 350 nS.
|
||||
*/
|
||||
#define WS2812_DUTYCYCLE_0 (WS2812_PWM_FREQUENCY / (1000000000 / 350))
|
||||
|
||||
/**
|
||||
* @brief High period for a one, in ticks
|
||||
*
|
||||
* Per the datasheet:
|
||||
* WS2812:
|
||||
* - T1H: 550 nS to 850 nS, inclusive
|
||||
* - T1L: 450 nS to 750 nS, inclusive
|
||||
* WS2812B:
|
||||
* - T1H: 750 nS to 1050 nS, inclusive
|
||||
* - T1L: 200 nS to 500 nS, inclusive
|
||||
*
|
||||
* The duty cycle is calculated for a high period of 800 nS.
|
||||
* This is in the middle of the specifications of the WS2812 and WS2812B.
|
||||
*/
|
||||
#define WS2812_DUTYCYCLE_1 (WS2812_PWM_FREQUENCY / (1000000000 / 800))
|
||||
|
||||
/* --- PRIVATE MACROS ------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
* @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit
|
||||
*
|
||||
* @param[in] led: The led index [0, @ref RGBLED_NUM)
|
||||
* @param[in] byte: The byte number [0, 2]
|
||||
* @param[in] bit: The bit number [0, 7]
|
||||
*
|
||||
* @return The bit index
|
||||
*/
|
||||
#define WS2812_BIT(led, byte, bit) (24 * (led) + 8 * (byte) + (7 - (bit)))
|
||||
|
||||
/**
|
||||
* @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit
|
||||
*
|
||||
* @note The red byte is the middle byte in the color packet
|
||||
*
|
||||
* @param[in] led: The led index [0, @ref RGBLED_NUM)
|
||||
* @param[in] bit: The bit number [0, 7]
|
||||
*
|
||||
* @return The bit index
|
||||
*/
|
||||
#define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 1, (bit))
|
||||
|
||||
/**
|
||||
* @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit
|
||||
*
|
||||
* @note The red byte is the first byte in the color packet
|
||||
*
|
||||
* @param[in] led: The led index [0, @ref RGBLED_NUM)
|
||||
* @param[in] bit: The bit number [0, 7]
|
||||
*
|
||||
* @return The bit index
|
||||
*/
|
||||
#define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 0, (bit))
|
||||
|
||||
/**
|
||||
* @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit
|
||||
*
|
||||
* @note The red byte is the last byte in the color packet
|
||||
*
|
||||
* @param[in] led: The led index [0, @ref RGBLED_NUM)
|
||||
* @param[in] bit: The bit index [0, 7]
|
||||
*
|
||||
* @return The bit index
|
||||
*/
|
||||
#define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 2, (bit))
|
||||
|
||||
/* --- PRIVATE VARIABLES ---------------------------------------------------- */
|
||||
|
||||
static uint32_t ws2812_frame_buffer[WS2812_BIT_N + 1]; /**< Buffer for a frame */
|
||||
|
||||
/* --- PUBLIC FUNCTIONS ----------------------------------------------------- */
|
||||
/*
|
||||
* Gedanke: Double-buffer type transactions: double buffer transfers using two memory pointers for
|
||||
the memory (while the DMA is reading/writing from/to a buffer, the application can
|
||||
write/read to/from the other buffer).
|
||||
*/
|
||||
|
||||
void ws2812_init(void) {
|
||||
// Initialize led frame buffer
|
||||
uint32_t i;
|
||||
for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle
|
||||
for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero
|
||||
|
||||
#if defined(USE_GPIOV1)
|
||||
palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
||||
#else
|
||||
palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_PWM_PAL_MODE) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING);
|
||||
#endif
|
||||
|
||||
// PWM Configuration
|
||||
//#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
|
||||
static const PWMConfig ws2812_pwm_config = {
|
||||
.frequency = WS2812_PWM_FREQUENCY,
|
||||
.period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
|
||||
.callback = NULL,
|
||||
.channels =
|
||||
{
|
||||
[0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled
|
||||
[WS2812_PWM_CHANNEL - 1] = {.mode = PWM_OUTPUT_ACTIVE_HIGH, .callback = NULL}, // Turn on the channel we care about
|
||||
},
|
||||
.cr2 = 0,
|
||||
.dier = TIM_DIER_UDE, // DMA on update event for next period
|
||||
};
|
||||
//#pragma GCC diagnostic pop // Restore command-line warning options
|
||||
|
||||
// Configure DMA
|
||||
// dmaInit(); // Joe added this
|
||||
dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA1_STREAM1, 10, NULL, NULL);
|
||||
dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
|
||||
dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer);
|
||||
dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N);
|
||||
dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
|
||||
// M2P: Memory 2 Periph; PL: Priority Level
|
||||
|
||||
// Start DMA
|
||||
dmaStreamEnable(WS2812_DMA_STREAM);
|
||||
|
||||
// Configure PWM
|
||||
// NOTE: It's required that preload be enabled on the timer channel CCR register. This is currently enabled in the
|
||||
// ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer,
|
||||
// disable counting, enable the channel, and then make whatever configuration changes we need.
|
||||
pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config);
|
||||
pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in
|
||||
}
|
||||
|
||||
void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) {
|
||||
// Write color to frame buffer
|
||||
for (uint8_t bit = 0; bit < 8; bit++) {
|
||||
ws2812_frame_buffer[WS2812_RED_BIT(led_number, bit)] = ((r >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
|
||||
ws2812_frame_buffer[WS2812_GREEN_BIT(led_number, bit)] = ((g >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
|
||||
ws2812_frame_buffer[WS2812_BLUE_BIT(led_number, bit)] = ((b >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
|
||||
}
|
||||
}
|
||||
|
||||
// Setleds for standard RGB
|
||||
void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
|
||||
static bool s_init = false;
|
||||
if (!s_init) {
|
||||
ws2812_init();
|
||||
s_init = true;
|
||||
}
|
||||
|
||||
for (uint16_t i = 0; i < leds; i++) {
|
||||
ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b);
|
||||
}
|
||||
}
|
90
drivers/chibios/ws2812_spi.c
Normal file
90
drivers/chibios/ws2812_spi.c
Normal file
|
@ -0,0 +1,90 @@
|
|||
#include "quantum.h"
|
||||
#include "ws2812.h"
|
||||
|
||||
/* Adapted from https://github.com/gamazeps/ws2812b-chibios-SPIDMA/ */
|
||||
|
||||
#ifdef RGBW
|
||||
# error "RGBW not supported"
|
||||
#endif
|
||||
|
||||
// Define the spi your LEDs are plugged to here
|
||||
#ifndef WS2812_SPI
|
||||
# define WS2812_SPI SPID1
|
||||
#endif
|
||||
|
||||
#ifndef WS2812_SPI_MOSI_PAL_MODE
|
||||
# define WS2812_SPI_MOSI_PAL_MODE 5
|
||||
#endif
|
||||
|
||||
#define BYTES_FOR_LED_BYTE 4
|
||||
#define NB_COLORS 3
|
||||
#define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * NB_COLORS)
|
||||
#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM)
|
||||
#define RESET_SIZE 200
|
||||
#define PREAMBLE_SIZE 4
|
||||
|
||||
static uint8_t txbuf[PREAMBLE_SIZE + DATA_SIZE + RESET_SIZE] = {0};
|
||||
|
||||
/*
|
||||
* As the trick here is to use the SPI to send a huge pattern of 0 and 1 to
|
||||
* the ws2812b protocol, we use this helper function to translate bytes into
|
||||
* 0s and 1s for the LED (with the appropriate timing).
|
||||
*/
|
||||
static uint8_t get_protocol_eq(uint8_t data, int pos) {
|
||||
uint8_t eq = 0;
|
||||
if (data & (1 << (2 * (3 - pos))))
|
||||
eq = 0b1110;
|
||||
else
|
||||
eq = 0b1000;
|
||||
if (data & (2 << (2 * (3 - pos))))
|
||||
eq += 0b11100000;
|
||||
else
|
||||
eq += 0b10000000;
|
||||
return eq;
|
||||
}
|
||||
|
||||
static void set_led_color_rgb(LED_TYPE color, int pos) {
|
||||
uint8_t* tx_start = &txbuf[PREAMBLE_SIZE];
|
||||
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
|
||||
}
|
||||
|
||||
void ws2812_init(void) {
|
||||
#if defined(USE_GPIOV1)
|
||||
palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
|
||||
#else
|
||||
palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL);
|
||||
#endif
|
||||
|
||||
// TODO: more dynamic baudrate
|
||||
static const SPIConfig spicfg = {
|
||||
0, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
|
||||
SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz)
|
||||
};
|
||||
|
||||
spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */
|
||||
spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */
|
||||
spiSelect(&WS2812_SPI); /* Slave Select assertion. */
|
||||
}
|
||||
|
||||
void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
|
||||
static bool s_init = false;
|
||||
if (!s_init) {
|
||||
ws2812_init();
|
||||
s_init = true;
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < leds; i++) {
|
||||
set_led_color_rgb(ledarray[i], i);
|
||||
}
|
||||
|
||||
// Send async - each led takes ~0.03ms, 50 leds ~1.5ms, animations flushing faster than send will cause issues.
|
||||
// Instead spiSend can be used to send synchronously (or the thread logic can be added back).
|
||||
#ifdef WS2812_SPI_SYNC
|
||||
spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
|
||||
#else
|
||||
spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
|
||||
#endif
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue