[Cleanup] Quantum Painter (#19825)
Co-authored-by: Nick Brassel <nick@tzarc.org>
This commit is contained in:
parent
e640fd65ff
commit
cd542a0f67
25 changed files with 171 additions and 169 deletions
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@ -10,8 +10,8 @@
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// Base SPI support
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bool qp_comms_spi_init(painter_device_t device) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
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// Initialize the SPI peripheral
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spi_init();
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@ -24,8 +24,8 @@ bool qp_comms_spi_init(painter_device_t device) {
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}
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bool qp_comms_spi_start(painter_device_t device) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
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return spi_start(comms_config->chip_select_pin, comms_config->lsb_first, comms_config->mode, comms_config->divisor);
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}
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@ -33,8 +33,10 @@ bool qp_comms_spi_start(painter_device_t device) {
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uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
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uint32_t bytes_remaining = byte_count;
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const uint8_t *p = (const uint8_t *)data;
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const uint32_t max_msg_length = 1024;
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while (bytes_remaining > 0) {
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uint32_t bytes_this_loop = bytes_remaining < 1024 ? bytes_remaining : 1024;
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uint32_t bytes_this_loop = QP_MIN(bytes_remaining, max_msg_length);
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spi_transmit(p, bytes_this_loop);
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p += bytes_this_loop;
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bytes_remaining -= bytes_this_loop;
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@ -44,13 +46,13 @@ uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint3
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}
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void qp_comms_spi_stop(painter_device_t device) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
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spi_stop();
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writePinHigh(comms_config->chip_select_pin);
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}
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const struct painter_comms_vtable_t spi_comms_vtable = {
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const painter_comms_vtable_t spi_comms_vtable = {
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.comms_init = qp_comms_spi_init,
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.comms_start = qp_comms_spi_start,
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.comms_send = qp_comms_spi_send_data,
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@ -67,8 +69,8 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
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return false;
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}
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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// Set up D/C as output low, if specified
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if (comms_config->dc_pin != NO_PIN) {
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@ -89,15 +91,15 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
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}
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uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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writePinHigh(comms_config->dc_pin);
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return qp_comms_spi_send_data(device, data, byte_count);
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}
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void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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painter_driver_t * driver = (painter_driver_t *)device;
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qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
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writePinLow(comms_config->dc_pin);
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spi_write(cmd);
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}
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@ -118,7 +120,7 @@ void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const
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}
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}
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const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
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const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
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.base =
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{
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.comms_init = qp_comms_spi_dc_reset_init,
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@ -13,36 +13,36 @@
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Base SPI support
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struct qp_comms_spi_config_t {
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typedef struct qp_comms_spi_config_t {
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pin_t chip_select_pin;
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uint16_t divisor;
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bool lsb_first;
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int8_t mode;
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};
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} qp_comms_spi_config_t;
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bool qp_comms_spi_init(painter_device_t device);
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bool qp_comms_spi_start(painter_device_t device);
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uint32_t qp_comms_spi_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_stop(painter_device_t device);
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extern const struct painter_comms_vtable_t spi_comms_vtable;
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extern const painter_comms_vtable_t spi_comms_vtable;
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// SPI with D/C and RST pins
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# ifdef QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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struct qp_comms_spi_dc_reset_config_t {
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struct qp_comms_spi_config_t spi_config;
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pin_t dc_pin;
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pin_t reset_pin;
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};
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typedef struct qp_comms_spi_dc_reset_config_t {
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qp_comms_spi_config_t spi_config;
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pin_t dc_pin;
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pin_t reset_pin;
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} qp_comms_spi_dc_reset_config_t;
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void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd);
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uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t* sequence, size_t sequence_len);
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extern const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
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extern const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
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# endif // QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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@ -94,7 +94,7 @@ __attribute__((weak)) bool qp_gc9a01_init(painter_device_t device, painter_rotat
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// Driver vtable
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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const struct tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
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const tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
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.base =
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{
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.init = qp_gc9a01_init,
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@ -125,8 +125,8 @@ painter_device_t qp_gc9a01_make_spi_device(uint16_t panel_width, uint16_t panel_
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for (uint32_t i = 0; i < GC9A01_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &gc9a01_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&gc9a01_driver_vtable;
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driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&gc9a01_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.native_bits_per_pixel = 16; // RGB565
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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@ -9,7 +9,7 @@
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// Device definition
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typedef struct rgb565_surface_painter_device_t {
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struct painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
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painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
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// The target buffer
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uint16_t *buffer;
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@ -95,7 +95,7 @@ static inline void stream_pixdata(rgb565_surface_painter_device_t *surface, cons
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// Driver vtable
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static bool qp_rgb565_surface_init(painter_device_t device, painter_rotation_t rotation) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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painter_driver_t * driver = (painter_driver_t *)device;
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rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
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memset(surface->buffer, 0, driver->panel_width * driver->panel_height * driver->native_bits_per_pixel / 8);
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return true;
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@ -107,13 +107,13 @@ static bool qp_rgb565_surface_power(painter_device_t device, bool power_on) {
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}
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static bool qp_rgb565_surface_clear(painter_device_t device) {
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struct painter_driver_t *driver = (struct painter_driver_t *)device;
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painter_driver_t *driver = (painter_driver_t *)device;
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driver->driver_vtable->init(device, driver->rotation); // Re-init the surface
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return true;
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}
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static bool qp_rgb565_surface_flush(painter_device_t device) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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painter_driver_t * driver = (painter_driver_t *)device;
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rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
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surface->dirty_l = surface->dirty_t = UINT16_MAX;
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surface->dirty_r = surface->dirty_b = 0;
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@ -122,7 +122,7 @@ static bool qp_rgb565_surface_flush(painter_device_t device) {
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}
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static bool qp_rgb565_surface_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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painter_driver_t * driver = (painter_driver_t *)device;
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rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
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// Set the viewport locations
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@ -139,7 +139,7 @@ static bool qp_rgb565_surface_viewport(painter_device_t device, uint16_t left, u
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// Stream pixel data to the current write position in GRAM
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static bool qp_rgb565_surface_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) {
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struct painter_driver_t * driver = (struct painter_driver_t *)device;
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painter_driver_t * driver = (painter_driver_t *)device;
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rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
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stream_pixdata(surface, (const uint16_t *)pixel_data, native_pixel_count);
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return true;
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@ -170,7 +170,7 @@ static bool qp_rgb565_surface_append_pixdata(painter_device_t device, uint8_t *t
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return true;
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}
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const struct painter_driver_vtable_t rgb565_surface_driver_vtable = {
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const painter_driver_vtable_t rgb565_surface_driver_vtable = {
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.init = qp_rgb565_surface_init,
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.power = qp_rgb565_surface_power,
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.clear = qp_rgb565_surface_clear,
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@ -201,7 +201,7 @@ uint32_t qp_rgb565_surface_comms_send(painter_device_t device, const void *data,
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return byte_count;
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}
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struct painter_comms_vtable_t rgb565_surface_driver_comms_vtable = {
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painter_comms_vtable_t rgb565_surface_driver_comms_vtable = {
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// These are all effective no-op's because they're not actually needed.
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.comms_init = qp_rgb565_surface_comms_init,
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.comms_start = qp_rgb565_surface_comms_start,
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@ -234,7 +234,7 @@ painter_device_t qp_rgb565_make_surface(uint16_t panel_width, uint16_t panel_hei
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// Drawing routine to copy out the dirty region and send it to another device
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bool qp_rgb565_surface_draw(painter_device_t surface, painter_device_t display, uint16_t x, uint16_t y) {
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struct painter_driver_t * surface_driver = (struct painter_driver_t *)surface;
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painter_driver_t * surface_driver = (painter_driver_t *)surface;
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rgb565_surface_painter_device_t *surface_handle = (rgb565_surface_painter_device_t *)surface_driver;
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// If we're not dirty... we're done.
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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const struct tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = {
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const tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = {
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.base =
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{
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.init = qp_ili9163_init,
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@ -93,8 +93,8 @@ painter_device_t qp_ili9163_make_spi_device(uint16_t panel_width, uint16_t panel
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for (uint32_t i = 0; i < ILI9163_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &ili9163_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9163_driver_vtable;
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driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9163_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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driver->base.rotation = QP_ROTATION_0;
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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const struct tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
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const tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
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.base =
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{
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.init = qp_ili9341_init,
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for (uint32_t i = 0; i < ILI9341_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &ili9341_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9341_driver_vtable;
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driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9341_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.native_bits_per_pixel = 16; // RGB565
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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const struct tft_panel_dc_reset_painter_driver_vtable_t ili9488_driver_vtable = {
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const tft_panel_dc_reset_painter_driver_vtable_t ili9488_driver_vtable = {
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.base =
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{
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.init = qp_ili9488_init,
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@ -93,8 +93,8 @@ painter_device_t qp_ili9488_make_spi_device(uint16_t panel_width, uint16_t panel
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for (uint32_t i = 0; i < ILI9488_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &ili9488_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9488_driver_vtable;
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driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9488_driver_vtable;
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driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
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driver->base.native_bits_per_pixel = 24; // RGB888
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driver->base.panel_width = panel_width;
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driver->base.panel_height = panel_height;
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@ -62,7 +62,7 @@ __attribute__((weak)) bool qp_ssd1351_init(painter_device_t device, painter_rota
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Driver vtable
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const struct tft_panel_dc_reset_painter_driver_vtable_t ssd1351_driver_vtable = {
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const tft_panel_dc_reset_painter_driver_vtable_t ssd1351_driver_vtable = {
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.base =
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{
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.init = qp_ssd1351_init,
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@ -97,8 +97,8 @@ painter_device_t qp_ssd1351_make_spi_device(uint16_t panel_width, uint16_t panel
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for (uint32_t i = 0; i < SSD1351_NUM_DEVICES; ++i) {
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tft_panel_dc_reset_painter_device_t *driver = &ssd1351_drivers[i];
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if (!driver->base.driver_vtable) {
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driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ssd1351_driver_vtable;
|
||||
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.driver_vtable = (const painter_driver_vtable_t *)&ssd1351_driver_vtable;
|
||||
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.panel_width = panel_width;
|
||||
driver->base.panel_height = panel_height;
|
||||
driver->base.rotation = QP_ROTATION_0;
|
||||
|
|
|
@ -25,7 +25,7 @@ tft_panel_dc_reset_painter_device_t st7735_drivers[ST7735_NUM_DEVICES] = {0};
|
|||
|
||||
#ifndef ST7735_NO_AUTOMATIC_OFFSETS
|
||||
static inline void st7735_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) {
|
||||
struct painter_driver_t *driver = (struct painter_driver_t *)device;
|
||||
painter_driver_t *driver = (painter_driver_t *)device;
|
||||
|
||||
// clang-format off
|
||||
const struct {
|
||||
|
@ -82,7 +82,7 @@ __attribute__((weak)) bool qp_st7735_init(painter_device_t device, painter_rotat
|
|||
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// Driver vtable
|
||||
|
||||
const struct tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = {
|
||||
const tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = {
|
||||
.base =
|
||||
{
|
||||
.init = qp_st7735_init,
|
||||
|
@ -117,8 +117,8 @@ painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_
|
|||
for (uint32_t i = 0; i < ST7735_NUM_DEVICES; ++i) {
|
||||
tft_panel_dc_reset_painter_device_t *driver = &st7735_drivers[i];
|
||||
if (!driver->base.driver_vtable) {
|
||||
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7735_driver_vtable;
|
||||
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.driver_vtable = (const painter_driver_vtable_t *)&st7735_driver_vtable;
|
||||
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.panel_width = panel_width;
|
||||
driver->base.panel_height = panel_height;
|
||||
driver->base.rotation = QP_ROTATION_0;
|
||||
|
|
|
@ -24,7 +24,7 @@ tft_panel_dc_reset_painter_device_t st7789_drivers[ST7789_NUM_DEVICES] = {0};
|
|||
|
||||
#ifndef ST7789_NO_AUTOMATIC_OFFSETS
|
||||
static inline void st7789_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) {
|
||||
struct painter_driver_t *driver = (struct painter_driver_t *)device;
|
||||
painter_driver_t *driver = (painter_driver_t *)device;
|
||||
|
||||
// clang-format off
|
||||
const struct {
|
||||
|
@ -81,7 +81,7 @@ __attribute__((weak)) bool qp_st7789_init(painter_device_t device, painter_rotat
|
|||
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
// Driver vtable
|
||||
|
||||
const struct tft_panel_dc_reset_painter_driver_vtable_t st7789_driver_vtable = {
|
||||
const tft_panel_dc_reset_painter_driver_vtable_t st7789_driver_vtable = {
|
||||
.base =
|
||||
{
|
||||
.init = qp_st7789_init,
|
||||
|
@ -116,8 +116,8 @@ painter_device_t qp_st7789_make_spi_device(uint16_t panel_width, uint16_t panel_
|
|||
for (uint32_t i = 0; i < ST7789_NUM_DEVICES; ++i) {
|
||||
tft_panel_dc_reset_painter_device_t *driver = &st7789_drivers[i];
|
||||
if (!driver->base.driver_vtable) {
|
||||
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7789_driver_vtable;
|
||||
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.driver_vtable = (const painter_driver_vtable_t *)&st7789_driver_vtable;
|
||||
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
|
||||
driver->base.panel_width = panel_width;
|
||||
driver->base.panel_height = panel_height;
|
||||
driver->base.rotation = QP_ROTATION_0;
|
||||
|
|
|
@ -12,15 +12,15 @@
|
|||
|
||||
// Power control
|
||||
bool qp_tft_panel_power(painter_device_t device, bool power_on) {
|
||||
struct painter_driver_t * driver = (struct painter_driver_t *)device;
|
||||
struct tft_panel_dc_reset_painter_driver_vtable_t *vtable = (struct tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
|
||||
painter_driver_t * driver = (painter_driver_t *)device;
|
||||
tft_panel_dc_reset_painter_driver_vtable_t *vtable = (tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
|
||||
qp_comms_command(device, power_on ? vtable->opcodes.display_on : vtable->opcodes.display_off);
|
||||
return true;
|
||||
}
|
||||
|
||||
// Screen clear
|
||||
bool qp_tft_panel_clear(painter_device_t device) {
|
||||
struct painter_driver_t *driver = (struct painter_driver_t *)device;
|
||||
painter_driver_t *driver = (painter_driver_t *)device;
|
||||
driver->driver_vtable->init(device, driver->rotation); // Re-init the LCD
|
||||
return true;
|
||||
}
|
||||
|
@ -33,8 +33,8 @@ bool qp_tft_panel_flush(painter_device_t device) {
|
|||
|
||||
// Viewport to draw to
|
||||
bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) {
|
||||
struct painter_driver_t * driver = (struct painter_driver_t *)device;
|
||||
struct tft_panel_dc_reset_painter_driver_vtable_t *vtable = (struct tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
|
||||
painter_driver_t * driver = (painter_driver_t *)device;
|
||||
tft_panel_dc_reset_painter_driver_vtable_t *vtable = (tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
|
||||
|
||||
// Fix up the drawing location if required
|
||||
left += driver->offset_x;
|
||||
|
@ -80,7 +80,7 @@ bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top,
|
|||
|
||||
// Stream pixel data to the current write position in GRAM
|
||||
bool qp_tft_panel_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) {
|
||||
struct painter_driver_t *driver = (struct painter_driver_t *)device;
|
||||
painter_driver_t *driver = (painter_driver_t *)device;
|
||||
qp_comms_send(device, pixel_data, native_pixel_count * driver->native_bits_per_pixel / 8);
|
||||
return true;
|
||||
}
|
||||
|
|
|
@ -12,8 +12,8 @@
|
|||
// Common TFT panel implementation using D/C, and RST pins.
|
||||
|
||||
// Driver vtable with extras
|
||||
struct tft_panel_dc_reset_painter_driver_vtable_t {
|
||||
struct painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type
|
||||
typedef struct tft_panel_dc_reset_painter_driver_vtable_t {
|
||||
painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type
|
||||
|
||||
// Number of bytes for transmitting x/y coordinates
|
||||
uint8_t num_window_bytes;
|
||||
|
@ -29,16 +29,16 @@ struct tft_panel_dc_reset_painter_driver_vtable_t {
|
|||
uint8_t set_row_address;
|
||||
uint8_t enable_writes;
|
||||
} opcodes;
|
||||
};
|
||||
} tft_panel_dc_reset_painter_driver_vtable_t;
|
||||
|
||||
// Device definition
|
||||
typedef struct tft_panel_dc_reset_painter_device_t {
|
||||
struct painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
|
||||
painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
|
||||
|
||||
union {
|
||||
#ifdef QUANTUM_PAINTER_SPI_ENABLE
|
||||
// SPI-based configurables
|
||||
struct qp_comms_spi_dc_reset_config_t spi_dc_reset_config;
|
||||
qp_comms_spi_dc_reset_config_t spi_dc_reset_config;
|
||||
#endif // QUANTUM_PAINTER_SPI_ENABLE
|
||||
|
||||
// TODO: I2C/parallel etc.
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue