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[Cleanup] Quantum Painter (#19825)

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Co-authored-by: Nick Brassel <nick@tzarc.org>
This commit is contained in:
Pablo Martínez 2023-03-25 18:56:04 +01:00 • committed by GitHub
parent e640fd65ff
commit cd542a0f67
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GPG key ID: 4AEE18F83AFDEB23
25 changed files with 171 additions and 169 deletions
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32
drivers/painter/comms/qp_comms_spi.c
View file

@ -10,8 +10,8 @@
// Base SPI support
bool qp_comms_spi_init(painter_device_t device) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
// Initialize the SPI peripheral
spi_init();
@ -24,8 +24,8 @@ bool qp_comms_spi_init(painter_device_t device) {
}
bool qp_comms_spi_start(painter_device_t device) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
return spi_start(comms_config->chip_select_pin, comms_config->lsb_first, comms_config->mode, comms_config->divisor);
}
@ -33,8 +33,10 @@ bool qp_comms_spi_start(painter_device_t device) {
uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
uint32_t bytes_remaining = byte_count;
const uint8_t *p = (const uint8_t *)data;
const uint32_t max_msg_length = 1024;
while (bytes_remaining > 0) {
uint32_t bytes_this_loop = bytes_remaining < 1024 ? bytes_remaining : 1024;
uint32_t bytes_this_loop = QP_MIN(bytes_remaining, max_msg_length);
spi_transmit(p, bytes_this_loop);
p += bytes_this_loop;
bytes_remaining -= bytes_this_loop;
@ -44,13 +46,13 @@ uint32_t qp_comms_spi_send_data(painter_device_t device, const void *data, uint3
}
void qp_comms_spi_stop(painter_device_t device) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_config_t *comms_config = (struct qp_comms_spi_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_config_t *comms_config = (qp_comms_spi_config_t *)driver->comms_config;
spi_stop();
writePinHigh(comms_config->chip_select_pin);
}
const struct painter_comms_vtable_t spi_comms_vtable = {
const painter_comms_vtable_t spi_comms_vtable = {
.comms_init = qp_comms_spi_init,
.comms_start = qp_comms_spi_start,
.comms_send = qp_comms_spi_send_data,
@ -67,8 +69,8 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
return false;
}
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
// Set up D/C as output low, if specified
if (comms_config->dc_pin != NO_PIN) {
@ -89,15 +91,15 @@ bool qp_comms_spi_dc_reset_init(painter_device_t device) {
}
uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void *data, uint32_t byte_count) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
writePinHigh(comms_config->dc_pin);
return qp_comms_spi_send_data(device, data, byte_count);
}
void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct qp_comms_spi_dc_reset_config_t *comms_config = (struct qp_comms_spi_dc_reset_config_t *)driver->comms_config;
painter_driver_t * driver = (painter_driver_t *)device;
qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
writePinLow(comms_config->dc_pin);
spi_write(cmd);
}
@ -118,7 +120,7 @@ void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const
}
}
const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable = {
.base =
{
.comms_init = qp_comms_spi_dc_reset_init,

18
drivers/painter/comms/qp_comms_spi.h
View file

@ -13,36 +13,36 @@
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Base SPI support
struct qp_comms_spi_config_t {
typedef struct qp_comms_spi_config_t {
pin_t chip_select_pin;
uint16_t divisor;
bool lsb_first;
int8_t mode;
};
} qp_comms_spi_config_t;
bool qp_comms_spi_init(painter_device_t device);
bool qp_comms_spi_start(painter_device_t device);
uint32_t qp_comms_spi_send_data(painter_device_t device, const void* data, uint32_t byte_count);
void qp_comms_spi_stop(painter_device_t device);
extern const struct painter_comms_vtable_t spi_comms_vtable;
extern const painter_comms_vtable_t spi_comms_vtable;
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// SPI with D/C and RST pins
# ifdef QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
struct qp_comms_spi_dc_reset_config_t {
struct qp_comms_spi_config_t spi_config;
pin_t dc_pin;
pin_t reset_pin;
};
typedef struct qp_comms_spi_dc_reset_config_t {
qp_comms_spi_config_t spi_config;
pin_t dc_pin;
pin_t reset_pin;
} qp_comms_spi_dc_reset_config_t;
void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd);
uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void* data, uint32_t byte_count);
void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t* sequence, size_t sequence_len);
extern const struct painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
extern const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
# endif // QUANTUM_PAINTER_SPI_DC_RESET_ENABLE

6
drivers/painter/gc9a01/qp_gc9a01.c
View file

@ -94,7 +94,7 @@ __attribute__((weak)) bool qp_gc9a01_init(painter_device_t device, painter_rotat
// Driver vtable
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
const struct tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t gc9a01_driver_vtable = {
.base =
{
.init = qp_gc9a01_init,
@ -125,8 +125,8 @@ painter_device_t qp_gc9a01_make_spi_device(uint16_t panel_width, uint16_t panel_
for (uint32_t i = 0; i < GC9A01_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &gc9a01_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&gc9a01_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&gc9a01_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.native_bits_per_pixel = 16; // RGB565
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;

18
drivers/painter/generic/qp_rgb565_surface.c
View file

@ -9,7 +9,7 @@
// Device definition
typedef struct rgb565_surface_painter_device_t {
struct painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
// The target buffer
uint16_t *buffer;
@ -95,7 +95,7 @@ static inline void stream_pixdata(rgb565_surface_painter_device_t *surface, cons
// Driver vtable
static bool qp_rgb565_surface_init(painter_device_t device, painter_rotation_t rotation) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
memset(surface->buffer, 0, driver->panel_width * driver->panel_height * driver->native_bits_per_pixel / 8);
return true;
@ -107,13 +107,13 @@ static bool qp_rgb565_surface_power(painter_device_t device, bool power_on) {
}
static bool qp_rgb565_surface_clear(painter_device_t device) {
struct painter_driver_t *driver = (struct painter_driver_t *)device;
painter_driver_t *driver = (painter_driver_t *)device;
driver->driver_vtable->init(device, driver->rotation); // Re-init the surface
return true;
}
static bool qp_rgb565_surface_flush(painter_device_t device) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
surface->dirty_l = surface->dirty_t = UINT16_MAX;
surface->dirty_r = surface->dirty_b = 0;
@ -122,7 +122,7 @@ static bool qp_rgb565_surface_flush(painter_device_t device) {
}
static bool qp_rgb565_surface_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
// Set the viewport locations
@ -139,7 +139,7 @@ static bool qp_rgb565_surface_viewport(painter_device_t device, uint16_t left, u
// Stream pixel data to the current write position in GRAM
static bool qp_rgb565_surface_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
painter_driver_t * driver = (painter_driver_t *)device;
rgb565_surface_painter_device_t *surface = (rgb565_surface_painter_device_t *)driver;
stream_pixdata(surface, (const uint16_t *)pixel_data, native_pixel_count);
return true;
@ -170,7 +170,7 @@ static bool qp_rgb565_surface_append_pixdata(painter_device_t device, uint8_t *t
return true;
}
const struct painter_driver_vtable_t rgb565_surface_driver_vtable = {
const painter_driver_vtable_t rgb565_surface_driver_vtable = {
.init = qp_rgb565_surface_init,
.power = qp_rgb565_surface_power,
.clear = qp_rgb565_surface_clear,
@ -201,7 +201,7 @@ uint32_t qp_rgb565_surface_comms_send(painter_device_t device, const void *data,
return byte_count;
}
struct painter_comms_vtable_t rgb565_surface_driver_comms_vtable = {
painter_comms_vtable_t rgb565_surface_driver_comms_vtable = {
// These are all effective no-op's because they're not actually needed.
.comms_init = qp_rgb565_surface_comms_init,
.comms_start = qp_rgb565_surface_comms_start,
@ -234,7 +234,7 @@ painter_device_t qp_rgb565_make_surface(uint16_t panel_width, uint16_t panel_hei
// Drawing routine to copy out the dirty region and send it to another device
bool qp_rgb565_surface_draw(painter_device_t surface, painter_device_t display, uint16_t x, uint16_t y) {
struct painter_driver_t * surface_driver = (struct painter_driver_t *)surface;
painter_driver_t * surface_driver = (painter_driver_t *)surface;
rgb565_surface_painter_device_t *surface_handle = (rgb565_surface_painter_device_t *)surface_driver;
// If we're not dirty... we're done.

6
drivers/painter/ili9xxx/qp_ili9163.c
View file

@ -58,7 +58,7 @@ __attribute__((weak)) bool qp_ili9163_init(painter_device_t device, painter_rota
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t ili9163_driver_vtable = {
.base =
{
.init = qp_ili9163_init,
@ -93,8 +93,8 @@ painter_device_t qp_ili9163_make_spi_device(uint16_t panel_width, uint16_t panel
for (uint32_t i = 0; i < ILI9163_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &ili9163_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9163_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9163_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;
driver->base.rotation = QP_ROTATION_0;

6
drivers/painter/ili9xxx/qp_ili9341.c
View file

@ -65,7 +65,7 @@ __attribute__((weak)) bool qp_ili9341_init(painter_device_t device, painter_rota
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t ili9341_driver_vtable = {
.base =
{
.init = qp_ili9341_init,
@ -100,8 +100,8 @@ painter_device_t qp_ili9341_make_spi_device(uint16_t panel_width, uint16_t panel
for (uint32_t i = 0; i < ILI9341_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &ili9341_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9341_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9341_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.native_bits_per_pixel = 16; // RGB565
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;

6
drivers/painter/ili9xxx/qp_ili9488.c
View file

@ -58,7 +58,7 @@ __attribute__((weak)) bool qp_ili9488_init(painter_device_t device, painter_rota
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t ili9488_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t ili9488_driver_vtable = {
.base =
{
.init = qp_ili9488_init,
@ -93,8 +93,8 @@ painter_device_t qp_ili9488_make_spi_device(uint16_t panel_width, uint16_t panel
for (uint32_t i = 0; i < ILI9488_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &ili9488_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ili9488_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9488_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.native_bits_per_pixel = 24; // RGB888
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;

6
drivers/painter/ssd1351/qp_ssd1351.c
View file

@ -62,7 +62,7 @@ __attribute__((weak)) bool qp_ssd1351_init(painter_device_t device, painter_rota
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t ssd1351_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t ssd1351_driver_vtable = {
.base =
{
.init = qp_ssd1351_init,
@ -97,8 +97,8 @@ painter_device_t qp_ssd1351_make_spi_device(uint16_t panel_width, uint16_t panel
for (uint32_t i = 0; i < SSD1351_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &ssd1351_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&ssd1351_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&ssd1351_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;
driver->base.rotation = QP_ROTATION_0;

8
drivers/painter/st77xx/qp_st7735.c
View file

@ -25,7 +25,7 @@ tft_panel_dc_reset_painter_device_t st7735_drivers[ST7735_NUM_DEVICES] = {0};
#ifndef ST7735_NO_AUTOMATIC_OFFSETS
static inline void st7735_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) {
struct painter_driver_t *driver = (struct painter_driver_t *)device;
painter_driver_t *driver = (painter_driver_t *)device;
// clang-format off
const struct {
@ -82,7 +82,7 @@ __attribute__((weak)) bool qp_st7735_init(painter_device_t device, painter_rotat
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t st7735_driver_vtable = {
.base =
{
.init = qp_st7735_init,
@ -117,8 +117,8 @@ painter_device_t qp_st7735_make_spi_device(uint16_t panel_width, uint16_t panel_
for (uint32_t i = 0; i < ST7735_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &st7735_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7735_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&st7735_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;
driver->base.rotation = QP_ROTATION_0;

8
drivers/painter/st77xx/qp_st7789.c
View file

@ -24,7 +24,7 @@ tft_panel_dc_reset_painter_device_t st7789_drivers[ST7789_NUM_DEVICES] = {0};
#ifndef ST7789_NO_AUTOMATIC_OFFSETS
static inline void st7789_automatic_viewport_offsets(painter_device_t device, painter_rotation_t rotation) {
struct painter_driver_t *driver = (struct painter_driver_t *)device;
painter_driver_t *driver = (painter_driver_t *)device;
// clang-format off
const struct {
@ -81,7 +81,7 @@ __attribute__((weak)) bool qp_st7789_init(painter_device_t device, painter_rotat
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Driver vtable
const struct tft_panel_dc_reset_painter_driver_vtable_t st7789_driver_vtable = {
const tft_panel_dc_reset_painter_driver_vtable_t st7789_driver_vtable = {
.base =
{
.init = qp_st7789_init,
@ -116,8 +116,8 @@ painter_device_t qp_st7789_make_spi_device(uint16_t panel_width, uint16_t panel_
for (uint32_t i = 0; i < ST7789_NUM_DEVICES; ++i) {
tft_panel_dc_reset_painter_device_t *driver = &st7789_drivers[i];
if (!driver->base.driver_vtable) {
driver->base.driver_vtable = (const struct painter_driver_vtable_t *)&st7789_driver_vtable;
driver->base.comms_vtable = (const struct painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.driver_vtable = (const painter_driver_vtable_t *)&st7789_driver_vtable;
driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
driver->base.panel_width = panel_width;
driver->base.panel_height = panel_height;
driver->base.rotation = QP_ROTATION_0;

12
drivers/painter/tft_panel/qp_tft_panel.c
View file

@ -12,15 +12,15 @@
// Power control
bool qp_tft_panel_power(painter_device_t device, bool power_on) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct tft_panel_dc_reset_painter_driver_vtable_t *vtable = (struct tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
painter_driver_t * driver = (painter_driver_t *)device;
tft_panel_dc_reset_painter_driver_vtable_t *vtable = (tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
qp_comms_command(device, power_on ? vtable->opcodes.display_on : vtable->opcodes.display_off);
return true;
}
// Screen clear
bool qp_tft_panel_clear(painter_device_t device) {
struct painter_driver_t *driver = (struct painter_driver_t *)device;
painter_driver_t *driver = (painter_driver_t *)device;
driver->driver_vtable->init(device, driver->rotation); // Re-init the LCD
return true;
}
@ -33,8 +33,8 @@ bool qp_tft_panel_flush(painter_device_t device) {
// Viewport to draw to
bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) {
struct painter_driver_t * driver = (struct painter_driver_t *)device;
struct tft_panel_dc_reset_painter_driver_vtable_t *vtable = (struct tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
painter_driver_t * driver = (painter_driver_t *)device;
tft_panel_dc_reset_painter_driver_vtable_t *vtable = (tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
// Fix up the drawing location if required
left += driver->offset_x;
@ -80,7 +80,7 @@ bool qp_tft_panel_viewport(painter_device_t device, uint16_t left, uint16_t top,
// Stream pixel data to the current write position in GRAM
bool qp_tft_panel_pixdata(painter_device_t device, const void *pixel_data, uint32_t native_pixel_count) {
struct painter_driver_t *driver = (struct painter_driver_t *)device;
painter_driver_t *driver = (painter_driver_t *)device;
qp_comms_send(device, pixel_data, native_pixel_count * driver->native_bits_per_pixel / 8);
return true;
}

10
drivers/painter/tft_panel/qp_tft_panel.h
View file

@ -12,8 +12,8 @@
// Common TFT panel implementation using D/C, and RST pins.
// Driver vtable with extras
struct tft_panel_dc_reset_painter_driver_vtable_t {
struct painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type
typedef struct tft_panel_dc_reset_painter_driver_vtable_t {
painter_driver_vtable_t base; // must be first, so it can be cast to/from the painter_driver_vtable_t* type
// Number of bytes for transmitting x/y coordinates
uint8_t num_window_bytes;
@ -29,16 +29,16 @@ struct tft_panel_dc_reset_painter_driver_vtable_t {
uint8_t set_row_address;
uint8_t enable_writes;
} opcodes;
};
} tft_panel_dc_reset_painter_driver_vtable_t;
// Device definition
typedef struct tft_panel_dc_reset_painter_device_t {
struct painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
painter_driver_t base; // must be first, so it can be cast to/from the painter_device_t* type
union {
#ifdef QUANTUM_PAINTER_SPI_ENABLE
// SPI-based configurables
struct qp_comms_spi_dc_reset_config_t spi_dc_reset_config;
qp_comms_spi_dc_reset_config_t spi_dc_reset_config;
#endif // QUANTUM_PAINTER_SPI_ENABLE
// TODO: I2C/parallel etc.