STM32H723 support (#21352)
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13 changed files with 702 additions and 16 deletions
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@ -1,4 +1,4 @@
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/* Copyright 2021 QMK
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/* Copyright 2021-2023 QMK
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -15,12 +15,17 @@
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*/
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#include "bootloader.h"
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#include "util.h"
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#include <ch.h>
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#include <hal.h>
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#include "wait.h"
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extern uint32_t __ram0_end__;
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#ifndef STM32_BOOTLOADER_RAM_SYMBOL
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# define STM32_BOOTLOADER_RAM_SYMBOL __ram0_end__
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#endif
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extern uint32_t STM32_BOOTLOADER_RAM_SYMBOL;
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#ifndef STM32_BOOTLOADER_DUAL_BANK
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# define STM32_BOOTLOADER_DUAL_BANK FALSE
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@ -72,10 +77,25 @@ void enter_bootloader_mode_if_requested(void) {}
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/* This code should be checked whether it runs correctly on platforms */
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# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
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# define BOOTLOADER_MAGIC 0xDEADBEEF
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# define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4)
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# define MAGIC_ADDR (unsigned long *)(SYMVAL(STM32_BOOTLOADER_RAM_SYMBOL) - 4)
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__attribute__((weak)) void bootloader_marker_enable(void) {
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uint32_t *marker = (uint32_t *)MAGIC_ADDR;
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*marker = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
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}
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__attribute__((weak)) bool bootloader_marker_active(void) {
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const uint32_t *marker = (const uint32_t *)MAGIC_ADDR;
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return (*marker == BOOTLOADER_MAGIC) ? true : false;
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}
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__attribute__((weak)) void bootloader_marker_disable(void) {
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uint32_t *marker = (uint32_t *)MAGIC_ADDR;
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*marker = 0;
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}
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__attribute__((weak)) void bootloader_jump(void) {
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*MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
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bootloader_marker_enable();
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NVIC_SystemReset();
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}
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@ -84,18 +104,43 @@ __attribute__((weak)) void mcu_reset(void) {
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}
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void enter_bootloader_mode_if_requested(void) {
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unsigned long *check = MAGIC_ADDR;
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if (*check == BOOTLOADER_MAGIC) {
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*check = 0;
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__set_CONTROL(0);
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__set_MSP(*(__IO uint32_t *)STM32_BOOTLOADER_ADDRESS);
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if (bootloader_marker_active()) {
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bootloader_marker_disable();
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__disable_irq();
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# if defined(QMK_MCU_ARCH_CORTEX_M7)
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SCB_DisableDCache();
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SCB_DisableICache();
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# endif
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# if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
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ARM_MPU_Disable();
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# endif
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SysTick->CTRL = 0;
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SysTick->VAL = 0;
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SysTick->LOAD = 0;
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// Clear interrupt enable and interrupt pending registers
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for (int i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
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NVIC->ICER[i] = 0xFFFFFFFF;
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NVIC->ICPR[i] = 0xFFFFFFFF;
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}
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__enable_irq();
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typedef void (*BootJump_t)(void);
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BootJump_t boot_jump = *(BootJump_t *)(STM32_BOOTLOADER_ADDRESS + 4);
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boot_jump();
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while (1)
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;
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struct system_memory_vector_t {
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uint32_t stack_top;
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void (*entrypoint)(void);
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};
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const struct system_memory_vector_t *bootloader = (const struct system_memory_vector_t *)(STM32_BOOTLOADER_ADDRESS);
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// Jump to bootloader
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__set_MSP(bootloader->stack_top);
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bootloader->entrypoint();
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while (true) {
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}
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}
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}
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#endif
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