NVRAM refactor, phase 1. (#18969)

* Rename `eeprom_stm32` to `eeprom_legacy_emulated_flash`.

* Rename `flash_stm32` to `legacy_flash_ops`.

* Rename `eeprom_teensy` to `eeprom_kinetis_flexram`.

platforms/chibios/drivers/eeprom/eeprom_kinetis_flexram.c

@@ -1,7 +1,7 @@
 #include <ch.h>
 #include <hal.h>
 
-#include "eeprom_teensy.h"
+#include "eeprom_kinetis_flexram.h"
 #include "eeconfig.h"
 
 /*************************************/

platforms/chibios/drivers/eeprom/eeprom_legacy_emulated_flash.c

@@ -22,8 +22,8 @@
 #include <stdbool.h>
 #include "util.h"
 #include "debug.h"
-#include "eeprom_stm32.h"
-#include "flash_stm32.h"
+#include "eeprom_legacy_emulated_flash.h"
+#include "legacy_flash_ops.h"
 
 /*
  * We emulate eeprom by writing a snapshot compacted view of eeprom contents,
@@ -132,7 +132,7 @@
  *
  */
 
-#include "eeprom_stm32_defs.h"
+#include "eeprom_legacy_emulated_flash_defs.h"
 /* These bits are used for optimizing encoding of bytes, 0 and 1 */
 #define FEE_WORD_ENCODING 0x8000
 #define FEE_VALUE_NEXT 0x6000

platforms/chibios/drivers/flash/legacy_flash_ops.c

@@ -17,7 +17,7 @@
  */
 
 #include <hal.h>
-#include "flash_stm32.h"
+#include "legacy_flash_ops.h"
 
 #if defined(STM32F1XX)
 #    define FLASH_SR_WRPERR FLASH_SR_WRPRTERR

platforms/chibios/drivers/flash/legacy_flash_ops.h

@@ -24,7 +24,7 @@ extern "C" {
 
 #include <stdint.h>
 
-#ifdef FLASH_STM32_MOCKED
+#ifdef LEGACY_FLASH_OPS_MOCKED
 extern uint8_t FlashBuf[MOCK_FLASH_SIZE];
 #endif
 

platforms/chibios/drivers/wear_leveling/wear_leveling_legacy.c

@@ -5,7 +5,7 @@
 #include "timer.h"
 #include "wear_leveling.h"
 #include "wear_leveling_internal.h"
-#include "flash_stm32.h"
+#include "legacy_flash_ops.h"
 
 bool backing_store_init(void) {
     bs_dprintf("Init\n");