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ibm4704_usb: Fix interrupt of clock(rising edge)

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tmk 2015-05-14 15:38:15 +09:00
parent 6014d1014e
commit 9a2282157f
3 changed files with 27 additions and 30 deletions
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4
converter/ibm4704_usb/config.h
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@ -51,8 +51,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#define IBM4704_DATA_DDR DDRD
#define IBM4704_DATA_BIT 0
/* Pin interrupt on rising edge */
#define IBM4704_INT_INIT() do { EICRA |= ((1<<ISC11)|(0<<ISC10)); } while (0)
/* Pin interrupt on rising edge of clock */
#define IBM4704_INT_INIT() do { EICRA |= ((1<<ISC11)|(1<<ISC10)); } while (0)
#define IBM4704_INT_ON() do { EIMSK |= (1<<INT1); } while (0)
#define IBM4704_INT_OFF() do { EIMSK &= ~(1<<INT1); } while (0)
#define IBM4704_INT_VECT INT1_vect

6
converter/ibm4704_usb/ibm4704.txt
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@ -57,15 +57,15 @@ Keyboard to Host
----------------
Data bits are LSB first and Pairty is odd. Clock has around 60us high and 30us low part.
____ __ __ __ __ __ __ __ __ __ ________
Clock \____/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
____ __ __ __ __ __ __ __ __ __ _______
Clock \_____/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
____ ____ ____ ____ ____ ____ ____ ____ ____ ____
Data ____/ X____X____X____X____X____X____X____X____X____X________
Start 0 1 2 3 4 5 6 7 P Stop
Start bit: can be long as 300-350us.
Inhibit: Pull Data line down to inhibit keyboard to send.
Timing: Host reads bit while Clock is hi.
Timing: Host reads bit while Clock is hi.(rising edge)
Stop bit: Keyboard pulls down Data line to lo after 9th clock.