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Align PS/2 GPIO defines (#14745)

* Align PS/2 GPIO

* Align PS/2 GPIO

* refactor more keyboards

* Remove more defines

* Put back avr/chibios split

* format
This commit is contained in:
Joel Challis 2021-10-20 20:07:40 +01:00 committed by GitHub
parent 1fb2a0c74e
commit 84d5198ef9
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
12 changed files with 94 additions and 192 deletions

View file

@ -45,15 +45,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef PS2_USE_USART
/* XCK for clock line */
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
/* RXD for data line */
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */
@ -93,15 +86,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef PS2_USE_INT
/* uses INT1 for clock line(ATMega32U4) */
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 1
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 0
#define PS2_CLOCK_PIN D1
#define PS2_DATA_PIN D0
#define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC11) | \
@ -121,13 +107,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
* PS/2 Busywait configuration
*/
#ifdef PS2_USE_BUSYWAIT
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 1
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 0
#define PS2_CLOCK_PIN D1
#define PS2_DATA_PIN D0
#endif

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@ -17,14 +17,8 @@
#pragma once
#ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */

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@ -12,14 +12,8 @@
#define MATRIX_COLS 23
#ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */

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@ -224,27 +224,15 @@ enum led_sequence {
/* PS/2 mouse */
#ifdef PS2_USE_BUSYWAIT
# define PS2_CLOCK_PORT PORTD
# define PS2_CLOCK_PIN PIND
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 3
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
# define PS2_CLOCK_PIN D3
# define PS2_DATA_PIN D2
#endif
/* PS/2 mouse interrupt version */
#ifdef PS2_USE_INT
/* uses INT1 for clock line(ATMega32U4) */
# define PS2_CLOCK_PORT PORTD
# define PS2_CLOCK_PIN PIND
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 3
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
# define PS2_CLOCK_PIN D3
# define PS2_DATA_PIN D2
# define PS2_INT_INIT() \
do { \
@ -264,14 +252,8 @@ enum led_sequence {
/* PS/2 mouse USART version */
#ifdef PS2_USE_USART
/* XCK for clock line and RXD for data line */
# define PS2_CLOCK_PORT PORTD
# define PS2_CLOCK_PIN PIND
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 5
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */

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@ -12,14 +12,8 @@
#define MATRIX_COLS 3
#ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */

View file

@ -34,14 +34,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
/* Only required if you add in a trackpoint hardware to the pcb */
#ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
#define PS2_CLOCK_PIN D5
#define PS2_DATA_PIN D2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling
* edge */
@ -77,14 +71,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#endif
#ifdef PS2_USE_INT
#define PS2_CLOCK_PORT PORTD
#define PS2_CLOCK_PIN PIND
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 2
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 5
#define PS2_CLOCK_PIN D2
#define PS2_DATA_PIN D5
#define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC21) | \