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[Core] Clean up ISSI drivers, Add IS31FL3736 support (#20572)

Co-authored-by: Pablo Martínez <58857054+elpekenin@users.noreply.github.com>
This commit is contained in:
Xelus22 2023-04-30 12:35:27 +10:00 committed by GitHub
parent 0d9e37d638
commit 6a619e6403
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
13 changed files with 155 additions and 36 deletions

View file

@ -45,9 +45,7 @@ void IS31FL3218_write_register(uint8_t reg, uint8_t data) {
void IS31FL3218_write_pwm_buffer(uint8_t *pwm_buffer) {
g_twi_transfer_buffer[0] = ISSI_REG_PWM;
for (int i = 0; i < 18; i++) {
g_twi_transfer_buffer[1 + i] = pwm_buffer[i];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer, 18);
i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 19, ISSI_TIMEOUT);
}

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@ -123,9 +123,7 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
for (int j = 0; j < 16; j++) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {

View file

@ -111,9 +111,7 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer
for (int j = 0; j < 16; j++) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {

View file

@ -129,9 +129,7 @@ bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// Copy the data from i to i+15.
// Device will auto-increment register for data after the first byte
// Thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer.
for (int j = 0; j < 16; j++) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {

View file

@ -107,9 +107,7 @@ void IS31FL3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer
for (int j = 0; j < 16; j++) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
@ -262,16 +260,15 @@ void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled) {
g_led_control_registers_update_required = true;
}
void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2) {
if (g_pwm_buffer_update_required) {
void IS31FL3736_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
// Firstly we need to unlock the command register and select PG1
IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
IS31FL3736_write_pwm_buffer(addr1, g_pwm_buffer[0]);
// IS31FL3736_write_pwm_buffer(addr2, g_pwm_buffer[1]);
IS31FL3736_write_pwm_buffer(addr, g_pwm_buffer[index]);
}
g_pwm_buffer_update_required = false;
g_pwm_buffer_update_required[index] = false;
}
void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2) {

View file

@ -58,8 +58,8 @@ void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled);
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2);
void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2);
void IS31FL3736_update_pwm_buffers(uint8_t addr, uint8_t index);
void IS31FL3736_update_led_control_registers(uint8_t addr, uint8_t index);
#define PUR_0R 0x00 // No PUR resistor
#define PUR_05KR 0x01 // 0.5k Ohm resistor

View file

@ -114,9 +114,7 @@ void IS31FL3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// copy the data from i to i+15
// device will auto-increment register for data after the first byte
// thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer
for (int j = 0; j < 16; j++) {
g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
}
memcpy(g_twi_transfer_buffer + 1, pwm_buffer + i, 16);
#if ISSI_PERSISTENCE > 0
for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {

View file

@ -45,8 +45,8 @@ void IS31FL3737_set_led_control_register(uint8_t index, bool red, bool green, bo
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
void IS31FL3737_update_pwm_buffers(uint8_t addr1, uint8_t addr2);
void IS31FL3737_update_led_control_registers(uint8_t addr1, uint8_t addr2);
void IS31FL3737_update_pwm_buffers(uint8_t addr, uint8_t index);
void IS31FL3737_update_led_control_registers(uint8_t addr, uint8_t index);
#define PUR_0R 0x00 // No PUR resistor
#define PUR_05KR 0x01 // 0.5k Ohm resistor in t_NOL

View file

@ -104,9 +104,7 @@ void IS31FL3741_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
}
bool IS31FL3741_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// unlock the command register and select PG2
IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0);
// Assume PG1 is already selected
for (int i = 0; i < 342; i += 18) {
if (i == 180) {
@ -222,6 +220,10 @@ void IS31FL3741_set_led_control_register(uint8_t index, bool red, bool green, bo
void IS31FL3741_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
// unlock the command register and select PG2
IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3741_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM0);
IS31FL3741_write_pwm_buffer(addr, g_pwm_buffer[index]);
}