Format code according to conventions (#16322)
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QMK Bot
GitHub
parent
afcdd7079c
commit
63646e8906
345 changed files with 4916 additions and 3229 deletions
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@ -26,20 +26,20 @@ extern uint32_t _eram;
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// CTRL keyboards released with bootloader version below must use RAM method. Otherwise use WDT method.
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void bootloader_jump(void) {
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#ifdef KEYBOARD_massdrop_ctrl
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uint8_t ver_ram_method[] = "v2.18Jun 22 2018 17:28:08"; // The version to match (NULL terminated by compiler)
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uint8_t *ver_check = ver_ram_method; // Pointer to version match string for traversal
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uint8_t *ver_rom = (uint8_t *)0x21A0; // Pointer to address in ROM where this specific bootloader version would exist
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uint8_t ver_ram_method[] = "v2.18Jun 22 2018 17:28:08"; // The version to match (NULL terminated by compiler)
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uint8_t *ver_check = ver_ram_method; // Pointer to version match string for traversal
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uint8_t *ver_rom = (uint8_t *)0x21A0; // Pointer to address in ROM where this specific bootloader version would exist
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while (*ver_check && *ver_rom == *ver_check) { // While there are check version characters to match and bootloader's version matches check's version
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ver_check++; // Move check version pointer to next character
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ver_rom++; // Move ROM version pointer to next character
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while (*ver_check && *ver_rom == *ver_check) { // While there are check version characters to match and bootloader's version matches check's version
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ver_check++; // Move check version pointer to next character
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ver_rom++; // Move ROM version pointer to next character
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}
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if (!*ver_check) { // If check version pointer is NULL, all characters have matched
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*MAGIC_ADDR = BOOTLOADER_MAGIC; // Set magic number into RAM
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NVIC_SystemReset(); // Perform system reset
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if (!*ver_check) { // If check version pointer is NULL, all characters have matched
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*MAGIC_ADDR = BOOTLOADER_MAGIC; // Set magic number into RAM
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NVIC_SystemReset(); // Perform system reset
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while (1)
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; // Won't get here
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; // Won't get here
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}
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#endif
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@ -61,5 +61,5 @@ void bootloader_jump(void) {
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while (!WDT->CTRLA.bit.ENABLE)
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;
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while (1)
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; // Wait on timeout
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; // Wait on timeout
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}
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@ -155,7 +155,9 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) {
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}
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}
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void eeprom_update_byte(uint8_t *addr, uint8_t value) { eeprom_write_byte(addr, value); }
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void eeprom_update_byte(uint8_t *addr, uint8_t value) {
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eeprom_write_byte(addr, value);
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}
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void eeprom_update_word(uint16_t *addr, uint16_t value) {
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uint8_t *p = (uint8_t *)addr;
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2
platforms/arm_atsam/eeprom_samd.h
Executable file → Normal file
2
platforms/arm_atsam/eeprom_samd.h
Executable file → Normal file
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@ -4,5 +4,5 @@
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#ifndef EEPROM_SIZE
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# include "eeconfig.h"
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# define EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO
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# define EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO
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#endif
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@ -9,7 +9,7 @@
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*/
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void suspend_power_down(void) {
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#ifdef RGB_MATRIX_ENABLE
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I2C3733_Control_Set(0); // Disable LED driver
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I2C3733_Control_Set(0); // Disable LED driver
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#endif
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suspend_power_down_kb();
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@ -2,18 +2,34 @@
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#include "timer.h"
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#include "tmk_core/protocol/arm_atsam/clks.h"
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void set_time(uint64_t tset) { ms_clk = tset; }
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void set_time(uint64_t tset) {
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ms_clk = tset;
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}
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void timer_init(void) { timer_clear(); }
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void timer_init(void) {
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timer_clear();
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}
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uint16_t timer_read(void) { return (uint16_t)ms_clk; }
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uint16_t timer_read(void) {
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return (uint16_t)ms_clk;
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}
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uint32_t timer_read32(void) { return (uint32_t)ms_clk; }
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uint32_t timer_read32(void) {
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return (uint32_t)ms_clk;
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}
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uint64_t timer_read64(void) { return ms_clk; }
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uint64_t timer_read64(void) {
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return ms_clk;
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}
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uint16_t timer_elapsed(uint16_t tlast) { return TIMER_DIFF_16(timer_read(), tlast); }
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uint16_t timer_elapsed(uint16_t tlast) {
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return TIMER_DIFF_16(timer_read(), tlast);
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}
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uint32_t timer_elapsed32(uint32_t tlast) { return TIMER_DIFF_32(timer_read32(), tlast); }
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uint32_t timer_elapsed32(uint32_t tlast) {
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return TIMER_DIFF_32(timer_read32(), tlast);
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}
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void timer_clear(void) { set_time(0); }
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void timer_clear(void) {
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set_time(0);
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}
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@ -30,9 +30,9 @@ uint32_t reset_key __attribute__((section(".noinit,\"aw\",@nobits;")));
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__attribute__((weak)) void bootloader_jump(void) {
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UDCON = 1;
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USBCON = (1 << FRZCLK); // disable USB
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USBCON = (1 << FRZCLK); // disable USB
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UCSR1B = 0;
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_delay_ms(5); // 5 seems to work fine
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_delay_ms(5); // 5 seems to work fine
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// watchdog reset
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reset_key = BOOTLOADER_RESET_KEY;
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@ -27,11 +27,11 @@ __attribute__((weak)) void bootloader_jump(void) {
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// disable all peripherals
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// a shutdown call might make sense here
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UDCON = 1;
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USBCON = (1 << FRZCLK); // disable USB
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USBCON = (1 << FRZCLK); // disable USB
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UCSR1B = 0;
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_delay_ms(5);
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#if defined(__AVR_AT90USB162__) // Teensy 1.0
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#if defined(__AVR_AT90USB162__) // Teensy 1.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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@ -47,7 +47,7 @@ __attribute__((weak)) void bootloader_jump(void) {
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PORTC = 0;
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PORTD = 0;
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asm volatile("jmp 0x3E00");
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#elif defined(__AVR_ATmega32U4__) // Teensy 2.0
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#elif defined(__AVR_ATmega32U4__) // Teensy 2.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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@ -72,7 +72,7 @@ __attribute__((weak)) void bootloader_jump(void) {
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PORTE = 0;
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PORTF = 0;
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asm volatile("jmp 0x7E00");
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#elif defined(__AVR_AT90USB646__) // Teensy++ 1.0
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#elif defined(__AVR_AT90USB646__) // Teensy++ 1.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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@ -98,7 +98,7 @@ __attribute__((weak)) void bootloader_jump(void) {
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PORTE = 0;
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PORTF = 0;
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asm volatile("jmp 0xFC00");
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#elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0
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#elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0
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EIMSK = 0;
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PCICR = 0;
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SPCR = 0;
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@ -21,9 +21,13 @@
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static uint8_t aref = ADC_REF_POWER;
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void analogReference(uint8_t mode) { aref = mode & (_BV(REFS1) | _BV(REFS0)); }
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void analogReference(uint8_t mode) {
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aref = mode & (_BV(REFS1) | _BV(REFS0));
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}
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int16_t analogReadPin(pin_t pin) { return adc_read(pinToMux(pin)); }
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int16_t analogReadPin(pin_t pin) {
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return adc_read(pinToMux(pin));
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}
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uint8_t pinToMux(pin_t pin) {
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switch (pin) {
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@ -32,21 +32,21 @@ int16_t adc_read(uint8_t mux);
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}
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#endif
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#define ADC_REF_EXTERNAL 0 // AREF, Internal Vref turned off
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#define ADC_REF_POWER _BV(REFS0) // AVCC with external capacitor on AREF pin
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#define ADC_REF_INTERNAL (_BV(REFS1) | _BV(REFS0)) // Internal 2.56V Voltage Reference with external capacitor on AREF pin (1.1V for 328P)
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#define ADC_REF_EXTERNAL 0 // AREF, Internal Vref turned off
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#define ADC_REF_POWER _BV(REFS0) // AVCC with external capacitor on AREF pin
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#define ADC_REF_INTERNAL (_BV(REFS1) | _BV(REFS0)) // Internal 2.56V Voltage Reference with external capacitor on AREF pin (1.1V for 328P)
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// These prescaler values are for high speed mode, ADHSM = 1
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#if F_CPU == 16000000L || F_CPU == 12000000L
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# define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS1)) // /64
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# define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS1)) // /64
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#elif F_CPU == 8000000L
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# define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS0)) // /32
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# define ADC_PRESCALER (_BV(ADPS2) | _BV(ADPS0)) // /32
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#elif F_CPU == 4000000L
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# define ADC_PRESCALER (_BV(ADPS2)) // /16
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# define ADC_PRESCALER (_BV(ADPS2)) // /16
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#elif F_CPU == 2000000L
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# define ADC_PRESCALER (_BV(ADPS1) | _BV(ADPS0)) // /8
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# define ADC_PRESCALER (_BV(ADPS1) | _BV(ADPS0)) // /8
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#elif F_CPU == 1000000L
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# define ADC_PRESCALER _BV(ADPS1) // /4
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# define ADC_PRESCALER _BV(ADPS1) // /4
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#else
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# define ADC_PRESCALER _BV(ADPS0) // /2
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# define ADC_PRESCALER _BV(ADPS0) // /2
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#endif
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@ -152,7 +152,7 @@ extern uint8_t note_timbre;
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#ifdef AUDIO1_PIN_SET
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static float channel_1_frequency = 0.0f;
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void channel_1_set_frequency(float freq) {
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if (freq == 0.0f) // a pause/rest is a valid "note" with freq=0
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if (freq == 0.0f) // a pause/rest is a valid "note" with freq=0
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{
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// disable the output, but keep the pwm-ISR going (with the previous
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// frequency) so the audio-state keeps getting updated
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@ -160,7 +160,7 @@ void channel_1_set_frequency(float freq) {
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AUDIO1_TCCRxA &= ~(_BV(AUDIO1_COMxy1) | _BV(AUDIO1_COMxy0));
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return;
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} else {
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AUDIO1_TCCRxA |= _BV(AUDIO1_COMxy1); // enable output, PWM mode
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AUDIO1_TCCRxA |= _BV(AUDIO1_COMxy1); // enable output, PWM mode
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}
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channel_1_frequency = freq;
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@ -202,7 +202,9 @@ void channel_2_set_frequency(float freq) {
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AUDIO2_OCRxy = (uint16_t)((((float)F_CPU) / (freq * CPU_PRESCALER)) * note_timbre / 100);
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}
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float channel_2_get_frequency(void) { return channel_2_frequency; }
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float channel_2_get_frequency(void) {
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return channel_2_frequency;
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}
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void channel_2_start(void) {
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AUDIO2_TIMSKx |= _BV(AUDIO2_OCIExy);
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@ -10,14 +10,14 @@ static const unsigned char font[] PROGMEM = {
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0x30, 0x38, 0x3E, 0x38, 0x30, 0x06, 0x0E, 0x3E, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x00, 0x07, 0x00, 0x07, 0x00, 0x14, 0x7F, 0x14, 0x7F, 0x14, 0x24, 0x2A, 0x7F, 0x2A, 0x12, 0x23, 0x13, 0x08, 0x64, 0x62, 0x36, 0x49, 0x56, 0x20, 0x50, 0x00, 0x08, 0x07, 0x03, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x00, 0x00, 0x41, 0x22, 0x1C, 0x00, 0x2A, 0x1C, 0x7F, 0x1C, 0x2A, 0x08, 0x08, 0x3E, 0x08, 0x08, 0x00, 0x80, 0x70, 0x30, 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x60, 0x60, 0x00, 0x20, 0x10, 0x08, 0x04, 0x02, 0x3E, 0x51, 0x49, 0x45, 0x3E, 0x00, 0x42, 0x7F, 0x40, 0x00, 0x72, 0x49, 0x49, 0x49, 0x46, 0x21, 0x41, 0x49, 0x4D, 0x33, 0x18, 0x14, 0x12, 0x7F, 0x10, 0x27, 0x45, 0x45, 0x45, 0x39, 0x3C, 0x4A, 0x49, 0x49, 0x31, 0x41, 0x21, 0x11, 0x09, 0x07, 0x36, 0x49, 0x49, 0x49, 0x36, 0x46, 0x49, 0x49, 0x29, 0x1E, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x40, 0x34, 0x00, 0x00,
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0x00, 0x08, 0x14, 0x22, 0x41, 0x14, 0x14, 0x14, 0x14, 0x14, 0x00, 0x41, 0x22, 0x14, 0x08, 0x02, 0x01, 0x59, 0x09, 0x06, 0x3E, 0x41, 0x5D, 0x59, 0x4E, 0x7C, 0x12, 0x11, 0x12, 0x7C, 0x7F, 0x49, 0x49, 0x49, 0x36, 0x3E, 0x41, 0x41, 0x41, 0x22, 0x7F, 0x41, 0x41, 0x41, 0x3E, 0x7F, 0x49, 0x49, 0x49, 0x41, 0x7F, 0x09, 0x09, 0x09, 0x01, 0x3E, 0x41, 0x41, 0x51, 0x73, 0x7F, 0x08, 0x08, 0x08, 0x7F, 0x00, 0x41, 0x7F, 0x41, 0x00, 0x20, 0x40, 0x41, 0x3F, 0x01, 0x7F, 0x08, 0x14, 0x22, 0x41, 0x7F, 0x40, 0x40, 0x40, 0x40, 0x7F, 0x02, 0x1C, 0x02, 0x7F, 0x7F, 0x04, 0x08, 0x10, 0x7F, 0x3E, 0x41, 0x41, 0x41, 0x3E, 0x7F, 0x09, 0x09, 0x09, 0x06, 0x3E, 0x41, 0x51, 0x21, 0x5E, 0x7F, 0x09, 0x19, 0x29, 0x46, 0x26, 0x49, 0x49, 0x49, 0x32, 0x03, 0x01, 0x7F, 0x01, 0x03, 0x3F, 0x40, 0x40, 0x40, 0x3F, 0x1F, 0x20, 0x40, 0x20, 0x1F, 0x3F, 0x40, 0x38, 0x40, 0x3F, 0x63, 0x14, 0x08, 0x14, 0x63, 0x03, 0x04, 0x78, 0x04, 0x03,
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0x61, 0x59, 0x49, 0x4D, 0x43, 0x00, 0x7F, 0x41, 0x41, 0x41, 0x02, 0x04, 0x08, 0x10, 0x20, 0x00, 0x41, 0x41, 0x41, 0x7F, 0x04, 0x02, 0x01, 0x02, 0x04, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x03, 0x07, 0x08, 0x00, 0x20, 0x54, 0x54, 0x78, 0x40, 0x7F, 0x28, 0x44, 0x44, 0x38, 0x38, 0x44, 0x44, 0x44, 0x28, 0x38, 0x44, 0x44, 0x28, 0x7F, 0x38, 0x54, 0x54, 0x54, 0x18, 0x00, 0x08, 0x7E, 0x09, 0x02, 0x18, 0xA4, 0xA4, 0x9C, 0x78, 0x7F, 0x08, 0x04, 0x04, 0x78, 0x00, 0x44, 0x7D, 0x40, 0x00, 0x20, 0x40, 0x40, 0x3D, 0x00, 0x7F, 0x10, 0x28, 0x44, 0x00, 0x00, 0x41, 0x7F, 0x40, 0x00, 0x7C, 0x04, 0x78, 0x04, 0x78, 0x7C, 0x08, 0x04, 0x04, 0x78, 0x38, 0x44, 0x44, 0x44, 0x38, 0xFC, 0x18, 0x24, 0x24, 0x18, 0x18, 0x24, 0x24, 0x18, 0xFC, 0x7C, 0x08, 0x04, 0x04, 0x08, 0x48, 0x54, 0x54, 0x54, 0x24, 0x04, 0x04, 0x3F, 0x44, 0x24, 0x3C, 0x40, 0x40, 0x20, 0x7C, 0x1C, 0x20, 0x40, 0x20, 0x1C, 0x3C, 0x40, 0x30, 0x40, 0x3C,
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0x44, 0x28, 0x10, 0x28, 0x44, 0x4C, 0x90, 0x90, 0x90, 0x7C, 0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, 0x08, 0x36, 0x41, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x41, 0x36, 0x08, 0x00, 0x02, 0x01, 0x02, 0x04, 0x02, 0x3C, 0x26, 0x23, 0x26, 0x3C, 0x1E, 0xA1, 0xA1, 0x61, 0x12, 0x3A, 0x40, 0x40, 0x20, 0x7A, 0x38, 0x54, 0x54, 0x55, 0x59, 0x21, 0x55, 0x55, 0x79, 0x41, 0x22, 0x54, 0x54, 0x78, 0x42, // a-umlaut
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0x21, 0x55, 0x54, 0x78, 0x40, 0x20, 0x54, 0x55, 0x79, 0x40, 0x0C, 0x1E, 0x52, 0x72, 0x12, 0x39, 0x55, 0x55, 0x55, 0x59, 0x39, 0x54, 0x54, 0x54, 0x59, 0x39, 0x55, 0x54, 0x54, 0x58, 0x00, 0x00, 0x45, 0x7C, 0x41, 0x00, 0x02, 0x45, 0x7D, 0x42, 0x00, 0x01, 0x45, 0x7C, 0x40, 0x7D, 0x12, 0x11, 0x12, 0x7D, // A-umlaut
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0xF0, 0x28, 0x25, 0x28, 0xF0, 0x7C, 0x54, 0x55, 0x45, 0x00, 0x20, 0x54, 0x54, 0x7C, 0x54, 0x7C, 0x0A, 0x09, 0x7F, 0x49, 0x32, 0x49, 0x49, 0x49, 0x32, 0x3A, 0x44, 0x44, 0x44, 0x3A, // o-umlaut
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0x32, 0x4A, 0x48, 0x48, 0x30, 0x3A, 0x41, 0x41, 0x21, 0x7A, 0x3A, 0x42, 0x40, 0x20, 0x78, 0x00, 0x9D, 0xA0, 0xA0, 0x7D, 0x3D, 0x42, 0x42, 0x42, 0x3D, // O-umlaut
|
||||
0x3D, 0x40, 0x40, 0x40, 0x3D, 0x3C, 0x24, 0xFF, 0x24, 0x24, 0x48, 0x7E, 0x49, 0x43, 0x66, 0x2B, 0x2F, 0xFC, 0x2F, 0x2B, 0xFF, 0x09, 0x29, 0xF6, 0x20, 0xC0, 0x88, 0x7E, 0x09, 0x03, 0x20, 0x54, 0x54, 0x79, 0x41, 0x00, 0x00, 0x44, 0x7D, 0x41, 0x30, 0x48, 0x48, 0x4A, 0x32, 0x38, 0x40, 0x40, 0x22, 0x7A, 0x00, 0x7A, 0x0A, 0x0A, 0x72, 0x7D, 0x0D, 0x19, 0x31, 0x7D, 0x26, 0x29, 0x29, 0x2F, 0x28, 0x26, 0x29, 0x29, 0x29, 0x26, 0x30, 0x48, 0x4D, 0x40, 0x20, 0x38, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x38, 0x2F, 0x10, 0xC8, 0xAC, 0xBA, 0x2F, 0x10, 0x28, 0x34, 0xFA, 0x00, 0x00, 0x7B, 0x00, 0x00, 0x08, 0x14, 0x2A, 0x14, 0x22, 0x22, 0x14, 0x2A, 0x14, 0x08, 0x55, 0x00, 0x55, 0x00, 0x55, // #176 (25% block) missing in old code
|
||||
0xAA, 0x55, 0xAA, 0x55, 0xAA, // 50% block
|
||||
0xFF, 0x55, 0xFF, 0x55, 0xFF, // 75% block
|
||||
0x44, 0x28, 0x10, 0x28, 0x44, 0x4C, 0x90, 0x90, 0x90, 0x7C, 0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, 0x08, 0x36, 0x41, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x41, 0x36, 0x08, 0x00, 0x02, 0x01, 0x02, 0x04, 0x02, 0x3C, 0x26, 0x23, 0x26, 0x3C, 0x1E, 0xA1, 0xA1, 0x61, 0x12, 0x3A, 0x40, 0x40, 0x20, 0x7A, 0x38, 0x54, 0x54, 0x55, 0x59, 0x21, 0x55, 0x55, 0x79, 0x41, 0x22, 0x54, 0x54, 0x78, 0x42, // a-umlaut
|
||||
0x21, 0x55, 0x54, 0x78, 0x40, 0x20, 0x54, 0x55, 0x79, 0x40, 0x0C, 0x1E, 0x52, 0x72, 0x12, 0x39, 0x55, 0x55, 0x55, 0x59, 0x39, 0x54, 0x54, 0x54, 0x59, 0x39, 0x55, 0x54, 0x54, 0x58, 0x00, 0x00, 0x45, 0x7C, 0x41, 0x00, 0x02, 0x45, 0x7D, 0x42, 0x00, 0x01, 0x45, 0x7C, 0x40, 0x7D, 0x12, 0x11, 0x12, 0x7D, // A-umlaut
|
||||
0xF0, 0x28, 0x25, 0x28, 0xF0, 0x7C, 0x54, 0x55, 0x45, 0x00, 0x20, 0x54, 0x54, 0x7C, 0x54, 0x7C, 0x0A, 0x09, 0x7F, 0x49, 0x32, 0x49, 0x49, 0x49, 0x32, 0x3A, 0x44, 0x44, 0x44, 0x3A, // o-umlaut
|
||||
0x32, 0x4A, 0x48, 0x48, 0x30, 0x3A, 0x41, 0x41, 0x21, 0x7A, 0x3A, 0x42, 0x40, 0x20, 0x78, 0x00, 0x9D, 0xA0, 0xA0, 0x7D, 0x3D, 0x42, 0x42, 0x42, 0x3D, // O-umlaut
|
||||
0x3D, 0x40, 0x40, 0x40, 0x3D, 0x3C, 0x24, 0xFF, 0x24, 0x24, 0x48, 0x7E, 0x49, 0x43, 0x66, 0x2B, 0x2F, 0xFC, 0x2F, 0x2B, 0xFF, 0x09, 0x29, 0xF6, 0x20, 0xC0, 0x88, 0x7E, 0x09, 0x03, 0x20, 0x54, 0x54, 0x79, 0x41, 0x00, 0x00, 0x44, 0x7D, 0x41, 0x30, 0x48, 0x48, 0x4A, 0x32, 0x38, 0x40, 0x40, 0x22, 0x7A, 0x00, 0x7A, 0x0A, 0x0A, 0x72, 0x7D, 0x0D, 0x19, 0x31, 0x7D, 0x26, 0x29, 0x29, 0x2F, 0x28, 0x26, 0x29, 0x29, 0x29, 0x26, 0x30, 0x48, 0x4D, 0x40, 0x20, 0x38, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x38, 0x2F, 0x10, 0xC8, 0xAC, 0xBA, 0x2F, 0x10, 0x28, 0x34, 0xFA, 0x00, 0x00, 0x7B, 0x00, 0x00, 0x08, 0x14, 0x2A, 0x14, 0x22, 0x22, 0x14, 0x2A, 0x14, 0x08, 0x55, 0x00, 0x55, 0x00, 0x55, // #176 (25% block) missing in old code
|
||||
0xAA, 0x55, 0xAA, 0x55, 0xAA, // 50% block
|
||||
0xFF, 0x55, 0xFF, 0x55, 0xFF, // 75% block
|
||||
0x00, 0x00, 0x00, 0xFF, 0x00, 0x10, 0x10, 0x10, 0xFF, 0x00, 0x14, 0x14, 0x14, 0xFF, 0x00, 0x10, 0x10, 0xFF, 0x00, 0xFF, 0x10, 0x10, 0xF0, 0x10, 0xF0, 0x14, 0x14, 0x14, 0xFC, 0x00, 0x14, 0x14, 0xF7, 0x00, 0xFF, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x14, 0x14, 0xF4, 0x04, 0xFC, 0x14, 0x14, 0x17, 0x10, 0x1F, 0x10, 0x10, 0x1F, 0x10, 0x1F, 0x14, 0x14, 0x14, 0x1F, 0x00, 0x10, 0x10, 0x10, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x10, 0x10, 0x10, 0x10, 0x1F, 0x10, 0x10, 0x10, 0x10, 0xF0, 0x10, 0x00, 0x00, 0x00, 0xFF, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0xFF, 0x10, 0x00, 0x00, 0x00, 0xFF, 0x14, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x1F, 0x10, 0x17, 0x00, 0x00, 0xFC, 0x04, 0xF4, 0x14, 0x14, 0x17, 0x10, 0x17, 0x14, 0x14, 0xF4, 0x04, 0xF4, 0x00, 0x00, 0xFF, 0x00, 0xF7, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0xF7, 0x00, 0xF7, 0x14, 0x14, 0x14, 0x17, 0x14, 0x10, 0x10, 0x1F, 0x10, 0x1F,
|
||||
0x14, 0x14, 0x14, 0xF4, 0x14, 0x10, 0x10, 0xF0, 0x10, 0xF0, 0x00, 0x00, 0x1F, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x1F, 0x14, 0x00, 0x00, 0x00, 0xFC, 0x14, 0x00, 0x00, 0xF0, 0x10, 0xF0, 0x10, 0x10, 0xFF, 0x10, 0xFF, 0x14, 0x14, 0x14, 0xFF, 0x14, 0x10, 0x10, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x38, 0x44, 0x44, 0x38, 0x44, 0xFC, 0x4A, 0x4A, 0x4A, 0x34, // sharp-s or beta
|
||||
0x7E, 0x02, 0x02, 0x06, 0x06, 0x02, 0x7E, 0x02, 0x7E, 0x02, 0x63, 0x55, 0x49, 0x41, 0x63, 0x38, 0x44, 0x44, 0x3C, 0x04, 0x40, 0x7E, 0x20, 0x1E, 0x20, 0x06, 0x02, 0x7E, 0x02, 0x02, 0x99, 0xA5, 0xE7, 0xA5, 0x99, 0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x4C, 0x72, 0x01, 0x72, 0x4C, 0x30, 0x4A, 0x4D, 0x4D, 0x30, 0x30, 0x48, 0x78, 0x48, 0x30, 0xBC, 0x62, 0x5A, 0x46, 0x3D, 0x3E, 0x49, 0x49, 0x49, 0x00, 0x7E, 0x01, 0x01, 0x01, 0x7E, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x44, 0x44, 0x5F, 0x44, 0x44, 0x40, 0x51, 0x4A, 0x44, 0x40, 0x40, 0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, 0xFF, 0x01, 0x03, 0xE0, 0x80, 0xFF, 0x00, 0x00, 0x08, 0x08, 0x6B, 0x6B, 0x08, 0x36, 0x12, 0x36, 0x24, 0x36, 0x06, 0x0F, 0x09, 0x0F, 0x06, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x10, 0x10, 0x00, 0x30, 0x40, 0xFF, 0x01, 0x01, 0x00, 0x1F, 0x01, 0x01, 0x1E, 0x00, 0x19, 0x1D, 0x17, 0x12, 0x00, 0x3C, 0x3C, 0x3C, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00 // #255 NBSP
|
||||
0x14, 0x14, 0x14, 0xF4, 0x14, 0x10, 0x10, 0xF0, 0x10, 0xF0, 0x00, 0x00, 0x1F, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x1F, 0x14, 0x00, 0x00, 0x00, 0xFC, 0x14, 0x00, 0x00, 0xF0, 0x10, 0xF0, 0x10, 0x10, 0xFF, 0x10, 0xFF, 0x14, 0x14, 0x14, 0xFF, 0x14, 0x10, 0x10, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x10, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x38, 0x44, 0x44, 0x38, 0x44, 0xFC, 0x4A, 0x4A, 0x4A, 0x34, // sharp-s or beta
|
||||
0x7E, 0x02, 0x02, 0x06, 0x06, 0x02, 0x7E, 0x02, 0x7E, 0x02, 0x63, 0x55, 0x49, 0x41, 0x63, 0x38, 0x44, 0x44, 0x3C, 0x04, 0x40, 0x7E, 0x20, 0x1E, 0x20, 0x06, 0x02, 0x7E, 0x02, 0x02, 0x99, 0xA5, 0xE7, 0xA5, 0x99, 0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x4C, 0x72, 0x01, 0x72, 0x4C, 0x30, 0x4A, 0x4D, 0x4D, 0x30, 0x30, 0x48, 0x78, 0x48, 0x30, 0xBC, 0x62, 0x5A, 0x46, 0x3D, 0x3E, 0x49, 0x49, 0x49, 0x00, 0x7E, 0x01, 0x01, 0x01, 0x7E, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x44, 0x44, 0x5F, 0x44, 0x44, 0x40, 0x51, 0x4A, 0x44, 0x40, 0x40, 0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, 0xFF, 0x01, 0x03, 0xE0, 0x80, 0xFF, 0x00, 0x00, 0x08, 0x08, 0x6B, 0x6B, 0x08, 0x36, 0x12, 0x36, 0x24, 0x36, 0x06, 0x0F, 0x09, 0x0F, 0x06, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x10, 0x10, 0x00, 0x30, 0x40, 0xFF, 0x01, 0x01, 0x00, 0x1F, 0x01, 0x01, 0x1E, 0x00, 0x19, 0x1D, 0x17, 0x12, 0x00, 0x3C, 0x3C, 0x3C, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00 // #255 NBSP
|
||||
};
|
||||
|
|
|
|||
|
|
@ -262,7 +262,7 @@ static uint8_t lcd_waitbusy(void)
|
|||
delay(LCD_DELAY_BUSY_FLAG);
|
||||
|
||||
/* now read the address counter */
|
||||
return (lcd_read(0)); // return address counter
|
||||
return (lcd_read(0)); // return address counter
|
||||
|
||||
} /* lcd_waitbusy */
|
||||
|
||||
|
|
@ -362,17 +362,23 @@ void lcd_gotoxy(uint8_t x, uint8_t y) {
|
|||
|
||||
/*************************************************************************
|
||||
*************************************************************************/
|
||||
int lcd_getxy(void) { return lcd_waitbusy(); }
|
||||
int lcd_getxy(void) {
|
||||
return lcd_waitbusy();
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
Clear display and set cursor to home position
|
||||
*************************************************************************/
|
||||
void lcd_clrscr(void) { lcd_command(1 << LCD_CLR); }
|
||||
void lcd_clrscr(void) {
|
||||
lcd_command(1 << LCD_CLR);
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
Set cursor to home position
|
||||
*************************************************************************/
|
||||
void lcd_home(void) { lcd_command(1 << LCD_HOME); }
|
||||
void lcd_home(void) {
|
||||
lcd_command(1 << LCD_HOME);
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
Display character at current cursor position
|
||||
|
|
@ -382,7 +388,7 @@ Returns: none
|
|||
void lcd_putc(char c) {
|
||||
uint8_t pos;
|
||||
|
||||
pos = lcd_waitbusy(); // read busy-flag and address counter
|
||||
pos = lcd_waitbusy(); // read busy-flag and address counter
|
||||
if (c == '\n') {
|
||||
lcd_newline(pos);
|
||||
} else {
|
||||
|
|
@ -483,8 +489,8 @@ void lcd_init(uint8_t dispAttr) {
|
|||
delay(LCD_DELAY_BOOTUP); /* wait 16ms or more after power-on */
|
||||
|
||||
/* initial write to lcd is 8bit */
|
||||
LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN); // LCD_FUNCTION>>4;
|
||||
LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN); // LCD_FUNCTION_8BIT>>4;
|
||||
LCD_DATA1_PORT |= _BV(LCD_DATA1_PIN); // LCD_FUNCTION>>4;
|
||||
LCD_DATA0_PORT |= _BV(LCD_DATA0_PIN); // LCD_FUNCTION_8BIT>>4;
|
||||
lcd_e_toggle();
|
||||
delay(LCD_DELAY_INIT); /* delay, busy flag can't be checked here */
|
||||
|
||||
|
|
@ -497,7 +503,7 @@ void lcd_init(uint8_t dispAttr) {
|
|||
delay(LCD_DELAY_INIT_REP); /* delay, busy flag can't be checked here */
|
||||
|
||||
/* now configure for 4bit mode */
|
||||
LCD_DATA0_PORT &= ~_BV(LCD_DATA0_PIN); // LCD_FUNCTION_4BIT_1LINE>>4
|
||||
LCD_DATA0_PORT &= ~_BV(LCD_DATA0_PIN); // LCD_FUNCTION_4BIT_1LINE>>4
|
||||
lcd_e_toggle();
|
||||
delay(LCD_DELAY_INIT_4BIT); /* some displays need this additional delay */
|
||||
|
||||
|
|
|
|||
|
|
@ -25,12 +25,12 @@
|
|||
#include "wait.h"
|
||||
|
||||
#ifndef F_SCL
|
||||
# define F_SCL 400000UL // SCL frequency
|
||||
# define F_SCL 400000UL // SCL frequency
|
||||
#endif
|
||||
|
||||
#ifndef I2C_START_RETRY_COUNT
|
||||
# define I2C_START_RETRY_COUNT 20
|
||||
#endif // I2C_START_RETRY_COUNT
|
||||
#endif // I2C_START_RETRY_COUNT
|
||||
|
||||
#define I2C_ACTION_READ 0x01
|
||||
#define I2C_ACTION_WRITE 0x00
|
||||
|
|
@ -98,7 +98,7 @@ static i2c_status_t i2c_start_impl(uint8_t address, uint16_t timeout) {
|
|||
i2c_status_t i2c_start(uint8_t address, uint16_t timeout) {
|
||||
// Retry i2c_start_impl a bunch times in case the remote side has interrupts disabled.
|
||||
uint16_t timeout_timer = timer_read();
|
||||
uint16_t time_slice = MAX(1, (timeout == (I2C_TIMEOUT_INFINITE)) ? 5 : (timeout / (I2C_START_RETRY_COUNT))); // if it's infinite, wait 1ms between attempts, otherwise split up the entire timeout into the number of retries
|
||||
uint16_t time_slice = MAX(1, (timeout == (I2C_TIMEOUT_INFINITE)) ? 5 : (timeout / (I2C_START_RETRY_COUNT))); // if it's infinite, wait 1ms between attempts, otherwise split up the entire timeout into the number of retries
|
||||
i2c_status_t status;
|
||||
do {
|
||||
status = i2c_start_impl(address, time_slice);
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
# include "transactions.h"
|
||||
|
||||
static volatile bool is_callback_executor = false;
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
|
||||
volatile uint8_t i2c_slave_reg[I2C_SLAVE_REG_COUNT];
|
||||
|
||||
|
|
@ -57,7 +57,7 @@ ISR(TWI_vect) {
|
|||
slave_has_register_set = false;
|
||||
#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
is_callback_executor = false;
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
break;
|
||||
|
||||
case TW_SR_DATA_ACK:
|
||||
|
|
@ -66,16 +66,16 @@ ISR(TWI_vect) {
|
|||
if (!slave_has_register_set) {
|
||||
buffer_address = TWDR;
|
||||
|
||||
if (buffer_address >= I2C_SLAVE_REG_COUNT) { // address out of bounds dont ack
|
||||
if (buffer_address >= I2C_SLAVE_REG_COUNT) { // address out of bounds dont ack
|
||||
ack = 0;
|
||||
buffer_address = 0;
|
||||
}
|
||||
slave_has_register_set = true; // address has been received now fill in buffer
|
||||
slave_has_register_set = true; // address has been received now fill in buffer
|
||||
|
||||
#if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
// Work out if we're attempting to execute a callback
|
||||
is_callback_executor = buffer_address == split_transaction_table[I2C_EXECUTE_CALLBACK].initiator2target_offset;
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
} else {
|
||||
i2c_slave_reg[buffer_address] = TWDR;
|
||||
buffer_address++;
|
||||
|
|
@ -88,7 +88,7 @@ ISR(TWI_vect) {
|
|||
trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans));
|
||||
}
|
||||
}
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
#endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -27,11 +27,11 @@
|
|||
# if defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
# include "transport.h"
|
||||
# define I2C_SLAVE_REG_COUNT sizeof(split_shared_memory_t)
|
||||
# else // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
# else // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
# define I2C_SLAVE_REG_COUNT 30
|
||||
# endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
# endif // defined(USE_I2C) && defined(SPLIT_COMMON_TRANSACTIONS)
|
||||
|
||||
#endif // I2C_SLAVE_REG_COUNT
|
||||
#endif // I2C_SLAVE_REG_COUNT
|
||||
|
||||
_Static_assert(I2C_SLAVE_REG_COUNT < 256, "I2C target registers must be single byte");
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,9 @@ void clock_lo(void) {
|
|||
setPinOutput(PS2_CLOCK_PIN);
|
||||
}
|
||||
|
||||
void clock_hi(void) { setPinInputHigh(PS2_CLOCK_PIN); }
|
||||
void clock_hi(void) {
|
||||
setPinInputHigh(PS2_CLOCK_PIN);
|
||||
}
|
||||
|
||||
bool clock_in(void) {
|
||||
setPinInputHigh(PS2_CLOCK_PIN);
|
||||
|
|
@ -42,7 +44,9 @@ void data_lo(void) {
|
|||
setPinOutput(PS2_DATA_PIN);
|
||||
}
|
||||
|
||||
void data_hi(void) { setPinInputHigh(PS2_DATA_PIN); }
|
||||
void data_hi(void) {
|
||||
setPinInputHigh(PS2_DATA_PIN);
|
||||
}
|
||||
|
||||
bool data_in(void) {
|
||||
setPinInputHigh(PS2_DATA_PIN);
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ static inline bool pbuf_has_data(void);
|
|||
static inline void pbuf_clear(void);
|
||||
|
||||
void ps2_host_init(void) {
|
||||
idle(); // without this many USART errors occur when cable is disconnected
|
||||
idle(); // without this many USART errors occur when cable is disconnected
|
||||
PS2_USART_INIT();
|
||||
PS2_USART_RX_INT_ON();
|
||||
// POR(150-2000ms) plus BAT(300-500ms) may take 2.5sec([3]p.20)
|
||||
|
|
@ -91,12 +91,12 @@ uint8_t ps2_host_send(uint8_t data) {
|
|||
|
||||
/* terminate a transmission if we have */
|
||||
inhibit();
|
||||
_delay_us(100); // [4]p.13
|
||||
_delay_us(100); // [4]p.13
|
||||
|
||||
/* 'Request to Send' and Start bit */
|
||||
data_lo();
|
||||
clock_hi();
|
||||
WAIT(clock_lo, 10000, 10); // 10ms [5]p.50
|
||||
WAIT(clock_lo, 10000, 10); // 10ms [5]p.50
|
||||
|
||||
/* Data bit[2-9] */
|
||||
for (uint8_t i = 0; i < 8; i++) {
|
||||
|
|
@ -165,7 +165,7 @@ uint8_t ps2_host_recv(void) {
|
|||
|
||||
ISR(PS2_USART_RX_VECT) {
|
||||
// TODO: request RESEND when error occurs?
|
||||
uint8_t error = PS2_USART_ERROR; // USART error should be read before data
|
||||
uint8_t error = PS2_USART_ERROR; // USART error should be read before data
|
||||
uint8_t data = PS2_USART_RX_DATA;
|
||||
if (!error) {
|
||||
pbuf_enqueue(data);
|
||||
|
|
|
|||
|
|
@ -156,59 +156,59 @@
|
|||
|
||||
# if SELECT_SOFT_SERIAL_SPEED == 0
|
||||
// Very High speed
|
||||
# define SERIAL_DELAY 4 // micro sec
|
||||
# define SERIAL_DELAY 4 // micro sec
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_START_ADJUST 33 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_START_ADJUST 33 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_START_ADJUST 34 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_START_ADJUST 34 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# elif SELECT_SOFT_SERIAL_SPEED == 1
|
||||
// High speed
|
||||
# define SERIAL_DELAY 6 // micro sec
|
||||
# define SERIAL_DELAY 6 // micro sec
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_START_ADJUST 33 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_START_ADJUST 33 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# elif SELECT_SOFT_SERIAL_SPEED == 2
|
||||
// Middle speed
|
||||
# define SERIAL_DELAY 12 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define SERIAL_DELAY 12 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# elif SELECT_SOFT_SERIAL_SPEED == 3
|
||||
// Low speed
|
||||
# define SERIAL_DELAY 24 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define SERIAL_DELAY 24 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# elif SELECT_SOFT_SERIAL_SPEED == 4
|
||||
// Very Low speed
|
||||
# define SERIAL_DELAY 36 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define SERIAL_DELAY 36 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# elif SELECT_SOFT_SERIAL_SPEED == 5
|
||||
// Ultra Low speed
|
||||
# define SERIAL_DELAY 48 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# define SERIAL_DELAY 48 // micro sec
|
||||
# define READ_WRITE_START_ADJUST 30 // cycles
|
||||
# if __GNUC__ < 6
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||
# else
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||
# endif
|
||||
# else
|
||||
# error invalid SELECT_SOFT_SERIAL_SPEED value
|
||||
|
|
@ -223,29 +223,45 @@
|
|||
# define SLAVE_INT_ACK_WIDTH 4
|
||||
|
||||
inline static void serial_delay(void) ALWAYS_INLINE;
|
||||
inline static void serial_delay(void) { _delay_us(SERIAL_DELAY); }
|
||||
inline static void serial_delay(void) {
|
||||
_delay_us(SERIAL_DELAY);
|
||||
}
|
||||
|
||||
inline static void serial_delay_half1(void) ALWAYS_INLINE;
|
||||
inline static void serial_delay_half1(void) { _delay_us(SERIAL_DELAY_HALF1); }
|
||||
inline static void serial_delay_half1(void) {
|
||||
_delay_us(SERIAL_DELAY_HALF1);
|
||||
}
|
||||
|
||||
inline static void serial_delay_half2(void) ALWAYS_INLINE;
|
||||
inline static void serial_delay_half2(void) { _delay_us(SERIAL_DELAY_HALF2); }
|
||||
inline static void serial_delay_half2(void) {
|
||||
_delay_us(SERIAL_DELAY_HALF2);
|
||||
}
|
||||
|
||||
inline static void serial_output(void) ALWAYS_INLINE;
|
||||
inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_output(void) {
|
||||
setPinOutput(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
// make the serial pin an input with pull-up resistor
|
||||
inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
|
||||
inline static void serial_input_with_pullup(void) { setPinInputHigh(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_input_with_pullup(void) {
|
||||
setPinInputHigh(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
|
||||
inline static uint8_t serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); }
|
||||
inline static uint8_t serial_read_pin(void) {
|
||||
return !!readPin(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
inline static void serial_low(void) ALWAYS_INLINE;
|
||||
inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_low(void) {
|
||||
writePinLow(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
inline static void serial_high(void) ALWAYS_INLINE;
|
||||
inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_high(void) {
|
||||
writePinHigh(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
void soft_serial_initiator_init(void) {
|
||||
serial_output();
|
||||
|
|
@ -286,7 +302,7 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
|
|||
|
||||
_delay_sub_us(READ_WRITE_START_ADJUST);
|
||||
for (i = 0, byte = 0, p = PARITY; i < bit; i++) {
|
||||
serial_delay_half1(); // read the middle of pulses
|
||||
serial_delay_half1(); // read the middle of pulses
|
||||
if (serial_read_pin()) {
|
||||
byte = (byte << 1) | 1;
|
||||
p ^= 1;
|
||||
|
|
@ -298,7 +314,7 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
|
|||
serial_delay_half2();
|
||||
}
|
||||
/* recive parity bit */
|
||||
serial_delay_half1(); // read the middle of pulses
|
||||
serial_delay_half1(); // read the middle of pulses
|
||||
pb = serial_read_pin();
|
||||
_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
|
||||
serial_delay_half2();
|
||||
|
|
@ -330,7 +346,7 @@ void serial_write_chunk(uint8_t data, uint8_t bit) {
|
|||
}
|
||||
serial_delay();
|
||||
|
||||
serial_low(); // sync_send() / senc_recv() need raise edge
|
||||
serial_low(); // sync_send() / senc_recv() need raise edge
|
||||
}
|
||||
|
||||
static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
|
||||
|
|
@ -356,19 +372,19 @@ static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
|
|||
}
|
||||
|
||||
inline static void change_sender2reciver(void) {
|
||||
sync_send(); // 0
|
||||
serial_delay_half1(); // 1
|
||||
serial_low(); // 2
|
||||
serial_input_with_pullup(); // 2
|
||||
serial_delay_half1(); // 3
|
||||
sync_send(); // 0
|
||||
serial_delay_half1(); // 1
|
||||
serial_low(); // 2
|
||||
serial_input_with_pullup(); // 2
|
||||
serial_delay_half1(); // 3
|
||||
}
|
||||
|
||||
inline static void change_reciver2sender(void) {
|
||||
sync_recv(); // 0
|
||||
serial_delay(); // 1
|
||||
serial_low(); // 3
|
||||
serial_output(); // 3
|
||||
serial_delay_half1(); // 4
|
||||
sync_recv(); // 0
|
||||
serial_delay(); // 1
|
||||
serial_low(); // 3
|
||||
serial_output(); // 3
|
||||
serial_delay_half1(); // 4
|
||||
}
|
||||
|
||||
static inline uint8_t nibble_bits_count(uint8_t bits) {
|
||||
|
|
@ -391,11 +407,11 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
|||
}
|
||||
serial_delay_half1();
|
||||
|
||||
serial_high(); // response step1 low->high
|
||||
serial_high(); // response step1 low->high
|
||||
serial_output();
|
||||
_delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT * SLAVE_INT_ACK_WIDTH);
|
||||
split_transaction_desc_t *trans = &split_transaction_table[tid];
|
||||
serial_low(); // response step2 ack high->low
|
||||
serial_low(); // response step2 ack high->low
|
||||
|
||||
// If the transaction has a callback, we can execute it now
|
||||
if (trans->slave_callback) {
|
||||
|
|
@ -412,7 +428,7 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
|||
serial_recive_packet((uint8_t *)split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size);
|
||||
}
|
||||
|
||||
sync_recv(); // weit initiator output to high
|
||||
sync_recv(); // weit initiator output to high
|
||||
}
|
||||
|
||||
/////////
|
||||
|
|
|
|||
|
|
@ -125,7 +125,7 @@ spi_status_t spi_write(uint8_t data) {
|
|||
}
|
||||
|
||||
spi_status_t spi_read() {
|
||||
SPDR = 0x00; // Dummy
|
||||
SPDR = 0x00; // Dummy
|
||||
|
||||
uint16_t timeout_timer = timer_read();
|
||||
while (!(SPSR & _BV(SPIF))) {
|
||||
|
|
|
|||
|
|
@ -161,7 +161,7 @@ bool iota_gfx_init(void) {
|
|||
send_cmd1(DeActivateScroll);
|
||||
send_cmd1(DisplayOn);
|
||||
|
||||
send_cmd2(SetContrast, 0); // Dim
|
||||
send_cmd2(SetContrast, 0); // Dim
|
||||
|
||||
clear_display();
|
||||
|
||||
|
|
@ -226,7 +226,9 @@ void matrix_write_char(struct CharacterMatrix *matrix, uint8_t c) {
|
|||
matrix_write_char_inner(matrix, c);
|
||||
}
|
||||
|
||||
void iota_gfx_write_char(uint8_t c) { matrix_write_char(&display, c); }
|
||||
void iota_gfx_write_char(uint8_t c) {
|
||||
matrix_write_char(&display, c);
|
||||
}
|
||||
|
||||
void matrix_write(struct CharacterMatrix *matrix, const char *data) {
|
||||
const char *end = data + strlen(data);
|
||||
|
|
@ -236,7 +238,9 @@ void matrix_write(struct CharacterMatrix *matrix, const char *data) {
|
|||
}
|
||||
}
|
||||
|
||||
void iota_gfx_write(const char *data) { matrix_write(&display, data); }
|
||||
void iota_gfx_write(const char *data) {
|
||||
matrix_write(&display, data);
|
||||
}
|
||||
|
||||
void matrix_write_P(struct CharacterMatrix *matrix, const char *data) {
|
||||
while (true) {
|
||||
|
|
@ -249,7 +253,9 @@ void matrix_write_P(struct CharacterMatrix *matrix, const char *data) {
|
|||
}
|
||||
}
|
||||
|
||||
void iota_gfx_write_P(const char *data) { matrix_write_P(&display, data); }
|
||||
void iota_gfx_write_P(const char *data) {
|
||||
matrix_write_P(&display, data);
|
||||
}
|
||||
|
||||
void matrix_clear(struct CharacterMatrix *matrix) {
|
||||
memset(matrix->display, ' ', sizeof(matrix->display));
|
||||
|
|
@ -257,7 +263,9 @@ void matrix_clear(struct CharacterMatrix *matrix) {
|
|||
matrix->dirty = true;
|
||||
}
|
||||
|
||||
void iota_gfx_clear_screen(void) { matrix_clear(&display); }
|
||||
void iota_gfx_clear_screen(void) {
|
||||
matrix_clear(&display);
|
||||
}
|
||||
|
||||
void matrix_render(struct CharacterMatrix *matrix) {
|
||||
last_flush = timer_read();
|
||||
|
|
@ -301,7 +309,9 @@ done:
|
|||
# endif
|
||||
}
|
||||
|
||||
void iota_gfx_flush(void) { matrix_render(&display); }
|
||||
void iota_gfx_flush(void) {
|
||||
matrix_render(&display);
|
||||
}
|
||||
|
||||
__attribute__((weak)) void iota_gfx_task_user(void) {}
|
||||
|
||||
|
|
|
|||
|
|
@ -108,7 +108,7 @@ void uart_write(uint8_t data) {
|
|||
// return immediately to avoid deadlock when interrupt is disabled(called from ISR)
|
||||
if (tx_buffer_tail == i && (SREG & (1 << SREG_I)) == 0) return;
|
||||
while (tx_buffer_tail == i)
|
||||
; // wait until space in buffer
|
||||
; // wait until space in buffer
|
||||
// cli();
|
||||
tx_buffer[i] = data;
|
||||
tx_buffer_head = i;
|
||||
|
|
@ -121,7 +121,7 @@ uint8_t uart_read(void) {
|
|||
uint8_t data, i;
|
||||
|
||||
while (rx_buffer_head == rx_buffer_tail)
|
||||
; // wait for character
|
||||
; // wait for character
|
||||
i = rx_buffer_tail + 1;
|
||||
if (i >= RX_BUFFER_SIZE) i = 0;
|
||||
data = rx_buffer[i];
|
||||
|
|
|
|||
|
|
@ -110,7 +110,7 @@ static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t
|
|||
|
||||
asm volatile(" ldi %0,8 \n\t"
|
||||
"loop%=: \n\t"
|
||||
" out %2,%3 \n\t" // '1' [01] '0' [01] - re
|
||||
" out %2,%3 \n\t" // '1' [01] '0' [01] - re
|
||||
#if (w1_nops & 1)
|
||||
w_nop1
|
||||
#endif
|
||||
|
|
@ -126,9 +126,9 @@ static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t
|
|||
#if (w1_nops & 16)
|
||||
w_nop16
|
||||
#endif
|
||||
" sbrs %1,7 \n\t" // '1' [03] '0' [02]
|
||||
" out %2,%4 \n\t" // '1' [--] '0' [03] - fe-low
|
||||
" lsl %1 \n\t" // '1' [04] '0' [04]
|
||||
" sbrs %1,7 \n\t" // '1' [03] '0' [02]
|
||||
" out %2,%4 \n\t" // '1' [--] '0' [03] - fe-low
|
||||
" lsl %1 \n\t" // '1' [04] '0' [04]
|
||||
#if (w2_nops & 1)
|
||||
w_nop1
|
||||
#endif
|
||||
|
|
@ -144,7 +144,7 @@ static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t
|
|||
#if (w2_nops & 16)
|
||||
w_nop16
|
||||
#endif
|
||||
" out %2,%4 \n\t" // '1' [+1] '0' [+1] - fe-high
|
||||
" out %2,%4 \n\t" // '1' [+1] '0' [+1] - fe-high
|
||||
#if (w3_nops & 1)
|
||||
w_nop1
|
||||
#endif
|
||||
|
|
@ -161,8 +161,8 @@ static inline void ws2812_sendarray_mask(uint8_t *data, uint16_t datlen, uint8_t
|
|||
w_nop16
|
||||
#endif
|
||||
|
||||
" dec %0 \n\t" // '1' [+2] '0' [+2]
|
||||
" brne loop%=\n\t" // '1' [+3] '0' [+4]
|
||||
" dec %0 \n\t" // '1' [+2] '0' [+2]
|
||||
" brne loop%=\n\t" // '1' [+3] '0' [+4]
|
||||
: "=&d"(ctr)
|
||||
: "r"(curbyte), "I"(_SFR_IO_ADDR(PORTx_ADDRESS(RGB_DI_PIN))), "r"(maskhi), "r"(masklo));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,7 +13,9 @@
|
|||
# define WS2812_TIMEOUT 100
|
||||
#endif
|
||||
|
||||
void ws2812_init(void) { i2c_init(); }
|
||||
void ws2812_init(void) {
|
||||
i2c_init();
|
||||
}
|
||||
|
||||
// Setleds for standard RGB
|
||||
void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) {
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
|
||||
#include <avr/io.h>
|
||||
|
||||
#define PORT_SHIFTER 4 // this may be 4 for all AVR chips
|
||||
#define PORT_SHIFTER 4 // this may be 4 for all AVR chips
|
||||
|
||||
// If you want to add more to this list, reference the PINx definitions in these header
|
||||
// files: https://github.com/vancegroup-mirrors/avr-libc/tree/master/avr-libc/include/avr
|
||||
|
|
|
|||
|
|
@ -17,4 +17,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|||
#include "xprintf.h"
|
||||
#include "sendchar.h"
|
||||
|
||||
void print_set_sendchar(sendchar_func_t func) { xdev_out(func); }
|
||||
void print_set_sendchar(sendchar_func_t func) {
|
||||
xdev_out(func);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
#if SLEEP_LED_TIMER == 1
|
||||
# define TCCRxB TCCR1B
|
||||
# define TIMERx_COMPA_vect TIMER1_COMPA_vect
|
||||
# if defined(__AVR_ATmega32A__) // This MCU has only one TIMSK register
|
||||
# if defined(__AVR_ATmega32A__) // This MCU has only one TIMSK register
|
||||
# define TIMSKx TIMSK
|
||||
# else
|
||||
# define TIMSKx TIMSK1
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ ISR(WDT_vect) {
|
|||
// compensate timer for sleep
|
||||
switch (wdt_timeout) {
|
||||
case WDTO_15MS:
|
||||
timer_count += 15 + 2; // WDTO_15MS + 2(from observation)
|
||||
timer_count += 15 + 2; // WDTO_15MS + 2(from observation)
|
||||
break;
|
||||
default:;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -73,7 +73,9 @@ void timer_init(void) {
|
|||
* FIXME: needs doc
|
||||
*/
|
||||
inline void timer_clear(void) {
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { timer_count = 0; }
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
timer_count = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/** \brief timer read
|
||||
|
|
@ -83,7 +85,9 @@ inline void timer_clear(void) {
|
|||
inline uint16_t timer_read(void) {
|
||||
uint32_t t;
|
||||
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { t = timer_count; }
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
t = timer_count;
|
||||
}
|
||||
|
||||
return (t & 0xFFFF);
|
||||
}
|
||||
|
|
@ -95,7 +99,9 @@ inline uint16_t timer_read(void) {
|
|||
inline uint32_t timer_read32(void) {
|
||||
uint32_t t;
|
||||
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { t = timer_count; }
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
t = timer_count;
|
||||
}
|
||||
|
||||
return t;
|
||||
}
|
||||
|
|
@ -107,7 +113,9 @@ inline uint32_t timer_read32(void) {
|
|||
inline uint16_t timer_elapsed(uint16_t last) {
|
||||
uint32_t t;
|
||||
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { t = timer_count; }
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
t = timer_count;
|
||||
}
|
||||
|
||||
return TIMER_DIFF_16((t & 0xFFFF), last);
|
||||
}
|
||||
|
|
@ -119,7 +127,9 @@ inline uint16_t timer_elapsed(uint16_t last) {
|
|||
inline uint32_t timer_elapsed32(uint32_t last) {
|
||||
uint32_t t;
|
||||
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { t = timer_count; }
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
t = timer_count;
|
||||
}
|
||||
|
||||
return TIMER_DIFF_32(t, last);
|
||||
}
|
||||
|
|
@ -130,4 +140,6 @@ inline uint32_t timer_elapsed32(uint32_t last) {
|
|||
#else
|
||||
# define TIMER_INTERRUPT_VECTOR TIMER0_COMP_vect
|
||||
#endif
|
||||
ISR(TIMER_INTERRUPT_VECTOR, ISR_NOBLOCK) { timer_count++; }
|
||||
ISR(TIMER_INTERRUPT_VECTOR, ISR_NOBLOCK) {
|
||||
timer_count++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ void enter_bootloader_mode_if_requested(void) {}
|
|||
# define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4)
|
||||
|
||||
__attribute__((weak)) void bootloader_jump(void) {
|
||||
*MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
|
||||
*MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -18,4 +18,6 @@
|
|||
|
||||
#include <ch.h>
|
||||
|
||||
__attribute__((weak)) void bootloader_jump(void) { NVIC_SystemReset(); }
|
||||
__attribute__((weak)) void bootloader_jump(void) {
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
#pragma once
|
||||
|
||||
#ifndef USB_VBUS_PIN
|
||||
# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used
|
||||
# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used
|
||||
#endif
|
||||
|
||||
// STM32 compatibility
|
||||
|
|
@ -76,7 +76,7 @@
|
|||
|
||||
# if defined(K20x) || defined(KL2x)
|
||||
# define USE_I2CV1
|
||||
# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed
|
||||
# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed
|
||||
# define USE_GPIOV1
|
||||
# endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -101,9 +101,9 @@
|
|||
|
||||
// Options are 12, 10, 8, and 6 bit.
|
||||
#ifndef ADC_RESOLUTION
|
||||
# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4
|
||||
# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4
|
||||
# define ADC_RESOLUTION ADC_CFGR_RES_10BITS
|
||||
# else // ADCv1, ADCv5, or the bodge for ADCv2 above
|
||||
# else // ADCv1, ADCv5, or the bodge for ADCv2 above
|
||||
# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
|
||||
# endif
|
||||
#endif
|
||||
|
|
@ -123,7 +123,7 @@ static ADCConversionGroup adcConversionGroup = {
|
|||
.smpr = ADC_SAMPLING_RATE,
|
||||
#elif defined(USE_ADCV2)
|
||||
# if !defined(STM32F1XX) && !defined(GD32VF103)
|
||||
.cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
|
||||
.cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
|
||||
# endif
|
||||
.smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
|
||||
.smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
|
||||
|
|
|
|||
|
|
@ -28,7 +28,9 @@ typedef struct {
|
|||
uint8_t adc;
|
||||
} adc_mux;
|
||||
#define TO_MUX(i, a) \
|
||||
(adc_mux) { i, a }
|
||||
(adc_mux) { \
|
||||
i, a \
|
||||
}
|
||||
|
||||
int16_t analogReadPin(pin_t pin);
|
||||
int16_t analogReadPinAdc(pin_t pin, uint8_t adc);
|
||||
|
|
|
|||
|
|
@ -52,19 +52,19 @@ static const dacsample_t dac_buffer_sine[AUDIO_DAC_BUFFER_SIZE] = {
|
|||
// 256 values, max 4095
|
||||
0x0, 0x1, 0x2, 0x6, 0xa, 0xf, 0x16, 0x1e, 0x27, 0x32, 0x3d, 0x4a, 0x58, 0x67, 0x78, 0x89, 0x9c, 0xb0, 0xc5, 0xdb, 0xf2, 0x10a, 0x123, 0x13e, 0x159, 0x175, 0x193, 0x1b1, 0x1d1, 0x1f1, 0x212, 0x235, 0x258, 0x27c, 0x2a0, 0x2c6, 0x2ed, 0x314, 0x33c, 0x365, 0x38e, 0x3b8, 0x3e3, 0x40e, 0x43a, 0x467, 0x494, 0x4c2, 0x4f0, 0x51f, 0x54e, 0x57d, 0x5ad, 0x5dd, 0x60e, 0x63f, 0x670, 0x6a1, 0x6d3, 0x705, 0x737, 0x769, 0x79b, 0x7cd, 0x800, 0x832, 0x864, 0x896, 0x8c8, 0x8fa, 0x92c, 0x95e, 0x98f, 0x9c0, 0x9f1, 0xa22, 0xa52, 0xa82, 0xab1, 0xae0, 0xb0f, 0xb3d, 0xb6b, 0xb98, 0xbc5, 0xbf1, 0xc1c, 0xc47, 0xc71, 0xc9a, 0xcc3, 0xceb, 0xd12, 0xd39, 0xd5f, 0xd83, 0xda7, 0xdca, 0xded, 0xe0e, 0xe2e, 0xe4e, 0xe6c, 0xe8a, 0xea6, 0xec1, 0xedc, 0xef5, 0xf0d, 0xf24, 0xf3a, 0xf4f, 0xf63, 0xf76, 0xf87, 0xf98, 0xfa7, 0xfb5, 0xfc2, 0xfcd, 0xfd8, 0xfe1, 0xfe9, 0xff0, 0xff5, 0xff9, 0xffd, 0xffe,
|
||||
0xfff, 0xffe, 0xffd, 0xff9, 0xff5, 0xff0, 0xfe9, 0xfe1, 0xfd8, 0xfcd, 0xfc2, 0xfb5, 0xfa7, 0xf98, 0xf87, 0xf76, 0xf63, 0xf4f, 0xf3a, 0xf24, 0xf0d, 0xef5, 0xedc, 0xec1, 0xea6, 0xe8a, 0xe6c, 0xe4e, 0xe2e, 0xe0e, 0xded, 0xdca, 0xda7, 0xd83, 0xd5f, 0xd39, 0xd12, 0xceb, 0xcc3, 0xc9a, 0xc71, 0xc47, 0xc1c, 0xbf1, 0xbc5, 0xb98, 0xb6b, 0xb3d, 0xb0f, 0xae0, 0xab1, 0xa82, 0xa52, 0xa22, 0x9f1, 0x9c0, 0x98f, 0x95e, 0x92c, 0x8fa, 0x8c8, 0x896, 0x864, 0x832, 0x800, 0x7cd, 0x79b, 0x769, 0x737, 0x705, 0x6d3, 0x6a1, 0x670, 0x63f, 0x60e, 0x5dd, 0x5ad, 0x57d, 0x54e, 0x51f, 0x4f0, 0x4c2, 0x494, 0x467, 0x43a, 0x40e, 0x3e3, 0x3b8, 0x38e, 0x365, 0x33c, 0x314, 0x2ed, 0x2c6, 0x2a0, 0x27c, 0x258, 0x235, 0x212, 0x1f1, 0x1d1, 0x1b1, 0x193, 0x175, 0x159, 0x13e, 0x123, 0x10a, 0xf2, 0xdb, 0xc5, 0xb0, 0x9c, 0x89, 0x78, 0x67, 0x58, 0x4a, 0x3d, 0x32, 0x27, 0x1e, 0x16, 0xf, 0xa, 0x6, 0x2, 0x1};
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SINE
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SINE
|
||||
#ifdef AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE
|
||||
static const dacsample_t dac_buffer_triangle[AUDIO_DAC_BUFFER_SIZE] = {
|
||||
// 256 values, max 4095
|
||||
0x0, 0x20, 0x40, 0x60, 0x80, 0xa0, 0xc0, 0xe0, 0x100, 0x120, 0x140, 0x160, 0x180, 0x1a0, 0x1c0, 0x1e0, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0x300, 0x320, 0x340, 0x360, 0x380, 0x3a0, 0x3c0, 0x3e0, 0x400, 0x420, 0x440, 0x460, 0x480, 0x4a0, 0x4c0, 0x4e0, 0x500, 0x520, 0x540, 0x560, 0x580, 0x5a0, 0x5c0, 0x5e0, 0x600, 0x620, 0x640, 0x660, 0x680, 0x6a0, 0x6c0, 0x6e0, 0x700, 0x720, 0x740, 0x760, 0x780, 0x7a0, 0x7c0, 0x7e0, 0x800, 0x81f, 0x83f, 0x85f, 0x87f, 0x89f, 0x8bf, 0x8df, 0x8ff, 0x91f, 0x93f, 0x95f, 0x97f, 0x99f, 0x9bf, 0x9df, 0x9ff, 0xa1f, 0xa3f, 0xa5f, 0xa7f, 0xa9f, 0xabf, 0xadf, 0xaff, 0xb1f, 0xb3f, 0xb5f, 0xb7f, 0xb9f, 0xbbf, 0xbdf, 0xbff, 0xc1f, 0xc3f, 0xc5f, 0xc7f, 0xc9f, 0xcbf, 0xcdf, 0xcff, 0xd1f, 0xd3f, 0xd5f, 0xd7f, 0xd9f, 0xdbf, 0xddf, 0xdff, 0xe1f, 0xe3f, 0xe5f, 0xe7f, 0xe9f, 0xebf, 0xedf, 0xeff, 0xf1f, 0xf3f, 0xf5f, 0xf7f, 0xf9f, 0xfbf, 0xfdf,
|
||||
0xfff, 0xfdf, 0xfbf, 0xf9f, 0xf7f, 0xf5f, 0xf3f, 0xf1f, 0xeff, 0xedf, 0xebf, 0xe9f, 0xe7f, 0xe5f, 0xe3f, 0xe1f, 0xdff, 0xddf, 0xdbf, 0xd9f, 0xd7f, 0xd5f, 0xd3f, 0xd1f, 0xcff, 0xcdf, 0xcbf, 0xc9f, 0xc7f, 0xc5f, 0xc3f, 0xc1f, 0xbff, 0xbdf, 0xbbf, 0xb9f, 0xb7f, 0xb5f, 0xb3f, 0xb1f, 0xaff, 0xadf, 0xabf, 0xa9f, 0xa7f, 0xa5f, 0xa3f, 0xa1f, 0x9ff, 0x9df, 0x9bf, 0x99f, 0x97f, 0x95f, 0x93f, 0x91f, 0x8ff, 0x8df, 0x8bf, 0x89f, 0x87f, 0x85f, 0x83f, 0x81f, 0x800, 0x7e0, 0x7c0, 0x7a0, 0x780, 0x760, 0x740, 0x720, 0x700, 0x6e0, 0x6c0, 0x6a0, 0x680, 0x660, 0x640, 0x620, 0x600, 0x5e0, 0x5c0, 0x5a0, 0x580, 0x560, 0x540, 0x520, 0x500, 0x4e0, 0x4c0, 0x4a0, 0x480, 0x460, 0x440, 0x420, 0x400, 0x3e0, 0x3c0, 0x3a0, 0x380, 0x360, 0x340, 0x320, 0x300, 0x2e0, 0x2c0, 0x2a0, 0x280, 0x260, 0x240, 0x220, 0x200, 0x1e0, 0x1c0, 0x1a0, 0x180, 0x160, 0x140, 0x120, 0x100, 0xe0, 0xc0, 0xa0, 0x80, 0x60, 0x40, 0x20};
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRIANGLE
|
||||
#ifdef AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE
|
||||
static const dacsample_t dac_buffer_square[AUDIO_DAC_BUFFER_SIZE] = {
|
||||
[0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = 0, // first and
|
||||
[AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = AUDIO_DAC_SAMPLE_MAX, // second half
|
||||
[0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = 0, // first and
|
||||
[AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = AUDIO_DAC_SAMPLE_MAX, // second half
|
||||
};
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_SQUARE
|
||||
/*
|
||||
// four steps: 0, 1/3, 2/3 and 1
|
||||
static const dacsample_t dac_buffer_staircase[AUDIO_DAC_BUFFER_SIZE] = {
|
||||
|
|
@ -77,7 +77,7 @@ static const dacsample_t dac_buffer_staircase[AUDIO_DAC_BUFFER_SIZE] = {
|
|||
#ifdef AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID
|
||||
static const dacsample_t dac_buffer_trapezoid[AUDIO_DAC_BUFFER_SIZE] = {0x0, 0x1f, 0x7f, 0xdf, 0x13f, 0x19f, 0x1ff, 0x25f, 0x2bf, 0x31f, 0x37f, 0x3df, 0x43f, 0x49f, 0x4ff, 0x55f, 0x5bf, 0x61f, 0x67f, 0x6df, 0x73f, 0x79f, 0x7ff, 0x85f, 0x8bf, 0x91f, 0x97f, 0x9df, 0xa3f, 0xa9f, 0xaff, 0xb5f, 0xbbf, 0xc1f, 0xc7f, 0xcdf, 0xd3f, 0xd9f, 0xdff, 0xe5f, 0xebf, 0xf1f, 0xf7f, 0xfdf, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff, 0xfff,
|
||||
0xfff, 0xfdf, 0xf7f, 0xf1f, 0xebf, 0xe5f, 0xdff, 0xd9f, 0xd3f, 0xcdf, 0xc7f, 0xc1f, 0xbbf, 0xb5f, 0xaff, 0xa9f, 0xa3f, 0x9df, 0x97f, 0x91f, 0x8bf, 0x85f, 0x7ff, 0x79f, 0x73f, 0x6df, 0x67f, 0x61f, 0x5bf, 0x55f, 0x4ff, 0x49f, 0x43f, 0x3df, 0x37f, 0x31f, 0x2bf, 0x25f, 0x1ff, 0x19f, 0x13f, 0xdf, 0x7f, 0x1f, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID
|
||||
#endif // AUDIO_DAC_SAMPLE_WAVEFORM_TRAPEZOID
|
||||
|
||||
static dacsample_t dac_buffer_empty[AUDIO_DAC_BUFFER_SIZE] = {AUDIO_DAC_OFF_VALUE};
|
||||
|
||||
|
|
@ -98,7 +98,7 @@ typedef enum {
|
|||
OUTPUT_REACHED_ZERO_BEFORE_OFF,
|
||||
OUTPUT_OFF,
|
||||
OUTPUT_OFF_1,
|
||||
OUTPUT_OFF_2, // trailing off: giving the DAC two more conversion cycles until the AUDIO_DAC_OFF_VALUE reaches the output, then turn the timer off, which leaves the output at that level
|
||||
OUTPUT_OFF_2, // trailing off: giving the DAC two more conversion cycles until the AUDIO_DAC_OFF_VALUE reaches the output, then turn the timer off, which leaves the output at that level
|
||||
number_of_output_states
|
||||
} output_states_t;
|
||||
output_states_t state = OUTPUT_OFF_2;
|
||||
|
|
@ -171,7 +171,7 @@ static void dac_end(DACDriver *dacp) {
|
|||
|
||||
// work on the other half of the buffer
|
||||
if (dacIsBufferComplete(dacp)) {
|
||||
sample_p += AUDIO_DAC_BUFFER_SIZE / 2; // 'half_index'
|
||||
sample_p += AUDIO_DAC_BUFFER_SIZE / 2; // 'half_index'
|
||||
}
|
||||
|
||||
for (uint8_t s = 0; s < AUDIO_DAC_BUFFER_SIZE / 2; s++) {
|
||||
|
|
@ -196,8 +196,8 @@ static void dac_end(DACDriver *dacp) {
|
|||
* * *
|
||||
* =====*=*================================================= 0x0
|
||||
*/
|
||||
if (((sample_p[s] + (AUDIO_DAC_SAMPLE_MAX / 100)) > AUDIO_DAC_OFF_VALUE) && // value approaches from below
|
||||
(sample_p[s] < (AUDIO_DAC_OFF_VALUE + (AUDIO_DAC_SAMPLE_MAX / 100))) // or above
|
||||
if (((sample_p[s] + (AUDIO_DAC_SAMPLE_MAX / 100)) > AUDIO_DAC_OFF_VALUE) && // value approaches from below
|
||||
(sample_p[s] < (AUDIO_DAC_OFF_VALUE + (AUDIO_DAC_SAMPLE_MAX / 100))) // or above
|
||||
) {
|
||||
if ((OUTPUT_SHOULD_START == state) && (active_tones_snapshot_length > 0)) {
|
||||
state = OUTPUT_RUN_NORMALLY;
|
||||
|
|
@ -220,7 +220,7 @@ static void dac_end(DACDriver *dacp) {
|
|||
// -> saves cpu cycles (?)
|
||||
for (uint8_t i = 0; i < active_tones; i++) {
|
||||
float freq = audio_get_processed_frequency(i);
|
||||
if (freq > 0) { // disregard 'rest' notes, with valid frequency 0.0f; which would only lower the resulting waveform volume during the additive synthesis step
|
||||
if (freq > 0) { // disregard 'rest' notes, with valid frequency 0.0f; which would only lower the resulting waveform volume during the additive synthesis step
|
||||
active_tones_snapshot[active_tones_snapshot_length++] = freq;
|
||||
}
|
||||
}
|
||||
|
|
@ -321,7 +321,9 @@ void audio_driver_initialize() {
|
|||
gptStart(&GPTD6, &gpt6cfg1);
|
||||
}
|
||||
|
||||
void audio_driver_stop(void) { state = OUTPUT_SHOULD_STOP; }
|
||||
void audio_driver_stop(void) {
|
||||
state = OUTPUT_SHOULD_STOP;
|
||||
}
|
||||
|
||||
void audio_driver_start(void) {
|
||||
gptStartContinuous(&GPTD6, 2U);
|
||||
|
|
|
|||
|
|
@ -115,13 +115,15 @@ void channel_1_set_frequency(float freq) {
|
|||
channel_1_frequency = freq;
|
||||
|
||||
channel_1_stop();
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
return;
|
||||
|
||||
gpt6cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE;
|
||||
channel_1_start();
|
||||
}
|
||||
float channel_1_get_frequency(void) { return channel_1_frequency; }
|
||||
float channel_1_get_frequency(void) {
|
||||
return channel_1_frequency;
|
||||
}
|
||||
|
||||
void channel_2_start(void) {
|
||||
gptStart(&GPTD7, &gpt7cfg1);
|
||||
|
|
@ -140,13 +142,15 @@ void channel_2_set_frequency(float freq) {
|
|||
channel_2_frequency = freq;
|
||||
|
||||
channel_2_stop();
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
return;
|
||||
|
||||
gpt7cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE;
|
||||
channel_2_start();
|
||||
}
|
||||
float channel_2_get_frequency(void) { return channel_2_frequency; }
|
||||
float channel_2_get_frequency(void) {
|
||||
return channel_2_frequency;
|
||||
}
|
||||
|
||||
static void gpt_audio_state_cb(GPTDriver *gptp) {
|
||||
if (audio_update_state()) {
|
||||
|
|
@ -155,8 +159,8 @@ static void gpt_audio_state_cb(GPTDriver *gptp) {
|
|||
channel_1_set_frequency(audio_get_processed_frequency(0));
|
||||
channel_2_set_frequency(audio_get_processed_frequency(0));
|
||||
|
||||
#else // two separate audio outputs/speakers
|
||||
// primary speaker on A4, optional secondary on A5
|
||||
#else // two separate audio outputs/speakers
|
||||
// primary speaker on A4, optional secondary on A5
|
||||
if (AUDIO_PIN == A4) {
|
||||
channel_1_set_frequency(audio_get_processed_frequency(0));
|
||||
if (AUDIO_PIN_ALT == A5) {
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ static float channel_1_frequency = 0.0f;
|
|||
void channel_1_set_frequency(float freq) {
|
||||
channel_1_frequency = freq;
|
||||
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
return;
|
||||
|
||||
pwmcnt_t period = (pwmCFG.frequency / freq);
|
||||
|
|
@ -82,14 +82,18 @@ void channel_1_set_frequency(float freq) {
|
|||
PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100));
|
||||
}
|
||||
|
||||
float channel_1_get_frequency(void) { return channel_1_frequency; }
|
||||
float channel_1_get_frequency(void) {
|
||||
return channel_1_frequency;
|
||||
}
|
||||
|
||||
void channel_1_start(void) {
|
||||
pwmStop(&AUDIO_PWM_DRIVER);
|
||||
pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG);
|
||||
}
|
||||
|
||||
void channel_1_stop(void) { pwmStop(&AUDIO_PWM_DRIVER); }
|
||||
void channel_1_stop(void) {
|
||||
pwmStop(&AUDIO_PWM_DRIVER);
|
||||
}
|
||||
|
||||
static void gpt_callback(GPTDriver *gptp);
|
||||
GPTConfig gptCFG = {
|
||||
|
|
@ -108,9 +112,9 @@ void audio_driver_initialize(void) {
|
|||
pwmStart(&AUDIO_PWM_DRIVER, &pwmCFG);
|
||||
|
||||
// connect the AUDIO_PIN to the PWM hardware
|
||||
#if defined(USE_GPIOV1) // STM32F103C8
|
||||
#if defined(USE_GPIOV1) // STM32F103C8
|
||||
palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE_PUSHPULL);
|
||||
#else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command)
|
||||
#else // GPIOv2 (or GPIOv3 for f4xx, which is the same/compatible at this command)
|
||||
palSetLineMode(AUDIO_PIN, PAL_MODE_ALTERNATE(AUDIO_PWM_PAL_MODE));
|
||||
#endif
|
||||
|
||||
|
|
@ -135,10 +139,10 @@ void audio_driver_stop(void) {
|
|||
* and updates the pwm to output that frequency
|
||||
*/
|
||||
static void gpt_callback(GPTDriver *gptp) {
|
||||
float freq; // TODO: freq_alt
|
||||
float freq; // TODO: freq_alt
|
||||
|
||||
if (audio_update_state()) {
|
||||
freq = audio_get_processed_frequency(0); // freq_alt would be index=1
|
||||
freq = audio_get_processed_frequency(0); // freq_alt would be index=1
|
||||
channel_1_set_frequency(freq);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ static float channel_1_frequency = 0.0f;
|
|||
void channel_1_set_frequency(float freq) {
|
||||
channel_1_frequency = freq;
|
||||
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
if (freq <= 0.0) // a pause/rest has freq=0
|
||||
return;
|
||||
|
||||
pwmcnt_t period = (pwmCFG.frequency / freq);
|
||||
|
|
@ -68,7 +68,9 @@ void channel_1_set_frequency(float freq) {
|
|||
PWM_PERCENTAGE_TO_WIDTH(&AUDIO_PWM_DRIVER, (100 - note_timbre) * 100));
|
||||
}
|
||||
|
||||
float channel_1_get_frequency(void) { return channel_1_frequency; }
|
||||
float channel_1_get_frequency(void) {
|
||||
return channel_1_frequency;
|
||||
}
|
||||
|
||||
void channel_1_start(void) {
|
||||
pwmStop(&AUDIO_PWM_DRIVER);
|
||||
|
|
@ -81,10 +83,10 @@ void channel_1_start(void) {
|
|||
void channel_1_stop(void) {
|
||||
pwmStop(&AUDIO_PWM_DRIVER);
|
||||
|
||||
palClearLine(AUDIO_PIN); // leave the line low, after last note was played
|
||||
palClearLine(AUDIO_PIN); // leave the line low, after last note was played
|
||||
|
||||
#if defined(AUDIO_PIN_ALT) && defined(AUDIO_PIN_ALT_AS_NEGATIVE)
|
||||
palClearLine(AUDIO_PIN_ALT); // leave the line low, after last note was played
|
||||
palClearLine(AUDIO_PIN_ALT); // leave the line low, after last note was played
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -100,7 +102,7 @@ static void pwm_audio_period_callback(PWMDriver *pwmp) {
|
|||
static void pwm_audio_channel_interrupt_callback(PWMDriver *pwmp) {
|
||||
(void)pwmp;
|
||||
if (channel_1_frequency > 0) {
|
||||
palSetLine(AUDIO_PIN); // generate a PWM signal on any pin, not necessarily the one connected to the timer
|
||||
palSetLine(AUDIO_PIN); // generate a PWM signal on any pin, not necessarily the one connected to the timer
|
||||
#if defined(AUDIO_PIN_ALT) && defined(AUDIO_PIN_ALT_AS_NEGATIVE)
|
||||
palClearLine(AUDIO_PIN_ALT);
|
||||
#endif
|
||||
|
|
@ -131,7 +133,7 @@ void audio_driver_initialize(void) {
|
|||
palClearLine(AUDIO_PIN_ALT);
|
||||
#endif
|
||||
|
||||
pwmEnablePeriodicNotification(&AUDIO_PWM_DRIVER); // enable pwm callbacks
|
||||
pwmEnablePeriodicNotification(&AUDIO_PWM_DRIVER); // enable pwm callbacks
|
||||
pwmEnableChannelNotification(&AUDIO_PWM_DRIVER, AUDIO_PWM_CHANNEL - 1);
|
||||
|
||||
gptStart(&AUDIO_STATE_TIMER, &gptCFG);
|
||||
|
|
@ -155,10 +157,10 @@ void audio_driver_stop(void) {
|
|||
* and updates the pwm to output that frequency
|
||||
*/
|
||||
static void gpt_callback(GPTDriver *gptp) {
|
||||
float freq; // TODO: freq_alt
|
||||
float freq; // TODO: freq_alt
|
||||
|
||||
if (audio_update_state()) {
|
||||
freq = audio_get_processed_frequency(0); // freq_alt would be index=1
|
||||
freq = audio_get_processed_frequency(0); // freq_alt would be index=1
|
||||
channel_1_set_frequency(freq);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
# define STM32_ONBOARD_EEPROM_SIZE 1024
|
||||
# else
|
||||
# include "eeconfig.h"
|
||||
# define STM32_ONBOARD_EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO and EEPROM page sizing
|
||||
# define STM32_ONBOARD_EEPROM_SIZE (((EECONFIG_SIZE + 3) / 4) * 4) // based off eeconfig's current usage, aligned to 4-byte sizes, to deal with LTO and EEPROM page sizing
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -203,4 +203,6 @@ i2c_status_t i2c_readReg16(uint8_t devaddr, uint16_t regaddr, uint8_t* data, uin
|
|||
return chibios_to_qmk(&status);
|
||||
}
|
||||
|
||||
void i2c_stop(void) { i2cStop(&I2C_DRIVER); }
|
||||
void i2c_stop(void) {
|
||||
i2cStop(&I2C_DRIVER);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -50,14 +50,30 @@
|
|||
# error invalid SELECT_SOFT_SERIAL_SPEED value
|
||||
#endif
|
||||
|
||||
inline static void serial_delay(void) { wait_us(SERIAL_DELAY); }
|
||||
inline static void serial_delay_half(void) { wait_us(SERIAL_DELAY / 2); }
|
||||
inline static void serial_delay_blip(void) { wait_us(1); }
|
||||
inline static void serial_output(void) { setPinOutput(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_input(void) { setPinInputHigh(SOFT_SERIAL_PIN); }
|
||||
inline static bool serial_read_pin(void) { return !!readPin(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_low(void) { writePinLow(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_high(void) { writePinHigh(SOFT_SERIAL_PIN); }
|
||||
inline static void serial_delay(void) {
|
||||
wait_us(SERIAL_DELAY);
|
||||
}
|
||||
inline static void serial_delay_half(void) {
|
||||
wait_us(SERIAL_DELAY / 2);
|
||||
}
|
||||
inline static void serial_delay_blip(void) {
|
||||
wait_us(1);
|
||||
}
|
||||
inline static void serial_output(void) {
|
||||
setPinOutput(SOFT_SERIAL_PIN);
|
||||
}
|
||||
inline static void serial_input(void) {
|
||||
setPinInputHigh(SOFT_SERIAL_PIN);
|
||||
}
|
||||
inline static bool serial_read_pin(void) {
|
||||
return !!readPin(SOFT_SERIAL_PIN);
|
||||
}
|
||||
inline static void serial_low(void) {
|
||||
writePinLow(SOFT_SERIAL_PIN);
|
||||
}
|
||||
inline static void serial_high(void) {
|
||||
writePinHigh(SOFT_SERIAL_PIN);
|
||||
}
|
||||
|
||||
void interrupt_handler(void *arg);
|
||||
|
||||
|
|
@ -226,7 +242,7 @@ bool soft_serial_transaction(int sstd_index) {
|
|||
|
||||
uint8_t checksum = 0;
|
||||
// send data to the slave
|
||||
serial_write_byte(sstd_index); // first chunk is transaction id
|
||||
serial_write_byte(sstd_index); // first chunk is transaction id
|
||||
sync_recv();
|
||||
|
||||
for (int i = 0; i < trans->initiator2target_buffer_size; ++i) {
|
||||
|
|
@ -238,7 +254,7 @@ bool soft_serial_transaction(int sstd_index) {
|
|||
sync_recv();
|
||||
|
||||
serial_delay();
|
||||
serial_delay(); // read mid pulses
|
||||
serial_delay(); // read mid pulses
|
||||
|
||||
// receive data from the slave
|
||||
uint8_t checksum_computed = 0;
|
||||
|
|
|
|||
|
|
@ -238,7 +238,7 @@ void soft_serial_initiator_init(void) {
|
|||
usart_master_init(&serial_driver);
|
||||
|
||||
#if defined(MCU_STM32) && defined(SERIAL_USART_PIN_SWAP)
|
||||
serial_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins
|
||||
serial_config.cr2 |= USART_CR2_SWAP; // master has swapped TX/RX pins
|
||||
#endif
|
||||
|
||||
sdStart(serial_driver, &serial_config);
|
||||
|
|
|
|||
|
|
@ -50,15 +50,15 @@
|
|||
#endif
|
||||
|
||||
#if !defined(USART_CR1_M0)
|
||||
# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so
|
||||
# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_CR1)
|
||||
# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length
|
||||
# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_CR2)
|
||||
# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits
|
||||
# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits
|
||||
#endif
|
||||
|
||||
#if !defined(SERIAL_USART_CR3)
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
|
|||
|
||||
#elif defined(HT32)
|
||||
spiConfig.cr0 = SPI_CR0_SELOEN;
|
||||
spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode
|
||||
spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode
|
||||
|
||||
if (lsbFirst) {
|
||||
spiConfig.cr1 |= SPI_CR1_FIRSTBIT;
|
||||
|
|
|
|||
|
|
@ -43,7 +43,9 @@ void uart_init(uint32_t baud) {
|
|||
}
|
||||
}
|
||||
|
||||
void uart_write(uint8_t data) { sdPut(&SERIAL_DRIVER, c); }
|
||||
void uart_write(uint8_t data) {
|
||||
sdPut(&SERIAL_DRIVER, c);
|
||||
}
|
||||
|
||||
uint8_t uart_read(void) {
|
||||
msg_t res = sdGet(&SERIAL_DRIVER);
|
||||
|
|
@ -51,8 +53,14 @@ uint8_t uart_read(void) {
|
|||
return (uint8_t)res;
|
||||
}
|
||||
|
||||
void uart_transmit(const uint8_t *data, uint16_t length) { sdWrite(&SERIAL_DRIVER, data, length); }
|
||||
void uart_transmit(const uint8_t *data, uint16_t length) {
|
||||
sdWrite(&SERIAL_DRIVER, data, length);
|
||||
}
|
||||
|
||||
void uart_receive(uint8_t *data, uint16_t length) { sdRead(&SERIAL_DRIVER, data, length); }
|
||||
void uart_receive(uint8_t *data, uint16_t length) {
|
||||
sdRead(&SERIAL_DRIVER, data, length);
|
||||
}
|
||||
|
||||
bool uart_available(void) { return !sdGetWouldBlock(&SERIAL_DRIVER); }
|
||||
bool uart_available(void) {
|
||||
return !sdGetWouldBlock(&SERIAL_DRIVER);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
#ifndef USBPD_UCPD1_CFG1
|
||||
# define USBPD_UCPD1_CFG1 (UCPD_CFG1_PSC_UCPDCLK_0 | UCPD_CFG1_TRANSWIN_3 | UCPD_CFG1_IFRGAP_4 | UCPD_CFG1_HBITCLKDIV_4)
|
||||
#endif // USBPD_UCPD1_CFG1
|
||||
#endif // USBPD_UCPD1_CFG1
|
||||
|
||||
// Initialises the USBPD subsystem
|
||||
__attribute__((weak)) void usbpd_init(void) {
|
||||
|
|
@ -64,7 +64,7 @@ __attribute__((weak)) usbpd_allowance_t usbpd_get_allowance(void) {
|
|||
switch (vstate_max) {
|
||||
case 0:
|
||||
case 1:
|
||||
return USBPD_500MA; // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device.
|
||||
return USBPD_500MA; // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device.
|
||||
case 2:
|
||||
return USBPD_1500MA;
|
||||
case 3:
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
# define NOP_FUDGE 0.4
|
||||
# else
|
||||
# error("NOP_FUDGE configuration required")
|
||||
# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot
|
||||
# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
|
@ -25,12 +25,12 @@
|
|||
// The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased
|
||||
// to values like 600000 ns. If it is too small, the pixels will show nothing most of the time.
|
||||
#ifndef WS2812_RES
|
||||
# define WS2812_RES (1000 * WS2812_TRST_US) // Width of the low gap between bits to cause a frame to latch
|
||||
# define WS2812_RES (1000 * WS2812_TRST_US) // Width of the low gap between bits to cause a frame to latch
|
||||
#endif
|
||||
|
||||
#define NUMBER_NOPS 6
|
||||
#define CYCLES_PER_SEC (CPU_CLOCK / NUMBER_NOPS * NOP_FUDGE)
|
||||
#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
|
||||
#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
|
||||
#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC)
|
||||
#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE)
|
||||
|
||||
|
|
@ -67,7 +67,9 @@ void sendByte(uint8_t byte) {
|
|||
}
|
||||
}
|
||||
|
||||
void ws2812_init(void) { palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE); }
|
||||
void ws2812_init(void) {
|
||||
palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE);
|
||||
}
|
||||
|
||||
// Setleds for standard RGB
|
||||
void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) {
|
||||
|
|
|
|||
|
|
@ -11,19 +11,19 @@
|
|||
#endif
|
||||
|
||||
#ifndef WS2812_PWM_DRIVER
|
||||
# define WS2812_PWM_DRIVER PWMD2 // TIMx
|
||||
# define WS2812_PWM_DRIVER PWMD2 // TIMx
|
||||
#endif
|
||||
#ifndef WS2812_PWM_CHANNEL
|
||||
# define WS2812_PWM_CHANNEL 2 // Channel
|
||||
# define WS2812_PWM_CHANNEL 2 // Channel
|
||||
#endif
|
||||
#ifndef WS2812_PWM_PAL_MODE
|
||||
# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value
|
||||
# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value
|
||||
#endif
|
||||
#ifndef WS2812_DMA_STREAM
|
||||
# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP
|
||||
# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP
|
||||
#endif
|
||||
#ifndef WS2812_DMA_CHANNEL
|
||||
# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP
|
||||
# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP
|
||||
#endif
|
||||
#if (STM32_DMA_SUPPORTS_DMAMUX == TRUE) && !defined(WS2812_DMAMUX_ID)
|
||||
# error "please consult your MCU's datasheet and specify in your config.h: #define WS2812_DMAMUX_ID STM32_DMAMUX1_TIM?_UP"
|
||||
|
|
@ -56,7 +56,7 @@
|
|||
|
||||
#ifndef WS2812_PWM_TARGET_PERIOD
|
||||
//# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...?
|
||||
# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1
|
||||
# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1
|
||||
#endif
|
||||
|
||||
/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
|
||||
|
|
@ -259,8 +259,10 @@ write/read to/from the other buffer).
|
|||
void ws2812_init(void) {
|
||||
// Initialize led frame buffer
|
||||
uint32_t i;
|
||||
for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle
|
||||
for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero
|
||||
for (i = 0; i < WS2812_COLOR_BIT_N; i++)
|
||||
ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle
|
||||
for (i = 0; i < WS2812_RESET_BIT_N; i++)
|
||||
ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero
|
||||
|
||||
palSetLineMode(RGB_DI_PIN, WS2812_OUTPUT_MODE);
|
||||
|
||||
|
|
@ -268,22 +270,22 @@ void ws2812_init(void) {
|
|||
//#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
|
||||
static const PWMConfig ws2812_pwm_config = {
|
||||
.frequency = WS2812_PWM_FREQUENCY,
|
||||
.period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
|
||||
.period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
|
||||
.callback = NULL,
|
||||
.channels =
|
||||
{
|
||||
[0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled
|
||||
[WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL}, // Turn on the channel we care about
|
||||
[0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled
|
||||
[WS2812_PWM_CHANNEL - 1] = {.mode = WS2812_PWM_OUTPUT_MODE, .callback = NULL}, // Turn on the channel we care about
|
||||
},
|
||||
.cr2 = 0,
|
||||
.dier = TIM_DIER_UDE, // DMA on update event for next period
|
||||
.dier = TIM_DIER_UDE, // DMA on update event for next period
|
||||
};
|
||||
//#pragma GCC diagnostic pop // Restore command-line warning options
|
||||
|
||||
// Configure DMA
|
||||
// dmaInit(); // Joe added this
|
||||
dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA_STREAM(0), 10, NULL, NULL);
|
||||
dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
|
||||
dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
|
||||
dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer);
|
||||
dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N);
|
||||
dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
|
||||
|
|
@ -302,7 +304,7 @@ void ws2812_init(void) {
|
|||
// ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer,
|
||||
// disable counting, enable the channel, and then make whatever configuration changes we need.
|
||||
pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config);
|
||||
pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in
|
||||
pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in
|
||||
}
|
||||
|
||||
void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) {
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0)
|
||||
#elif WS2812_SPI_DIVISOR == 8
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1)
|
||||
#elif WS2812_SPI_DIVISOR == 16 // same as default
|
||||
#elif WS2812_SPI_DIVISOR == 16 // same as default
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#elif WS2812_SPI_DIVISOR == 32
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2)
|
||||
|
|
@ -53,14 +53,14 @@
|
|||
#elif WS2812_SPI_DIVISOR == 256
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
|
||||
#else
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default
|
||||
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default
|
||||
#endif
|
||||
|
||||
// Use SPI circular buffer
|
||||
#ifdef WS2812_SPI_USE_CIRCULAR_BUFFER
|
||||
# define WS2812_SPI_BUFFER_MODE 1 // circular buffer
|
||||
# define WS2812_SPI_BUFFER_MODE 1 // circular buffer
|
||||
#else
|
||||
# define WS2812_SPI_BUFFER_MODE 0 // normal buffer
|
||||
# define WS2812_SPI_BUFFER_MODE 0 // normal buffer
|
||||
#endif
|
||||
|
||||
#if defined(USE_GPIOV1)
|
||||
|
|
@ -104,20 +104,30 @@ static void set_led_color_rgb(LED_TYPE color, int pos) {
|
|||
uint8_t* tx_start = &txbuf[PREAMBLE_SIZE];
|
||||
|
||||
#if (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_GRB)
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
|
||||
#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_RGB)
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
|
||||
#elif (WS2812_BYTE_ORDER == WS2812_BYTE_ORDER_BGR)
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.b, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.r, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.b, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.g, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.r, j);
|
||||
#endif
|
||||
#ifdef RGBW
|
||||
for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 4 + j] = get_protocol_eq(color.w, j);
|
||||
for (int j = 0; j < 4; j++)
|
||||
tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 4 + j] = get_protocol_eq(color.w, j);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -126,7 +136,7 @@ void ws2812_init(void) {
|
|||
|
||||
#ifdef WS2812_SPI_SCK_PIN
|
||||
palSetLineMode(WS2812_SPI_SCK_PIN, WS2812_SCK_OUTPUT_MODE);
|
||||
#endif // WS2812_SPI_SCK_PIN
|
||||
#endif // WS2812_SPI_SCK_PIN
|
||||
|
||||
// TODO: more dynamic baudrate
|
||||
static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X};
|
||||
|
|
|
|||
|
|
@ -560,9 +560,13 @@ uint16_t EEPROM_ReadDataWord(uint16_t Address) {
|
|||
/*****************************************************************************
|
||||
* Bind to eeprom_driver.c
|
||||
*******************************************************************************/
|
||||
void eeprom_driver_init(void) { EEPROM_Init(); }
|
||||
void eeprom_driver_init(void) {
|
||||
EEPROM_Init();
|
||||
}
|
||||
|
||||
void eeprom_driver_erase(void) { EEPROM_Erase(); }
|
||||
void eeprom_driver_erase(void) {
|
||||
EEPROM_Erase();
|
||||
}
|
||||
|
||||
void eeprom_read_block(void *buf, const void *addr, size_t len) {
|
||||
const uint8_t *src = (const uint8_t *)addr;
|
||||
|
|
|
|||
|
|
@ -20,41 +20,41 @@
|
|||
#if !defined(FEE_PAGE_SIZE) || !defined(FEE_PAGE_COUNT)
|
||||
# if defined(STM32F103xB) || defined(STM32F042x6) || defined(GD32VF103C8) || defined(GD32VF103CB)
|
||||
# ifndef FEE_PAGE_SIZE
|
||||
# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte
|
||||
# define FEE_PAGE_SIZE 0x400 // Page size = 1KByte
|
||||
# endif
|
||||
# ifndef FEE_PAGE_COUNT
|
||||
# define FEE_PAGE_COUNT 2 // How many pages are used
|
||||
# define FEE_PAGE_COUNT 2 // How many pages are used
|
||||
# endif
|
||||
# elif defined(STM32F103xE) || defined(STM32F303xC) || defined(STM32F072xB) || defined(STM32F070xB)
|
||||
# ifndef FEE_PAGE_SIZE
|
||||
# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte
|
||||
# define FEE_PAGE_SIZE 0x800 // Page size = 2KByte
|
||||
# endif
|
||||
# ifndef FEE_PAGE_COUNT
|
||||
# define FEE_PAGE_COUNT 4 // How many pages are used
|
||||
# define FEE_PAGE_COUNT 4 // How many pages are used
|
||||
# endif
|
||||
# elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE)
|
||||
# ifndef FEE_PAGE_SIZE
|
||||
# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte
|
||||
# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte
|
||||
# endif
|
||||
# ifndef FEE_PAGE_COUNT
|
||||
# define FEE_PAGE_COUNT 1 // How many pages are used
|
||||
# define FEE_PAGE_COUNT 1 // How many pages are used
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if !defined(FEE_MCU_FLASH_SIZE)
|
||||
# if defined(STM32F042x6)
|
||||
# define FEE_MCU_FLASH_SIZE 32 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 32 // Size in Kb
|
||||
# elif defined(GD32VF103C8)
|
||||
# define FEE_MCU_FLASH_SIZE 64 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 64 // Size in Kb
|
||||
# elif defined(STM32F103xB) || defined(STM32F072xB) || defined(STM32F070xB) || defined(GD32VF103CB)
|
||||
# define FEE_MCU_FLASH_SIZE 128 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 128 // Size in Kb
|
||||
# elif defined(STM32F303xC) || defined(STM32F401xC)
|
||||
# define FEE_MCU_FLASH_SIZE 256 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 256 // Size in Kb
|
||||
# elif defined(STM32F103xE) || defined(STM32F401xE) || defined(STM32F411xE)
|
||||
# define FEE_MCU_FLASH_SIZE 512 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 512 // Size in Kb
|
||||
# elif defined(STM32F405xG)
|
||||
# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb
|
||||
# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
|
@ -62,7 +62,7 @@
|
|||
#if !defined(FEE_PAGE_BASE_ADDRESS)
|
||||
# if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F405xG) || defined(STM32F411xE)
|
||||
# ifndef FEE_PAGE_BASE_ADDRESS
|
||||
# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page
|
||||
# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page
|
||||
# endif
|
||||
# else
|
||||
# ifndef FEE_FLASH_BASE
|
||||
|
|
|
|||
|
|
@ -60,19 +60,19 @@
|
|||
|
||||
// Minimum EEPROM Endurance
|
||||
// ------------------------
|
||||
# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word
|
||||
# if (EEPROM_SIZE == 2048) // 35000 writes/byte or 70000 writes/word
|
||||
# define EEESIZE 0x33
|
||||
# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word
|
||||
# elif (EEPROM_SIZE == 1024) // 75000 writes/byte or 150000 writes/word
|
||||
# define EEESIZE 0x34
|
||||
# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word
|
||||
# elif (EEPROM_SIZE == 512) // 155000 writes/byte or 310000 writes/word
|
||||
# define EEESIZE 0x35
|
||||
# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word
|
||||
# elif (EEPROM_SIZE == 256) // 315000 writes/byte or 630000 writes/word
|
||||
# define EEESIZE 0x36
|
||||
# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word
|
||||
# elif (EEPROM_SIZE == 128) // 635000 writes/byte or 1270000 writes/word
|
||||
# define EEESIZE 0x37
|
||||
# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word
|
||||
# elif (EEPROM_SIZE == 64) // 1275000 writes/byte or 2550000 writes/word
|
||||
# define EEESIZE 0x38
|
||||
# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word
|
||||
# elif (EEPROM_SIZE == 32) // 2555000 writes/byte or 5110000 writes/word
|
||||
# define EEESIZE 0x39
|
||||
# endif
|
||||
|
||||
|
|
@ -88,9 +88,9 @@ void eeprom_initialize(void) {
|
|||
if (FTFL->FCNFG & FTFL_FCNFG_RAMRDY) {
|
||||
// FlexRAM is configured as traditional RAM
|
||||
// We need to reconfigure for EEPROM usage
|
||||
FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command
|
||||
FTFL->FCCOB4 = EEESIZE; // EEPROM Size
|
||||
FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup
|
||||
FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command
|
||||
FTFL->FCCOB4 = EEESIZE; // EEPROM Size
|
||||
FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup
|
||||
__disable_irq();
|
||||
// do_flash_cmd() must execute from RAM. Luckily the C syntax is simple...
|
||||
(*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFL->FSTAT));
|
||||
|
|
@ -98,7 +98,7 @@ void eeprom_initialize(void) {
|
|||
status = FTFL->FSTAT;
|
||||
if (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL)) {
|
||||
FTFL->FSTAT = (status & (FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL));
|
||||
return; // error
|
||||
return; // error
|
||||
}
|
||||
}
|
||||
// wait for eeprom to become ready (is this really necessary?)
|
||||
|
|
@ -162,7 +162,9 @@ void eeprom_read_block(void *buf, const void *addr, uint32_t len) {
|
|||
*
|
||||
* FIXME: needs doc
|
||||
*/
|
||||
int eeprom_is_ready(void) { return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0; }
|
||||
int eeprom_is_ready(void) {
|
||||
return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0;
|
||||
}
|
||||
|
||||
/** \brief flexram wait
|
||||
*
|
||||
|
|
@ -486,7 +488,9 @@ void eeprom_read_block(void *buf, const void *addr, uint32_t len) {
|
|||
}
|
||||
}
|
||||
|
||||
int eeprom_is_ready(void) { return 1; }
|
||||
int eeprom_is_ready(void) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
void eeprom_write_word(uint16_t *addr, uint16_t value) {
|
||||
uint8_t *p = (uint8_t *)addr;
|
||||
|
|
@ -515,7 +519,9 @@ void eeprom_write_block(const void *buf, void *addr, uint32_t len) {
|
|||
#endif /* chip selection */
|
||||
// The update functions just calls write for now, but could probably be optimized
|
||||
|
||||
void eeprom_update_byte(uint8_t *addr, uint8_t value) { eeprom_write_byte(addr, value); }
|
||||
void eeprom_update_byte(uint8_t *addr, uint8_t value) {
|
||||
eeprom_write_byte(addr, value);
|
||||
}
|
||||
|
||||
void eeprom_update_word(uint16_t *addr, uint16_t value) {
|
||||
uint8_t *p = (uint8_t *)addr;
|
||||
|
|
|
|||
|
|
@ -97,10 +97,10 @@
|
|||
/* Serial USART redefines. */
|
||||
#if HAL_USE_SERIAL
|
||||
# if !defined(SERIAL_USART_CR1)
|
||||
# define SERIAL_USART_CR1 (USART_CTL0_PCEN | USART_CTL0_PM | USART_CTL0_WL) // parity enable, odd parity, 9 bit length
|
||||
# define SERIAL_USART_CR1 (USART_CTL0_PCEN | USART_CTL0_PM | USART_CTL0_WL) // parity enable, odd parity, 9 bit length
|
||||
# endif
|
||||
# if !defined(SERIAL_USART_CR2)
|
||||
# define SERIAL_USART_CR2 (USART_CTL1_STB_1) // 2 stop bits
|
||||
# define SERIAL_USART_CR2 (USART_CTL1_STB_1) // 2 stop bits
|
||||
# endif
|
||||
# if !defined(SERIAL_USART_CR3)
|
||||
# define SERIAL_USART_CR3 0x0
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ void sleep_led_init(void) {
|
|||
/* Reset LPTMR settings */
|
||||
LPTMR0->CSR = 0;
|
||||
/* Set the compare value */
|
||||
LPTMR0->CMR = 0; // trigger on counter value (i.e. every time)
|
||||
LPTMR0->CMR = 0; // trigger on counter value (i.e. every time)
|
||||
|
||||
/* Set up clock source and prescaler */
|
||||
/* Software PWM
|
||||
|
|
@ -118,11 +118,11 @@ void sleep_led_init(void) {
|
|||
/* === OPTION 2 === */
|
||||
# if 1
|
||||
// nMHz IRC (n=4 on KL25Z, KL26Z and K20x; n=2 or 8 on KL27Z)
|
||||
MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock
|
||||
# if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others
|
||||
MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock
|
||||
# if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others
|
||||
MCG->MC |= MCG_MC_LIRC_DIV2_DIV2;
|
||||
# endif /* KL27 */
|
||||
MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock
|
||||
# endif /* KL27 */
|
||||
MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock
|
||||
// to work in stop mode, also MCG_C1_IREFSTEN
|
||||
// Divide 4MHz by 2^N (N=6) => 62500 irqs/sec =>
|
||||
// => approx F=61, R=256, duration = 4
|
||||
|
|
@ -140,7 +140,7 @@ void sleep_led_init(void) {
|
|||
/* === END OPTIONS === */
|
||||
|
||||
/* Interrupt on TCF set (compare flag) */
|
||||
nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority
|
||||
nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority
|
||||
LPTMR0->CSR |= LPTMRx_CSR_TIE;
|
||||
}
|
||||
|
||||
|
|
@ -169,21 +169,33 @@ static void gptTimerCallback(GPTDriver *gptp) {
|
|||
static const GPTConfig gptcfg = {1000000, gptTimerCallback, 0, 0};
|
||||
|
||||
/* Initialise the timer */
|
||||
void sleep_led_init(void) { gptStart(&SLEEP_LED_GPT_DRIVER, &gptcfg); }
|
||||
void sleep_led_init(void) {
|
||||
gptStart(&SLEEP_LED_GPT_DRIVER, &gptcfg);
|
||||
}
|
||||
|
||||
void sleep_led_enable(void) { gptStartContinuous(&SLEEP_LED_GPT_DRIVER, gptcfg.frequency / 0xFFFF); }
|
||||
void sleep_led_enable(void) {
|
||||
gptStartContinuous(&SLEEP_LED_GPT_DRIVER, gptcfg.frequency / 0xFFFF);
|
||||
}
|
||||
|
||||
void sleep_led_disable(void) { gptStopTimer(&SLEEP_LED_GPT_DRIVER); }
|
||||
void sleep_led_disable(void) {
|
||||
gptStopTimer(&SLEEP_LED_GPT_DRIVER);
|
||||
}
|
||||
|
||||
void sleep_led_toggle(void) { (SLEEP_LED_GPT_DRIVER.state == GPT_READY) ? sleep_led_enable() : sleep_led_disable(); }
|
||||
void sleep_led_toggle(void) {
|
||||
(SLEEP_LED_GPT_DRIVER.state == GPT_READY) ? sleep_led_enable() : sleep_led_disable();
|
||||
}
|
||||
|
||||
#else /* platform selection: not on familiar chips */
|
||||
|
||||
void sleep_led_init(void) {}
|
||||
|
||||
void sleep_led_enable(void) { led_set(1 << USB_LED_CAPS_LOCK); }
|
||||
void sleep_led_enable(void) {
|
||||
led_set(1 << USB_LED_CAPS_LOCK);
|
||||
}
|
||||
|
||||
void sleep_led_disable(void) { led_set(0); }
|
||||
void sleep_led_disable(void) {
|
||||
led_set(0);
|
||||
}
|
||||
|
||||
void sleep_led_toggle(void) {
|
||||
// not implemented
|
||||
|
|
|
|||
|
|
@ -87,9 +87,13 @@ __attribute__((weak, used)) int _kill(int pid, int sig) {
|
|||
return -1;
|
||||
}
|
||||
|
||||
__attribute__((weak, used)) pid_t _getpid(void) { return 1; }
|
||||
__attribute__((weak, used)) pid_t _getpid(void) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
__attribute__((weak, used)) void _fini(void) { return; }
|
||||
__attribute__((weak, used)) void _fini(void) {
|
||||
return;
|
||||
}
|
||||
|
||||
__attribute__((weak, used, noreturn)) void _exit(int i) {
|
||||
while (1)
|
||||
|
|
|
|||
|
|
@ -73,7 +73,9 @@ void timer_clear(void) {
|
|||
chSysUnlock();
|
||||
}
|
||||
|
||||
uint16_t timer_read(void) { return (uint16_t)timer_read32(); }
|
||||
uint16_t timer_read(void) {
|
||||
return (uint16_t)timer_read32();
|
||||
}
|
||||
|
||||
uint32_t timer_read32(void) {
|
||||
chSysLock();
|
||||
|
|
@ -90,12 +92,16 @@ uint32_t timer_read32(void) {
|
|||
ms_offset += OVERFLOW_ADJUST_MS;
|
||||
}
|
||||
last_ticks = ticks;
|
||||
uint32_t ms_offset_copy = ms_offset; // read while still holding the lock to ensure a consistent value
|
||||
uint32_t ms_offset_copy = ms_offset; // read while still holding the lock to ensure a consistent value
|
||||
chSysUnlock();
|
||||
|
||||
return (uint32_t)TIME_I2MS(ticks) + ms_offset_copy;
|
||||
}
|
||||
|
||||
uint16_t timer_elapsed(uint16_t last) { return TIMER_DIFF_16(timer_read(), last); }
|
||||
uint16_t timer_elapsed(uint16_t last) {
|
||||
return TIMER_DIFF_16(timer_read(), last);
|
||||
}
|
||||
|
||||
uint32_t timer_elapsed32(uint32_t last) { return TIMER_DIFF_32(timer_read32(), last); }
|
||||
uint32_t timer_elapsed32(uint32_t last) {
|
||||
return TIMER_DIFF_32(timer_read32(), last);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,7 +18,9 @@ __attribute__((weak)) void suspend_power_down_user(void) {}
|
|||
*
|
||||
* FIXME: needs doc
|
||||
*/
|
||||
__attribute__((weak)) void suspend_power_down_kb(void) { suspend_power_down_user(); }
|
||||
__attribute__((weak)) void suspend_power_down_kb(void) {
|
||||
suspend_power_down_user();
|
||||
}
|
||||
|
||||
/** \brief run user level code immediately after wakeup
|
||||
*
|
||||
|
|
@ -30,7 +32,9 @@ __attribute__((weak)) void suspend_wakeup_init_user(void) {}
|
|||
*
|
||||
* FIXME: needs doc
|
||||
*/
|
||||
__attribute__((weak)) void suspend_wakeup_init_kb(void) { suspend_wakeup_init_user(); }
|
||||
__attribute__((weak)) void suspend_wakeup_init_kb(void) {
|
||||
suspend_wakeup_init_user();
|
||||
}
|
||||
|
||||
/** \brief suspend wakeup condition
|
||||
*
|
||||
|
|
|
|||
|
|
@ -68,7 +68,9 @@ void eeprom_write_block(const void *buf, void *addr, size_t len) {
|
|||
}
|
||||
}
|
||||
|
||||
void eeprom_update_byte(uint8_t *addr, uint8_t value) { eeprom_write_byte(addr, value); }
|
||||
void eeprom_update_byte(uint8_t *addr, uint8_t value) {
|
||||
eeprom_write_byte(addr, value);
|
||||
}
|
||||
|
||||
void eeprom_update_word(uint16_t *addr, uint16_t value) {
|
||||
uint8_t *p = (uint8_t *)addr;
|
||||
|
|
|
|||
|
|
@ -60,7 +60,9 @@ class EepromStm32Test : public testing::Test {
|
|||
~EepromStm32Test() {}
|
||||
|
||||
protected:
|
||||
void SetUp() override { EEPROM_Erase(); }
|
||||
void SetUp() override {
|
||||
EEPROM_Erase();
|
||||
}
|
||||
|
||||
void TearDown() override {
|
||||
#ifdef EEPROM_DEBUG
|
||||
|
|
@ -83,7 +85,7 @@ TEST_F(EepromStm32Test, TestReadGarbage) {
|
|||
garbage += i;
|
||||
FlashBuf[i] = garbage;
|
||||
}
|
||||
EEPROM_Init(); // Just verify we don't crash
|
||||
EEPROM_Init(); // Just verify we don't crash
|
||||
}
|
||||
|
||||
TEST_F(EepromStm32Test, TestWriteBadAddress) {
|
||||
|
|
@ -206,11 +208,11 @@ TEST_F(EepromStm32Test, TestReadWord) {
|
|||
|
||||
TEST_F(EepromStm32Test, TestWriteWord) {
|
||||
/* Direct compacted-area: Address < 0x80 */
|
||||
EEPROM_WriteDataWord(0, 0xdead); // Aligned
|
||||
EEPROM_WriteDataWord(3, 0xbeef); // Unaligned
|
||||
EEPROM_WriteDataWord(0, 0xdead); // Aligned
|
||||
EEPROM_WriteDataWord(3, 0xbeef); // Unaligned
|
||||
/* Direct compacted-area: Address >= 0x80 */
|
||||
EEPROM_WriteDataWord(200, 0xabcd); // Aligned
|
||||
EEPROM_WriteDataWord(203, 0x9876); // Unaligned
|
||||
EEPROM_WriteDataWord(200, 0xabcd); // Aligned
|
||||
EEPROM_WriteDataWord(203, 0x9876); // Unaligned
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234);
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678);
|
||||
/* Write Log word zero-encoded */
|
||||
|
|
@ -218,10 +220,10 @@ TEST_F(EepromStm32Test, TestWriteWord) {
|
|||
/* Write Log word one-encoded */
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1);
|
||||
/* Write Log word value aligned */
|
||||
EEPROM_WriteDataWord(200, 0x4321); // Aligned
|
||||
EEPROM_WriteDataWord(200, 0x4321); // Aligned
|
||||
/* Write Log word value unaligned */
|
||||
EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte
|
||||
EEPROM_WriteDataWord(203, 0xcdef); // Unaligned
|
||||
EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte
|
||||
EEPROM_WriteDataWord(203, 0xcdef); // Unaligned
|
||||
/* Check values */
|
||||
/* Direct compacted-area */
|
||||
EXPECT_EQ(*(uint16_t*)&FlashBuf[EEPROM_BASE], (uint16_t)~0xdead);
|
||||
|
|
@ -249,11 +251,11 @@ TEST_F(EepromStm32Test, TestWriteWord) {
|
|||
|
||||
TEST_F(EepromStm32Test, TestWordRoundTrip) {
|
||||
/* Direct compacted-area: Address < 0x80 */
|
||||
EEPROM_WriteDataWord(0, 0xdead); // Aligned
|
||||
EEPROM_WriteDataWord(3, 0xbeef); // Unaligned
|
||||
EEPROM_WriteDataWord(0, 0xdead); // Aligned
|
||||
EEPROM_WriteDataWord(3, 0xbeef); // Unaligned
|
||||
/* Direct compacted-area: Address >= 0x80 */
|
||||
EEPROM_WriteDataWord(200, 0xabcd); // Aligned
|
||||
EEPROM_WriteDataWord(203, 0x9876); // Unaligned
|
||||
EEPROM_WriteDataWord(200, 0xabcd); // Aligned
|
||||
EEPROM_WriteDataWord(203, 0x9876); // Unaligned
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 4, 0x1234);
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 2, 0x5678);
|
||||
/* Check values */
|
||||
|
|
@ -270,10 +272,10 @@ TEST_F(EepromStm32Test, TestWordRoundTrip) {
|
|||
/* Write Log word one-encoded */
|
||||
EEPROM_WriteDataWord(EEPROM_SIZE - 2, 1);
|
||||
/* Write Log word value aligned */
|
||||
EEPROM_WriteDataWord(200, 0x4321); // Aligned
|
||||
EEPROM_WriteDataWord(200, 0x4321); // Aligned
|
||||
/* Write Log word value unaligned */
|
||||
EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte
|
||||
EEPROM_WriteDataWord(203, 0xcdef); // Unaligned
|
||||
EEPROM_WriteDataByte(202, 0x3c); // Set neighboring byte
|
||||
EEPROM_WriteDataWord(203, 0xcdef); // Unaligned
|
||||
/* Check values */
|
||||
EEPROM_Init();
|
||||
EXPECT_EQ(EEPROM_ReadDataWord(200), 0x4321);
|
||||
|
|
@ -324,34 +326,34 @@ TEST_F(EepromStm32Test, TestByteWordBoundary) {
|
|||
|
||||
TEST_F(EepromStm32Test, TestDWordRoundTrip) {
|
||||
/* Direct compacted-area: Address < 0x80 */
|
||||
eeprom_write_dword((uint32_t*)0, 0xdeadbeef); // Aligned
|
||||
eeprom_write_dword((uint32_t*)9, 0x12345678); // Unaligned
|
||||
eeprom_write_dword((uint32_t*)0, 0xdeadbeef); // Aligned
|
||||
eeprom_write_dword((uint32_t*)9, 0x12345678); // Unaligned
|
||||
/* Direct compacted-area: Address >= 0x80 */
|
||||
eeprom_write_dword((uint32_t*)200, 0xfacef00d);
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xba5eba11); // Aligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0xcafed00d); // Unaligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xba5eba11); // Aligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0xcafed00d); // Unaligned
|
||||
/* Check direct values */
|
||||
EEPROM_Init();
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdeadbeef);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x12345678);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 0xfacef00d);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xba5eba11); // Aligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0xcafed00d); // Unaligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xba5eba11); // Aligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0xcafed00d); // Unaligned
|
||||
/* Write Log byte encoded */
|
||||
eeprom_write_dword((uint32_t*)0, 0xdecafbad);
|
||||
eeprom_write_dword((uint32_t*)9, 0x87654321);
|
||||
/* Write Log word encoded */
|
||||
eeprom_write_dword((uint32_t*)200, 1);
|
||||
/* Write Log word value aligned */
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xdeadc0de); // Aligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0x6789abcd); // Unaligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 4), 0xdeadc0de); // Aligned
|
||||
eeprom_write_dword((uint32_t*)(EEPROM_SIZE - 9), 0x6789abcd); // Unaligned
|
||||
/* Check log values */
|
||||
EEPROM_Init();
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)0), 0xdecafbad);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)9), 0x87654321);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)200), 1);
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xdeadc0de); // Aligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0x6789abcd); // Unaligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 4)), 0xdeadc0de); // Aligned
|
||||
EXPECT_EQ(eeprom_read_dword((uint32_t*)(EEPROM_SIZE - 9)), 0x6789abcd); // Unaligned
|
||||
}
|
||||
|
||||
TEST_F(EepromStm32Test, TestBlockRoundTrip) {
|
||||
|
|
|
|||
|
|
@ -44,6 +44,12 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) {
|
|||
}
|
||||
}
|
||||
|
||||
FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) { return FLASH_COMPLETE; }
|
||||
void FLASH_Unlock(void) { flash_locked = false; }
|
||||
void FLASH_Lock(void) { flash_locked = true; }
|
||||
FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) {
|
||||
return FLASH_COMPLETE;
|
||||
}
|
||||
void FLASH_Unlock(void) {
|
||||
flash_locked = false;
|
||||
}
|
||||
void FLASH_Lock(void) {
|
||||
flash_locked = true;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,16 +18,34 @@
|
|||
|
||||
static uint32_t current_time = 0;
|
||||
|
||||
void timer_init(void) { current_time = 0; }
|
||||
void timer_init(void) {
|
||||
current_time = 0;
|
||||
}
|
||||
|
||||
void timer_clear(void) { current_time = 0; }
|
||||
void timer_clear(void) {
|
||||
current_time = 0;
|
||||
}
|
||||
|
||||
uint16_t timer_read(void) { return current_time & 0xFFFF; }
|
||||
uint32_t timer_read32(void) { return current_time; }
|
||||
uint16_t timer_elapsed(uint16_t last) { return TIMER_DIFF_16(timer_read(), last); }
|
||||
uint32_t timer_elapsed32(uint32_t last) { return TIMER_DIFF_32(timer_read32(), last); }
|
||||
uint16_t timer_read(void) {
|
||||
return current_time & 0xFFFF;
|
||||
}
|
||||
uint32_t timer_read32(void) {
|
||||
return current_time;
|
||||
}
|
||||
uint16_t timer_elapsed(uint16_t last) {
|
||||
return TIMER_DIFF_16(timer_read(), last);
|
||||
}
|
||||
uint32_t timer_elapsed32(uint32_t last) {
|
||||
return TIMER_DIFF_32(timer_read32(), last);
|
||||
}
|
||||
|
||||
void set_time(uint32_t t) { current_time = t; }
|
||||
void advance_time(uint32_t ms) { current_time += ms; }
|
||||
void set_time(uint32_t t) {
|
||||
current_time = t;
|
||||
}
|
||||
void advance_time(uint32_t ms) {
|
||||
current_time += ms;
|
||||
}
|
||||
|
||||
void wait_ms(uint32_t ms) { advance_time(ms); }
|
||||
void wait_ms(uint32_t ms) {
|
||||
advance_time(ms);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -52,14 +52,22 @@ uint32_t timer_elapsed32(uint32_t last);
|
|||
# define TIMER_DIFF_FAST(a, b) TIMER_DIFF_16(a, b)
|
||||
# define timer_expired_fast(current, future) timer_expired(current, future)
|
||||
typedef uint16_t fast_timer_t;
|
||||
fast_timer_t inline timer_read_fast(void) { return timer_read(); }
|
||||
fast_timer_t inline timer_elapsed_fast(fast_timer_t last) { return timer_elapsed(last); }
|
||||
fast_timer_t inline timer_read_fast(void) {
|
||||
return timer_read();
|
||||
}
|
||||
fast_timer_t inline timer_elapsed_fast(fast_timer_t last) {
|
||||
return timer_elapsed(last);
|
||||
}
|
||||
#else
|
||||
# define TIMER_DIFF_FAST(a, b) TIMER_DIFF_32(a, b)
|
||||
# define timer_expired_fast(current, future) timer_expired32(current, future)
|
||||
typedef uint32_t fast_timer_t;
|
||||
fast_timer_t inline timer_read_fast(void) { return timer_read32(); }
|
||||
fast_timer_t inline timer_elapsed_fast(fast_timer_t last) { return timer_elapsed32(last); }
|
||||
fast_timer_t inline timer_read_fast(void) {
|
||||
return timer_read32();
|
||||
}
|
||||
fast_timer_t inline timer_elapsed_fast(fast_timer_t last) {
|
||||
return timer_elapsed32(last);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue