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LED Matrix: driver naming cleanups (#21580)

This commit is contained in:
Ryan 2023-07-29 15:25:00 +10:00 committed by GitHub
parent b4a7b9253a
commit 571b8bac82
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GPG key ID: 4AEE18F83AFDEB23
19 changed files with 186 additions and 186 deletions

View file

@ -42,7 +42,7 @@ uint8_t g_twi_transfer_buffer[20];
// The control buffers match the PG0 LED On/Off registers.
// Storing them like this is optimal for I2C transfers to the registers.
// We could optimize this and take out the unused registers from these
// buffers and the transfers in CKLED2001_write_pwm_buffer() but it's
// buffers and the transfers in ckled2001_write_pwm_buffer() but it's
// probably not worth the extra complexity.
uint8_t g_pwm_buffer[DRIVER_COUNT][192];
bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
@ -50,7 +50,7 @@ bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
// If the transaction fails function returns false.
g_twi_transfer_buffer[0] = reg;
g_twi_transfer_buffer[1] = data;
@ -69,7 +69,7 @@ bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
return true;
}
bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// Assumes PG1 is already selected.
// If any of the transactions fails function returns false.
// Transmit PWM registers in 12 transfers of 16 bytes.
@ -100,53 +100,53 @@ bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
return true;
}
void CKLED2001_init(uint8_t addr) {
void ckled2001_init(uint8_t addr) {
// Select to function page
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
// Setting LED driver to shutdown mode
CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
// Setting internal channel pulldown/pullup
CKLED2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL);
ckled2001_write_register(addr, PDU_REG, MSKSET_CA_CB_CHANNEL);
// Select number of scan phase
CKLED2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL);
ckled2001_write_register(addr, SCAN_PHASE_REG, PHASE_CHANNEL);
// Setting PWM Delay Phase
CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE);
ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE1_REG, MSKPWM_DELAY_PHASE_ENABLE);
// Setting Driving/Sinking Channel Slew Rate
CKLED2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE);
ckled2001_write_register(addr, SLEW_RATE_CONTROL_MODE2_REG, MSKDRIVING_SINKING_CHHANNEL_SLEWRATE_ENABLE);
// Setting Iref
CKLED2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE);
ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_DISABLE);
// Set LED CONTROL PAGE (Page 0)
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
CKLED2001_write_register(addr, i, 0x00);
ckled2001_write_register(addr, i, 0x00);
}
// Set PWM PAGE (Page 1)
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
CKLED2001_write_register(addr, i, 0x00);
ckled2001_write_register(addr, i, 0x00);
}
// Set CURRENT PAGE (Page 4)
uint8_t current_tuen_reg_list[LED_CURRENT_TUNE_LENGTH] = CKLED2001_CURRENT_TUNE;
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, CURRENT_TUNE_PAGE);
for (int i = 0; i < LED_CURRENT_TUNE_LENGTH; i++) {
CKLED2001_write_register(addr, i, current_tuen_reg_list[i]);
ckled2001_write_register(addr, i, current_tuen_reg_list[i]);
}
// Enable LEDs ON/OFF
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
for (int i = 0; i < LED_CONTROL_ON_OFF_LENGTH; i++) {
CKLED2001_write_register(addr, i, 0xFF);
ckled2001_write_register(addr, i, 0xFF);
}
// Select to function page
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
// Setting LED driver to normal mode
CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
}
void CKLED2001_set_value(int index, uint8_t value) {
void ckled2001_set_value(int index, uint8_t value) {
ckled2001_led led;
if (index >= 0 && index < LED_MATRIX_LED_COUNT) {
memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led));
@ -159,13 +159,13 @@ void CKLED2001_set_value(int index, uint8_t value) {
}
}
void CKLED2001_set_value_all(uint8_t value) {
void ckled2001_set_value_all(uint8_t value) {
for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) {
CKLED2001_set_value(i, value);
ckled2001_set_value(i, value);
}
}
void CKLED2001_set_led_control_register(uint8_t index, bool value) {
void ckled2001_set_led_control_register(uint8_t index, bool value) {
ckled2001_led led;
memcpy_P(&led, (&g_ckled2001_leds[index]), sizeof(led));
@ -181,41 +181,41 @@ void CKLED2001_set_led_control_register(uint8_t index, bool value) {
g_led_control_registers_update_required[led.driver] = true;
}
void CKLED2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_PWM_PAGE);
// If any of the transactions fail we risk writing dirty PG0,
// refresh page 0 just in case.
if (!CKLED2001_write_pwm_buffer(addr, g_pwm_buffer[index])) {
if (!ckled2001_write_pwm_buffer(addr, g_pwm_buffer[index])) {
g_led_control_registers_update_required[index] = true;
}
}
g_pwm_buffer_update_required[index] = false;
}
void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index) {
void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index) {
if (g_led_control_registers_update_required[index]) {
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, LED_CONTROL_PAGE);
for (int i = 0; i < 24; i++) {
CKLED2001_write_register(addr, i, g_led_control_registers[index][i]);
ckled2001_write_register(addr, i, g_led_control_registers[index][i]);
}
}
g_led_control_registers_update_required[index] = false;
}
void CKLED2001_sw_return_normal(uint8_t addr) {
void ckled2001_sw_return_normal(uint8_t addr) {
// Select to function page
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
// Setting LED driver to normal mode
CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_NORMAL_MODE);
}
void CKLED2001_sw_shutdown(uint8_t addr) {
void ckled2001_sw_shutdown(uint8_t addr) {
// Select to function page
CKLED2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
ckled2001_write_register(addr, CONFIGURE_CMD_PAGE, FUNCTION_PAGE);
// Setting LED driver to shutdown mode
CKLED2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
ckled2001_write_register(addr, CONFIGURATION_REG, MSKSW_SHUT_DOWN_MODE);
// Write SW Sleep Register
CKLED2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE);
ckled2001_write_register(addr, SOFTWARE_SLEEP_REG, MSKSLEEP_ENABLE);
}

View file

@ -27,24 +27,24 @@ typedef struct ckled2001_led {
extern const ckled2001_led PROGMEM g_ckled2001_leds[LED_MATRIX_LED_COUNT];
void CKLED2001_init(uint8_t addr);
bool CKLED2001_write_register(uint8_t addr, uint8_t reg, uint8_t data);
bool CKLED2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void ckled2001_init(uint8_t addr);
bool ckled2001_write_register(uint8_t addr, uint8_t reg, uint8_t data);
bool ckled2001_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void CKLED2001_set_value(int index, uint8_t value);
void CKLED2001_set_value_all(uint8_t value);
void ckled2001_set_value(int index, uint8_t value);
void ckled2001_set_value_all(uint8_t value);
void CKLED2001_set_led_control_register(uint8_t index, bool value);
void ckled2001_set_led_control_register(uint8_t index, bool value);
// This should not be called from an interrupt
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
void CKLED2001_update_pwm_buffers(uint8_t addr, uint8_t index);
void CKLED2001_update_led_control_registers(uint8_t addr, uint8_t index);
void ckled2001_update_pwm_buffers(uint8_t addr, uint8_t index);
void ckled2001_update_led_control_registers(uint8_t addr, uint8_t index);
void CKLED2001_sw_return_normal(uint8_t addr);
void CKLED2001_sw_shutdown(uint8_t addr);
void ckled2001_sw_return_normal(uint8_t addr);
void ckled2001_sw_shutdown(uint8_t addr);
// Registers Page Define
#define CONFIGURE_CMD_PAGE 0xFD

View file

@ -64,7 +64,7 @@ uint8_t g_twi_transfer_buffer[20];
// These buffers match the IS31FL3731 PWM registers 0x24-0xB3.
// Storing them like this is optimal for I2C transfers to the registers.
// We could optimize this and take out the unused registers from these
// buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's
// buffers and the transfers in is31fl3731_write_pwm_buffer() but it's
// probably not worth the extra complexity.
uint8_t g_pwm_buffer[LED_DRIVER_COUNT][144];
bool g_pwm_buffer_update_required[LED_DRIVER_COUNT] = {false};
@ -95,7 +95,7 @@ bool g_led_control_registers_update_required[LED_DRIVER_COUNT] = {false};
// 0x0E - R17,G15,G14,G13,G12,G11,G10,G09
// 0x10 - R16,R15,R14,R13,R12,R11,R10,R09
void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
g_twi_transfer_buffer[0] = reg;
g_twi_transfer_buffer[1] = data;
@ -110,7 +110,7 @@ void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
#endif
}
void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// assumes bank is already selected
// transmit PWM registers in 9 transfers of 16 bytes
@ -135,62 +135,62 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
}
}
void IS31FL3731_init(uint8_t addr) {
void is31fl3731_init(uint8_t addr) {
// In order to avoid the LEDs being driven with garbage data
// in the LED driver's PWM registers, first enable software shutdown,
// then set up the mode and other settings, clear the PWM registers,
// then disable software shutdown.
// select "function register" bank
IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG);
is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG);
// enable software shutdown
IS31FL3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x00);
is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x00);
#ifdef ISSI_3731_DEGHOST // set to enable de-ghosting of the array
IS31FL3731_write_register(addr, ISSI_REG_GHOST_IMAGE_PREVENTION, 0x10);
is31fl3731_write_register(addr, ISSI_REG_GHOST_IMAGE_PREVENTION, 0x10);
#endif
// this delay was copied from other drivers, might not be needed
wait_ms(10);
// picture mode
IS31FL3731_write_register(addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE);
is31fl3731_write_register(addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE);
// display frame 0
IS31FL3731_write_register(addr, ISSI_REG_PICTUREFRAME, 0x00);
is31fl3731_write_register(addr, ISSI_REG_PICTUREFRAME, 0x00);
// audio sync off
IS31FL3731_write_register(addr, ISSI_REG_AUDIOSYNC, 0x00);
is31fl3731_write_register(addr, ISSI_REG_AUDIOSYNC, 0x00);
// select bank 0
IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0);
is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0);
// turn off all LEDs in the LED control register
for (int i = 0x00; i <= 0x11; i++) {
IS31FL3731_write_register(addr, i, 0x00);
is31fl3731_write_register(addr, i, 0x00);
}
// turn off all LEDs in the blink control register (not really needed)
for (int i = 0x12; i <= 0x23; i++) {
IS31FL3731_write_register(addr, i, 0x00);
is31fl3731_write_register(addr, i, 0x00);
}
// set PWM on all LEDs to 0
for (int i = 0x24; i <= 0xB3; i++) {
IS31FL3731_write_register(addr, i, 0x00);
is31fl3731_write_register(addr, i, 0x00);
}
// select "function register" bank
IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG);
is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG);
// disable software shutdown
IS31FL3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x01);
is31fl3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x01);
// select bank 0 and leave it selected.
// most usage after initialization is just writing PWM buffers in bank 0
// as there's not much point in double-buffering
IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0);
is31fl3731_write_register(addr, ISSI_COMMANDREGISTER, 0);
}
void IS31FL3731_set_value(int index, uint8_t value) {
void is31fl3731_set_value(int index, uint8_t value) {
is31_led led;
if (index >= 0 && index < LED_MATRIX_LED_COUNT) {
memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
@ -205,13 +205,13 @@ void IS31FL3731_set_value(int index, uint8_t value) {
}
}
void IS31FL3731_set_value_all(uint8_t value) {
void is31fl3731_set_value_all(uint8_t value) {
for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) {
IS31FL3731_set_value(i, value);
is31fl3731_set_value(i, value);
}
}
void IS31FL3731_set_led_control_register(uint8_t index, bool value) {
void is31fl3731_set_led_control_register(uint8_t index, bool value) {
is31_led led;
memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
@ -227,17 +227,17 @@ void IS31FL3731_set_led_control_register(uint8_t index, bool value) {
g_led_control_registers_update_required[led.driver] = true;
}
void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index) {
void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
IS31FL3731_write_pwm_buffer(addr, g_pwm_buffer[index]);
is31fl3731_write_pwm_buffer(addr, g_pwm_buffer[index]);
g_pwm_buffer_update_required[index] = false;
}
}
void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index) {
void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index) {
if (g_led_control_registers_update_required[index]) {
for (int i = 0; i < 18; i++) {
IS31FL3731_write_register(addr, i, g_led_control_registers[index][i]);
is31fl3731_write_register(addr, i, g_led_control_registers[index][i]);
}
g_led_control_registers_update_required[index] = false;
}

View file

@ -30,21 +30,21 @@ typedef struct is31_led {
extern const is31_led PROGMEM g_is31_leds[LED_MATRIX_LED_COUNT];
void IS31FL3731_init(uint8_t addr);
void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data);
void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void is31fl3731_init(uint8_t addr);
void is31fl3731_write_register(uint8_t addr, uint8_t reg, uint8_t data);
void is31fl3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void IS31FL3731_set_value(int index, uint8_t value);
void IS31FL3731_set_value_all(uint8_t value);
void is31fl3731_set_value(int index, uint8_t value);
void is31fl3731_set_value_all(uint8_t value);
void IS31FL3731_set_led_control_register(uint8_t index, bool value);
void is31fl3731_set_led_control_register(uint8_t index, bool value);
// This should not be called from an interrupt
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index);
void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index);
void is31fl3731_update_pwm_buffers(uint8_t addr, uint8_t index);
void is31fl3731_update_led_control_registers(uint8_t addr, uint8_t index);
#define C1_1 0x24
#define C1_2 0x25

View file

@ -81,7 +81,7 @@ uint8_t g_twi_transfer_buffer[20];
// The control buffers match the PG0 LED On/Off registers.
// Storing them like this is optimal for I2C transfers to the registers.
// We could optimize this and take out the unused registers from these
// buffers and the transfers in IS31FL3733_write_pwm_buffer() but it's
// buffers and the transfers in is31fl3733_write_pwm_buffer() but it's
// probably not worth the extra complexity.
uint8_t g_pwm_buffer[LED_DRIVER_COUNT][192];
bool g_pwm_buffer_update_required[LED_DRIVER_COUNT] = {false};
@ -98,7 +98,7 @@ uint8_t g_led_control_registers[LED_DRIVER_COUNT][24] = {{0}, {0}, {0}, {0}};
#endif
bool g_led_control_registers_update_required[LED_DRIVER_COUNT] = {false};
bool IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
// If the transaction fails function returns false.
g_twi_transfer_buffer[0] = reg;
g_twi_transfer_buffer[1] = data;
@ -117,7 +117,7 @@ bool IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
return true;
}
bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
// Assumes PG1 is already selected.
// If any of the transactions fails function returns false.
// Transmit PWM registers in 12 transfers of 16 bytes.
@ -146,7 +146,7 @@ bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) {
return true;
}
void IS31FL3733_init(uint8_t addr, uint8_t sync) {
void is31fl3733_init(uint8_t addr, uint8_t sync) {
// In order to avoid the LEDs being driven with garbage data
// in the LED driver's PWM registers, shutdown is enabled last.
// Set up the mode and other settings, clear the PWM registers,
@ -154,45 +154,45 @@ void IS31FL3733_init(uint8_t addr, uint8_t sync) {
// Sync is passed so set it according to the datasheet.
// Unlock the command register.
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
// Select PG0
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
// Turn off all LEDs.
for (int i = 0x00; i <= 0x17; i++) {
IS31FL3733_write_register(addr, i, 0x00);
is31fl3733_write_register(addr, i, 0x00);
}
// Unlock the command register.
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
// Select PG1
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
// Set PWM on all LEDs to 0
// No need to setup Breath registers to PWM as that is the default.
for (int i = 0x00; i <= 0xBF; i++) {
IS31FL3733_write_register(addr, i, 0x00);
is31fl3733_write_register(addr, i, 0x00);
}
// Unlock the command register.
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
// Select PG3
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION);
// Set de-ghost pull-up resistors (SWx)
IS31FL3733_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP);
is31fl3733_write_register(addr, ISSI_REG_SWPULLUP, ISSI_SWPULLUP);
// Set de-ghost pull-down resistors (CSx)
IS31FL3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP);
is31fl3733_write_register(addr, ISSI_REG_CSPULLUP, ISSI_CSPULLUP);
// Set global current to maximum.
IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT);
is31fl3733_write_register(addr, ISSI_REG_GLOBALCURRENT, ISSI_GLOBALCURRENT);
// Disable software shutdown.
IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01);
is31fl3733_write_register(addr, ISSI_REG_CONFIGURATION, ((sync & 0b11) << 6) | ((ISSI_PWM_FREQUENCY & 0b111) << 3) | 0x01);
// Wait 10ms to ensure the device has woken up.
wait_ms(10);
}
void IS31FL3733_set_value(int index, uint8_t value) {
void is31fl3733_set_value(int index, uint8_t value) {
is31_led led;
if (index >= 0 && index < LED_MATRIX_LED_COUNT) {
memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
@ -205,13 +205,13 @@ void IS31FL3733_set_value(int index, uint8_t value) {
}
}
void IS31FL3733_set_value_all(uint8_t value) {
void is31fl3733_set_value_all(uint8_t value) {
for (int i = 0; i < LED_MATRIX_LED_COUNT; i++) {
IS31FL3733_set_value(i, value);
is31fl3733_set_value(i, value);
}
}
void IS31FL3733_set_led_control_register(uint8_t index, bool value) {
void is31fl3733_set_led_control_register(uint8_t index, bool value) {
is31_led led;
memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
@ -227,28 +227,28 @@ void IS31FL3733_set_led_control_register(uint8_t index, bool value) {
g_led_control_registers_update_required[led.driver] = true;
}
void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index) {
if (g_pwm_buffer_update_required[index]) {
// Firstly we need to unlock the command register and select PG1.
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
// If any of the transactions fail we risk writing dirty PG0,
// refresh page 0 just in case.
if (!IS31FL3733_write_pwm_buffer(addr, g_pwm_buffer[index])) {
if (!is31fl3733_write_pwm_buffer(addr, g_pwm_buffer[index])) {
g_led_control_registers_update_required[index] = true;
}
g_pwm_buffer_update_required[index] = false;
}
}
void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index) {
void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index) {
if (g_led_control_registers_update_required[index]) {
// Firstly we need to unlock the command register and select PG0
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
is31fl3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
for (int i = 0; i < 24; i++) {
IS31FL3733_write_register(addr, i, g_led_control_registers[index][i]);
is31fl3733_write_register(addr, i, g_led_control_registers[index][i]);
}
g_led_control_registers_update_required[index] = false;
}

View file

@ -32,21 +32,21 @@ typedef struct is31_led {
extern const is31_led PROGMEM g_is31_leds[LED_MATRIX_LED_COUNT];
void IS31FL3733_init(uint8_t addr, uint8_t sync);
bool IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data);
bool IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void is31fl3733_init(uint8_t addr, uint8_t sync);
bool is31fl3733_write_register(uint8_t addr, uint8_t reg, uint8_t data);
bool is31fl3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer);
void IS31FL3733_set_value(int index, uint8_t value);
void IS31FL3733_set_value_all(uint8_t value);
void is31fl3733_set_value(int index, uint8_t value);
void is31fl3733_set_value_all(uint8_t value);
void IS31FL3733_set_led_control_register(uint8_t index, bool value);
void is31fl3733_set_led_control_register(uint8_t index, bool value);
// This should not be called from an interrupt
// (eg. from a timer interrupt).
// Call this while idle (in between matrix scans).
// If the buffer is dirty, it will update the driver with the buffer.
void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index);
void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index);
void is31fl3733_update_pwm_buffers(uint8_t addr, uint8_t index);
void is31fl3733_update_led_control_registers(uint8_t addr, uint8_t index);
#define PUR_0R 0x00 // No PUR resistor
#define PUR_05KR 0x02 // 0.5k Ohm resistor in t_NOL