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Added MCU support for ArteryTek AT32F415 (#23445)

This commit is contained in:
HorrorTroll 2024-11-21 13:28:28 +07:00 committed by GitHub
parent 074bbbfb21
commit 39161b9ee7
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GPG key ID: B5690EEEBB952194
32 changed files with 1065 additions and 63 deletions

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@ -40,26 +40,53 @@
// Define SPI config speed
// baudrate should target 3.2MHz
#if defined(AT32F415)
# if WS2812_SPI_DIVISOR == 2
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (0)
# elif WS2812_SPI_DIVISOR == 4
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0)
# elif WS2812_SPI_DIVISOR == 8
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1)
# elif WS2812_SPI_DIVISOR == 16 // default
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0)
# elif WS2812_SPI_DIVISOR == 32
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2)
# elif WS2812_SPI_DIVISOR == 64
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_0)
# elif WS2812_SPI_DIVISOR == 128
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1)
# elif WS2812_SPI_DIVISOR == 256
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_2 | SPI_CTRL1_MDIV_1 | SPI_CTRL1_MDIV_0)
# elif WS2812_SPI_DIVISOR == 512
# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3)
# elif WS2812_SPI_DIVISOR == 1024
# define WS2812_SPI_DIVISOR_CTRL2_MDIV_X (SPI_CTRL1_MDIV_3)
# define WS2812_SPI_DIVISOR_CTRL1_MDIV_X (SPI_CTRL1_MDIV_0)
# else
# error "Configured WS2812_SPI_DIVISOR value is not supported at this time."
# endif
#else
// F072 fpclk = 48MHz
// 48/16 = 3Mhz
#if WS2812_SPI_DIVISOR == 2
# define WS2812_SPI_DIVISOR_CR1_BR_X (0)
#elif WS2812_SPI_DIVISOR == 4
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0)
#elif WS2812_SPI_DIVISOR == 8
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1)
#elif WS2812_SPI_DIVISOR == 16 // default
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0)
#elif WS2812_SPI_DIVISOR == 32
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2)
#elif WS2812_SPI_DIVISOR == 64
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0)
#elif WS2812_SPI_DIVISOR == 128
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1)
#elif WS2812_SPI_DIVISOR == 256
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
#else
# error "Configured WS2812_SPI_DIVISOR value is not supported at this time."
# if WS2812_SPI_DIVISOR == 2
# define WS2812_SPI_DIVISOR_CR1_BR_X (0)
# elif WS2812_SPI_DIVISOR == 4
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0)
# elif WS2812_SPI_DIVISOR == 8
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1)
# elif WS2812_SPI_DIVISOR == 16 // default
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0)
# elif WS2812_SPI_DIVISOR == 32
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2)
# elif WS2812_SPI_DIVISOR == 64
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0)
# elif WS2812_SPI_DIVISOR == 128
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1)
# elif WS2812_SPI_DIVISOR == 256
# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
# else
# error "Configured WS2812_SPI_DIVISOR value is not supported at this time."
# endif
#endif
// Use SPI circular buffer
@ -176,8 +203,16 @@ void ws2812_init(void) {
NULL, // error_cb
PAL_PORT(WS2812_DI_PIN),
PAL_PAD(WS2812_DI_PIN),
# if defined(AT32F415)
WS2812_SPI_DIVISOR_CTRL1_MDIV_X,
# if (WS2812_SPI_DIVISOR == 512 || WS2812_SPI_DIVISOR == 1024)
WS2812_SPI_DIVISOR_CTRL2_MDIV_X,
# endif
0
# else
WS2812_SPI_DIVISOR_CR1_BR_X,
0
# endif
#endif
};