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[Onekey] Weact F405 with USB HS ULPI

This commit is contained in:
Drashna Jael're 2024-10-22 10:12:57 -07:00
parent 81985c22c3
commit 236eaaa81d
Signed by: drashna
GPG key ID: DBA1FD3A860D1B11
5 changed files with 91 additions and 0 deletions

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// Copyright 2024 Sergey Vlasov (@sigprof)
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once
#include_next <board.h>
#undef STM32_HSECLK
#define STM32_HSECLK 8000000
#define BOARD_OTG2_USES_ULPI

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// Copyright 2024 Sergey Vlasov (@sigprof)
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once
#define ADC_PIN A0
#define SOLENOID_PINS { C6, C7, C8, C9 }
#define SOLENOID_PINS_ACTIVE_STATE { high, high, low }
#define USB_DRIVER USBD2

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{
"keyboard_name": "Onekey WeAct STM32F405 + USB3300",
"processor": "STM32F405",
"bootloader": "stm32-dfu",
"matrix_pins": {
"cols": ["A1"],
"rows": ["A2"]
}
}

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// Copyright 2024 Sergey Vlasov (@sigprof)
// SPDX-License-Identifier: GPL-2.0-or-later
#pragma once
#include_next <mcuconf.h>
#undef STM32_PLLM_VALUE
#define STM32_PLLM_VALUE 8
#undef STM32_USB_USE_OTG1
#define STM32_USB_USE_OTG1 FALSE
#undef STM32_USB_USE_OTG2
#define STM32_USB_USE_OTG2 TRUE
#undef STM32_USE_USB_OTG2_HS
#define STM32_USE_USB_OTG2_HS TRUE

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// Copyright 2024 Sergey Vlasov (@sigprof)
// SPDX-License-Identifier: GPL-2.0-or-later
#include QMK_KEYBOARD_H
#define ULPI_PIN_MODE (PAL_MODE_ALTERNATE(10) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING)
#define ULPI_STP_PIN C0
#define ULPI_DIR_PIN C2
#define ULPI_NXT_PIN C3
#define ULPI_CLK_PIN A5
#define ULPI_D0_PIN A3
#define ULPI_D1_PIN B0
#define ULPI_D2_PIN B1
#define ULPI_D3_PIN B10
#define ULPI_D4_PIN B11
#define ULPI_D5_PIN B12
#define ULPI_D6_PIN B13
#define ULPI_D7_PIN B5
#define ULPI_RST_PIN A6
void board_init(void) {
palSetLineMode(ULPI_STP_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_DIR_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_NXT_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_CLK_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D0_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D1_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D2_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D3_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D4_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D5_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D6_PIN, ULPI_PIN_MODE);
palSetLineMode(ULPI_D7_PIN, ULPI_PIN_MODE);
gpio_set_pin_output(ULPI_RST_PIN);
gpio_write_pin_low(ULPI_RST_PIN);
palSetLineMode(
B14, PAL_MODE_ALTERNATE(12) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING);
palSetLineMode(
B15, PAL_MODE_ALTERNATE(12) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING);
}