Squashed 'tmk_core/' changes from 7967731..b9e0ea0
b9e0ea0 Merge commit '7fa9d8bdea3773d1195b04d98fcf27cf48ddd81d' as 'tool/mbed/mbed-sdk' 7fa9d8b Squashed 'tool/mbed/mbed-sdk/' content from commit 7c21ce5 git-subtree-dir: tmk_core git-subtree-split: b9e0ea08cb940de20b3610ecdda18e9d8cd7c552
This commit is contained in:
parent
a20ef7052c
commit
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
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*
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* $Date: 17. January 2013
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* $Revision: V1.4.1
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*
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* Project: CMSIS DSP Library
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* Title: arm_max_f32.c
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*
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* Description: Maximum value of a floating-point vector.
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*
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
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#include "arm_math.h"
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/**
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* @ingroup groupStats
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*/
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/**
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* @defgroup Max Maximum
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*
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* Computes the maximum value of an array of data.
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* The function returns both the maximum value and its position within the array.
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* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
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*/
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/**
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* @addtogroup Max
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* @{
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*/
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/**
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* @brief Maximum value of a floating-point vector.
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* @param[in] *pSrc points to the input vector
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* @param[in] blockSize length of the input vector
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* @param[out] *pResult maximum value returned here
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* @param[out] *pIndex index of maximum value returned here
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* @return none.
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*/
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void arm_max_f32(
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float32_t * pSrc,
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uint32_t blockSize,
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float32_t * pResult,
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uint32_t * pIndex)
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{
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#ifndef ARM_MATH_CM0_FAMILY
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/* Run the below code for Cortex-M4 and Cortex-M3 */
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float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
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uint32_t blkCnt, outIndex, count; /* loop counter */
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/* Initialise the count value. */
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count = 0u;
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/* Initialise the index value to zero. */
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outIndex = 0u;
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/* Load first input value that act as reference value for comparision */
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out = *pSrc++;
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/* Loop unrolling */
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blkCnt = (blockSize - 1u) >> 2u;
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/* Run the below code for Cortex-M4 and Cortex-M3 */
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while(blkCnt > 0u)
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{
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/* Initialize maxVal to the next consecutive values one by one */
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maxVal1 = *pSrc++;
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maxVal2 = *pSrc++;
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/* compare for the maximum value */
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if(out < maxVal1)
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{
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/* Update the maximum value and its index */
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out = maxVal1;
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outIndex = count + 1u;
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}
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maxVal1 = *pSrc++;
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/* compare for the maximum value */
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if(out < maxVal2)
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{
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/* Update the maximum value and its index */
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out = maxVal2;
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outIndex = count + 2u;
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}
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maxVal2 = *pSrc++;
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/* compare for the maximum value */
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if(out < maxVal1)
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{
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/* Update the maximum value and its index */
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out = maxVal1;
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outIndex = count + 3u;
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}
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|
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/* compare for the maximum value */
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if(out < maxVal2)
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{
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/* Update the maximum value and its index */
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out = maxVal2;
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outIndex = count + 4u;
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}
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count += 4u;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* if (blockSize - 1u) is not multiple of 4 */
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blkCnt = (blockSize - 1u) % 4u;
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#else
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/* Run the below code for Cortex-M0 */
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float32_t maxVal1, out; /* Temporary variables to store the output value. */
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uint32_t blkCnt, outIndex; /* loop counter */
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/* Initialise the index value to zero. */
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outIndex = 0u;
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/* Load first input value that act as reference value for comparision */
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out = *pSrc++;
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blkCnt = (blockSize - 1u);
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#endif /* #ifndef ARM_MATH_CM0_FAMILY */
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while(blkCnt > 0u)
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{
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/* Initialize maxVal to the next consecutive values one by one */
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maxVal1 = *pSrc++;
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/* compare for the maximum value */
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if(out < maxVal1)
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{
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/* Update the maximum value and it's index */
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out = maxVal1;
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outIndex = blockSize - blkCnt;
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}
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* Store the maximum value and it's index into destination pointers */
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*pResult = out;
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*pIndex = outIndex;
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}
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/**
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* @} end of Max group
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*/
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@ -0,0 +1,176 @@
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
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*
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||||
* $Date: 17. January 2013
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* $Revision: V1.4.1
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*
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* Project: CMSIS DSP Library
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* Title: arm_max_q15.c
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*
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* Description: Maximum value of a Q15 vector.
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*
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
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/**
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* @ingroup groupStats
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||||
*/
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/**
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* @addtogroup Max
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* @{
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*/
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|
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/**
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* @brief Maximum value of a Q15 vector.
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* @param[in] *pSrc points to the input vector
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* @param[in] blockSize length of the input vector
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* @param[out] *pResult maximum value returned here
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* @param[out] *pIndex index of maximum value returned here
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* @return none.
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*/
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void arm_max_q15(
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q15_t * pSrc,
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uint32_t blockSize,
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q15_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
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||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q15_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
maxVal2 = *pSrc++;
|
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|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
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outIndex = count + 1u;
|
||||
}
|
||||
|
||||
maxVal1 = *pSrc++;
|
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|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
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||||
outIndex = count + 2u;
|
||||
}
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||||
|
||||
maxVal2 = *pSrc++;
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||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u) is not multiple of 4 */
|
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blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q15_t maxVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and it's index */
|
||||
out = maxVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the maximum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Max group
|
||||
*/
|
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@ -0,0 +1,177 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_max_q31.c
|
||||
*
|
||||
* Description: Maximum value of a Q31 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Max
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult maximum value returned here
|
||||
* @param[out] *pIndex index of maximum value returned here
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_max_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
maxVal2 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
maxVal2 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q31_t maxVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and it's index */
|
||||
out = maxVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the maximum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Max group
|
||||
*/
|
|
@ -0,0 +1,177 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_max_q7.c
|
||||
*
|
||||
* Description: Maximum value of a Q7 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Max
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Maximum value of a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult maximum value returned here
|
||||
* @param[out] *pIndex index of maximum value returned here
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void arm_max_q7(
|
||||
q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q7_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
maxVal2 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
maxVal2 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal2)
|
||||
{
|
||||
/* Update the maximum value and its index */
|
||||
out = maxVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q7_t maxVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Initialize maxVal to the next consecutive values one by one */
|
||||
maxVal1 = *pSrc++;
|
||||
|
||||
/* compare for the maximum value */
|
||||
if(out < maxVal1)
|
||||
{
|
||||
/* Update the maximum value and it's index */
|
||||
out = maxVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the maximum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Max group
|
||||
*/
|
|
@ -0,0 +1,139 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mean_f32.c
|
||||
*
|
||||
* Description: Mean value of a floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup mean Mean
|
||||
*
|
||||
* Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mean
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Mean value of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult mean value returned here
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
|
||||
void arm_mean_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult)
|
||||
{
|
||||
float32_t sum = 0.0f; /* Temporary result storage */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
float32_t in1, in2, in3, in4;
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
in1 = *pSrc++;
|
||||
in2 = *pSrc++;
|
||||
in3 = *pSrc++;
|
||||
in4 = *pSrc++;
|
||||
|
||||
sum += in1;
|
||||
sum += in2;
|
||||
sum += in3;
|
||||
sum += in4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
sum += *pSrc++;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
|
||||
/* Store the result to the destination */
|
||||
*pResult = sum / (float32_t) blockSize;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of mean group
|
||||
*/
|
|
@ -0,0 +1,133 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mean_q15.c
|
||||
*
|
||||
* Description: Mean value of a Q15 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mean
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult mean value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function is implemented using a 32-bit internal accumulator.
|
||||
* The input is represented in 1.15 format and is accumulated in a 32-bit
|
||||
* accumulator in 17.15 format.
|
||||
* There is no risk of internal overflow with this approach, and the
|
||||
* full precision of intermediate result is preserved.
|
||||
* Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_mean_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult)
|
||||
{
|
||||
q31_t sum = 0; /* Temporary result storage */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t in;
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
sum += *pSrc++;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
|
||||
/* Store the result to the destination */
|
||||
*pResult = (q15_t) (sum / blockSize);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of mean group
|
||||
*/
|
|
@ -0,0 +1,136 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mean_q31.c
|
||||
*
|
||||
* Description: Mean value of a Q31 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mean
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult mean value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*\par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.31 format and is accumulated in a 64-bit
|
||||
* accumulator in 33.31 format.
|
||||
* There is no risk of internal overflow with this approach, and the
|
||||
* full precision of intermediate result is preserved.
|
||||
* Finally, the accumulator is truncated to yield a result of 1.31 format.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_mean_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* Temporary result storage */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t in1, in2, in3, in4;
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
in1 = *pSrc++;
|
||||
in2 = *pSrc++;
|
||||
in3 = *pSrc++;
|
||||
in4 = *pSrc++;
|
||||
|
||||
sum += in1;
|
||||
sum += in2;
|
||||
sum += in3;
|
||||
sum += in4;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
sum += *pSrc++;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
|
||||
/* Store the result to the destination */
|
||||
*pResult = (q31_t) (sum / (int32_t) blockSize);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of mean group
|
||||
*/
|
|
@ -0,0 +1,133 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_mean_q7.c
|
||||
*
|
||||
* Description: Mean value of a Q7 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup mean
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Mean value of a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult mean value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
* \par
|
||||
* The function is implemented using a 32-bit internal accumulator.
|
||||
* The input is represented in 1.7 format and is accumulated in a 32-bit
|
||||
* accumulator in 25.7 format.
|
||||
* There is no risk of internal overflow with this approach, and the
|
||||
* full precision of intermediate result is preserved.
|
||||
* Finally, the accumulator is truncated to yield a result of 1.7 format.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_mean_q7(
|
||||
q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult)
|
||||
{
|
||||
q31_t sum = 0; /* Temporary result storage */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t in;
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
in = *__SIMD32(pSrc)++;
|
||||
|
||||
sum += ((in << 24) >> 24);
|
||||
sum += ((in << 16) >> 24);
|
||||
sum += ((in << 8) >> 24);
|
||||
sum += (in >> 24);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
sum += *pSrc++;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
|
||||
/* Store the result to the destination */
|
||||
*pResult = (q7_t) (sum / (int32_t) blockSize);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of mean group
|
||||
*/
|
|
@ -0,0 +1,183 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_min_f32.c
|
||||
*
|
||||
* Description: Minimum value of a floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup Min Minimum
|
||||
*
|
||||
* Computes the minimum value of an array of data.
|
||||
* The function returns both the minimum value and its position within the array.
|
||||
* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Min
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult minimum value returned here
|
||||
* @param[out] *pIndex index of minimum value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_min_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
float32_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u ) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
float32_t minVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
#endif // #ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and it's index */
|
||||
out = minVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the minimum value and it's index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Min group
|
||||
*/
|
|
@ -0,0 +1,177 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_min_q15.c
|
||||
*
|
||||
* Description: Minimum value of a Q15 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup Min
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult minimum value returned here
|
||||
* @param[out] *pIndex index of minimum value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_min_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u ) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q15_t minVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
#endif // #ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and it's index */
|
||||
out = minVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Store the minimum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Min group
|
||||
*/
|
|
@ -0,0 +1,176 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_min_q31.c
|
||||
*
|
||||
* Description: Minimum value of a Q31 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @addtogroup Min
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult minimum value returned here
|
||||
* @param[out] *pIndex index of minimum value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_min_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q31_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u ) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q31_t minVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
#endif // #ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and it's index */
|
||||
out = minVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the minimum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Min group
|
||||
*/
|
|
@ -0,0 +1,178 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_min_q7.c
|
||||
*
|
||||
* Description: Minimum value of a Q7 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup Min
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Minimum value of a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult minimum value returned here
|
||||
* @param[out] *pIndex index of minimum value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_min_q7(
|
||||
q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q7_t * pResult,
|
||||
uint32_t * pIndex)
|
||||
{
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q7_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex, count; /* loop counter */
|
||||
|
||||
/* Initialise the count value. */
|
||||
count = 0u;
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
/* Loop unrolling */
|
||||
blkCnt = (blockSize - 1u) >> 2u;
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 1u;
|
||||
}
|
||||
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 2u;
|
||||
}
|
||||
|
||||
minVal2 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal1;
|
||||
outIndex = count + 3u;
|
||||
}
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal2)
|
||||
{
|
||||
/* Update the minimum value and its index */
|
||||
out = minVal2;
|
||||
outIndex = count + 4u;
|
||||
}
|
||||
|
||||
count += 4u;
|
||||
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* if (blockSize - 1u ) is not multiple of 4 */
|
||||
blkCnt = (blockSize - 1u) % 4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
q7_t minVal1, out; /* Temporary variables to store the output value. */
|
||||
uint32_t blkCnt, outIndex; /* loop counter */
|
||||
|
||||
/* Initialise the index value to zero. */
|
||||
outIndex = 0u;
|
||||
/* Load first input value that act as reference value for comparision */
|
||||
out = *pSrc++;
|
||||
|
||||
blkCnt = (blockSize - 1u);
|
||||
|
||||
#endif // #ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
while(blkCnt > 0)
|
||||
{
|
||||
/* Initialize minVal to the next consecutive values one by one */
|
||||
minVal1 = *pSrc++;
|
||||
|
||||
/* compare for the minimum value */
|
||||
if(out > minVal1)
|
||||
{
|
||||
/* Update the minimum value and it's index */
|
||||
out = minVal1;
|
||||
outIndex = blockSize - blkCnt;
|
||||
}
|
||||
|
||||
blkCnt--;
|
||||
|
||||
}
|
||||
|
||||
/* Store the minimum value and its index into destination pointers */
|
||||
*pResult = out;
|
||||
*pIndex = outIndex;
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of Min group
|
||||
*/
|
|
@ -0,0 +1,143 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_power_f32.c
|
||||
*
|
||||
* Description: Sum of the squares of the elements of a floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup power Power
|
||||
*
|
||||
* Calculates the sum of the squares of the elements in the input vector.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating point, Q31, Q15, and Q7 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup power
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult sum of the squares value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_power_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult)
|
||||
{
|
||||
float32_t sum = 0.0f; /* accumulator */
|
||||
float32_t in; /* Temporary variable to store input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* compute power and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store the result to the destination */
|
||||
*pResult = sum;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of power group
|
||||
*/
|
|
@ -0,0 +1,152 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_power_q15.c
|
||||
*
|
||||
* Description: Sum of the squares of the elements of a Q15 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup power
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult sum of the squares value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.15 format.
|
||||
* Intermediate multiplication yields a 2.30 format, and this
|
||||
* result is added without saturation to a 64-bit accumulator in 34.30 format.
|
||||
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the return result is in 34.30 format.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_power_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q63_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* Temporary result storage */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t in32; /* Temporary variable to store input value */
|
||||
q15_t in16; /* Temporary variable to store input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
|
||||
/* loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in32 = *__SIMD32(pSrc)++;
|
||||
sum = __SMLALD(in32, in32, sum);
|
||||
in32 = *__SIMD32(pSrc)++;
|
||||
sum = __SMLALD(in32, in32, sum);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in16 = *pSrc++;
|
||||
sum = __SMLALD(in16, in16, sum);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
q15_t in; /* Temporary variable to store input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += ((q31_t) in * in);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
/* Store the results in 34.30 format */
|
||||
*pResult = sum;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of power group
|
||||
*/
|
|
@ -0,0 +1,143 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_power_q31.c
|
||||
*
|
||||
* Description: Sum of the squares of the elements of a Q31 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup power
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult sum of the squares value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.31 format.
|
||||
* Intermediate multiplication yields a 2.62 format, and this
|
||||
* result is truncated to 2.48 format by discarding the lower 14 bits.
|
||||
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
|
||||
* With 15 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the return result is in 16.48 format.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_power_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q63_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* Temporary result storage */
|
||||
q31_t in;
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
|
||||
in = *pSrc++;
|
||||
sum += ((q63_t) in * in) >> 14u;
|
||||
|
||||
in = *pSrc++;
|
||||
sum += ((q63_t) in * in) >> 14u;
|
||||
|
||||
in = *pSrc++;
|
||||
sum += ((q63_t) in * in) >> 14u;
|
||||
|
||||
in = *pSrc++;
|
||||
sum += ((q63_t) in * in) >> 14u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += ((q63_t) in * in) >> 14u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store the results in 16.48 format */
|
||||
*pResult = sum;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of power group
|
||||
*/
|
|
@ -0,0 +1,141 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_power_q7.c
|
||||
*
|
||||
* Description: Sum of the squares of the elements of a Q7 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup power
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Sum of the squares of the elements of a Q7 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult sum of the squares value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 32-bit internal accumulator.
|
||||
* The input is represented in 1.7 format.
|
||||
* Intermediate multiplication yields a 2.14 format, and this
|
||||
* result is added without saturation to an accumulator in 18.14 format.
|
||||
* With 17 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the return result is in 18.14 format.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_power_q7(
|
||||
q7_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult)
|
||||
{
|
||||
q31_t sum = 0; /* Temporary result storage */
|
||||
q7_t in; /* Temporary variable to store input */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t input1; /* Temporary variable to store packed input */
|
||||
q31_t in1, in2; /* Temporary variables to store input */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* Reading two inputs of pSrc vector and packing */
|
||||
input1 = *__SIMD32(pSrc)++;
|
||||
|
||||
in1 = __SXTB16(__ROR(input1, 8));
|
||||
in2 = __SXTB16(input1);
|
||||
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* calculate power and accumulate to accumulator */
|
||||
sum = __SMLAD(in1, in1, sum);
|
||||
sum = __SMLAD(in2, in2, sum);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute Power and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += ((q15_t) in * in);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Store the result in 18.14 format */
|
||||
*pResult = sum;
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of power group
|
||||
*/
|
|
@ -0,0 +1,141 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_rms_f32.c
|
||||
*
|
||||
* Description: Root mean square value of an array of F32 type
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup RMS Root mean square (RMS)
|
||||
*
|
||||
*
|
||||
* Calculates the Root Mean Sqaure of the elements in the input vector.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating point, Q31, and Q15 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup RMS
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult rms value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_rms_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult)
|
||||
{
|
||||
float32_t sum = 0.0f; /* Accumulator */
|
||||
float32_t in; /* Tempoprary variable to store input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/* loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute sum of the squares and then store the result in a temporary variable, sum */
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute sum of the squares and then store the results in a temporary variable, sum */
|
||||
in = *pSrc++;
|
||||
sum += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Rms and store the result in the destination */
|
||||
arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of RMS group
|
||||
*/
|
|
@ -0,0 +1,162 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_rms_q15.c
|
||||
*
|
||||
* Description: Root Mean Square of the elements of a Q15 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @addtogroup RMS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult rms value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.15 format.
|
||||
* Intermediate multiplication yields a 2.30 format, and this
|
||||
* result is added without saturation to a 64-bit accumulator in 34.30 format.
|
||||
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
|
||||
* 15 bits, and then saturated to yield a result in 1.15 format.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_rms_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* accumulator */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t in; /* temporary variable to store the input value */
|
||||
q15_t in1; /* temporary variable to store the input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
/* loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute sum of the squares and then store the results in a temporary variable, sum */
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum = __SMLALD(in, in, sum);
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum = __SMLALD(in, in, sum);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute sum of the squares and then store the results in a temporary variable, sum */
|
||||
in1 = *pSrc++;
|
||||
sum = __SMLALD(in1, in1, sum);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Truncating and saturating the accumulator to 1.15 format */
|
||||
in = (q31_t)(sum >> 15);
|
||||
|
||||
in1 = __SSAT(in / blockSize, 16);
|
||||
|
||||
/* Store the result in the destination */
|
||||
arm_sqrt_q15(in1, pResult);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
q15_t in; /* temporary variable to store the input value */
|
||||
q31_t tmp; /* temporary variable to store the input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute sum of the squares and then store the results in a temporary variable, sum */
|
||||
in = *pSrc++;
|
||||
sum += ((q31_t) in * in);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Truncating and saturating the accumulator to 1.15 format */
|
||||
tmp = (q31_t)(sum >> 15);
|
||||
|
||||
in = __SSAT(tmp / blockSize, 16);
|
||||
|
||||
/* Store the result in the destination */
|
||||
arm_sqrt_q15(in, pResult);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of RMS group
|
||||
*/
|
|
@ -0,0 +1,154 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_rms_q31.c
|
||||
*
|
||||
* Description: Root Mean Square of the elements of a Q31 vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @addtogroup RMS
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Root Mean Square of the elements of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult rms value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
*\par
|
||||
* The function is implemented using an internal 64-bit accumulator.
|
||||
* The input is represented in 1.31 format, and intermediate multiplication
|
||||
* yields a 2.62 format.
|
||||
* The accumulator maintains full precision of the intermediate multiplication results,
|
||||
* but provides only a single guard bit.
|
||||
* There is no saturation on intermediate additions.
|
||||
* If the accumulator overflows, it wraps around and distorts the result.
|
||||
* In order to avoid overflows completely, the input signal must be scaled down by
|
||||
* log2(blockSize) bits, as a total of blockSize additions are performed internally.
|
||||
* Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
|
||||
*
|
||||
*/
|
||||
|
||||
void arm_rms_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* accumulator */
|
||||
q31_t in; /* Temporary variable to store the input */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t in1, in2, in3, in4; /* Temporary input variables */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 8 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 7 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute sum of the squares and then store the result in a temporary variable, sum */
|
||||
/* read two samples from source buffer */
|
||||
in1 = pSrc[0];
|
||||
in2 = pSrc[1];
|
||||
|
||||
/* calculate power and accumulate to accumulator */
|
||||
sum += (q63_t) in1 *in1;
|
||||
sum += (q63_t) in2 *in2;
|
||||
|
||||
/* read two samples from source buffer */
|
||||
in3 = pSrc[2];
|
||||
in4 = pSrc[3];
|
||||
|
||||
/* calculate power and accumulate to accumulator */
|
||||
sum += (q63_t) in3 *in3;
|
||||
sum += (q63_t) in4 *in4;
|
||||
|
||||
|
||||
/* update source buffer to process next samples */
|
||||
pSrc += 4u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 8, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
|
||||
/* Compute sum of the squares and then store the results in a temporary variable, sum */
|
||||
in = *pSrc++;
|
||||
sum += (q63_t) in *in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
|
||||
|
||||
sum = __SSAT(sum >> 31, 31);
|
||||
|
||||
|
||||
/* Compute Rms and store the result in the destination vector */
|
||||
arm_sqrt_q31((q31_t) ((q31_t) sum / (int32_t) blockSize), pResult);
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of RMS group
|
||||
*/
|
|
@ -0,0 +1,196 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_std_f32.c
|
||||
*
|
||||
* Description: Standard deviation of the elements of a floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup STD Standard deviation
|
||||
*
|
||||
* Calculates the standard deviation of the elements in the input vector.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
|
||||
*
|
||||
* where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
|
||||
*
|
||||
* sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating point, Q31, and Q15 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup STD
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult standard deviation value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_std_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult)
|
||||
{
|
||||
float32_t sum = 0.0f; /* Temporary result storage */
|
||||
float32_t sumOfSquares = 0.0f; /* Sum of squares */
|
||||
float32_t in; /* input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
float32_t meanOfSquares, mean, squareOfMean;
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
|
||||
|
||||
/* Compute mean of all input values */
|
||||
mean = sum / (float32_t) blockSize;
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = (mean * mean) * (((float32_t) blockSize) /
|
||||
((float32_t) blockSize - 1.0f));
|
||||
|
||||
/* Compute standard deviation and then store the result to the destination */
|
||||
arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
float32_t squareOfSum; /* Square of Sum */
|
||||
float32_t var; /* Temporary varaince storage */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sumOfSquares. */
|
||||
in = *pSrc++;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* C = (A[0] + A[1] + ... + A[blockSize-1]) */
|
||||
/* Compute Sum of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute the square of sum */
|
||||
squareOfSum = ((sum * sum) / (float32_t) blockSize);
|
||||
|
||||
/* Compute the variance */
|
||||
var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
|
||||
|
||||
/* Compute standard deviation and then store the result to the destination */
|
||||
arm_sqrt_f32(var, pResult);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of STD group
|
||||
*/
|
|
@ -0,0 +1,205 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_std_q15.c
|
||||
*
|
||||
* Description: Standard deviation of an array of Q15 type.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup STD
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult standard deviation value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.15 format.
|
||||
* Intermediate multiplication yields a 2.30 format, and this
|
||||
* result is added without saturation to a 64-bit accumulator in 34.30 format.
|
||||
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
|
||||
* 15 bits, and then saturated to yield a result in 1.15 format.
|
||||
*/
|
||||
|
||||
void arm_std_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q15_t * pResult)
|
||||
{
|
||||
q31_t sum = 0; /* Accumulator */
|
||||
q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
|
||||
q15_t mean; /* mean */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
q15_t t; /* Temporary variable */
|
||||
q63_t sumOfSquares = 0; /* Accumulator */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t in; /* input value */
|
||||
q15_t in1; /* input value */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
sumOfSquares = __SMLALD(in, in, sumOfSquares);
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
sumOfSquares = __SMLALD(in, in, sumOfSquares);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in1 = *pSrc++;
|
||||
sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
|
||||
sum += in1;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
|
||||
sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
|
||||
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
|
||||
|
||||
/* Compute mean of all input values */
|
||||
t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
|
||||
mean = (q15_t) __SSAT(sum, 16u);
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = ((q31_t) mean * mean) >> 15;
|
||||
squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
|
||||
|
||||
/* mean of the squares minus the square of the mean. */
|
||||
in1 = (q15_t) (meanOfSquares - squareOfMean);
|
||||
|
||||
/* Compute standard deviation and store the result to the destination */
|
||||
arm_sqrt_q15(in1, pResult);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
q15_t in; /* input value */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sumOfSquares. */
|
||||
in = *pSrc++;
|
||||
sumOfSquares += (in * in);
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
t = (q15_t) ((1.0 / (blockSize - 1)) * 16384LL);
|
||||
sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
|
||||
|
||||
/* Compute mean of all input values */
|
||||
mean = (q15_t) __SSAT(sum, 16u);
|
||||
|
||||
/* Compute square of mean of the input samples
|
||||
* and then store the result in a temporary variable, squareOfMean.*/
|
||||
t = (q15_t) ((1.0 / (blockSize * (blockSize - 1))) * 32768LL);
|
||||
squareOfMean = ((q31_t) mean * mean) >> 15;
|
||||
squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
|
||||
|
||||
/* mean of the squares minus the square of the mean. */
|
||||
in = (q15_t) (meanOfSquares - squareOfMean);
|
||||
|
||||
/* Compute standard deviation and store the result to the destination */
|
||||
arm_sqrt_q15(in, pResult);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of STD group
|
||||
*/
|
|
@ -0,0 +1,192 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_std_q31.c
|
||||
*
|
||||
* Description: Standard deviation of an array of Q31 type.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup STD
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Standard deviation of the elements of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult standard deviation value returned here
|
||||
* @return none.
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
*\par
|
||||
* The function is implemented using an internal 64-bit accumulator.
|
||||
* The input is represented in 1.31 format, and intermediate multiplication
|
||||
* yields a 2.62 format.
|
||||
* The accumulator maintains full precision of the intermediate multiplication results,
|
||||
* but provides only a single guard bit.
|
||||
* There is no saturation on intermediate additions.
|
||||
* If the accumulator overflows it wraps around and distorts the result.
|
||||
* In order to avoid overflows completely the input signal must be scaled down by
|
||||
* log2(blockSize) bits, as a total of blockSize additions are performed internally.
|
||||
* Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_std_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult)
|
||||
{
|
||||
q63_t sum = 0; /* Accumulator */
|
||||
q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
|
||||
q31_t mean; /* mean */
|
||||
q31_t in; /* input value */
|
||||
q31_t t; /* Temporary variable */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
q63_t sumOfSquares = 0; /* Accumulator */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
sumOfSquares = (sumOfSquares >> 31);
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sumOfSquares. */
|
||||
in = *pSrc++;
|
||||
sumOfSquares += ((q63_t) (in) * (in));
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
|
||||
sumOfSquares = (sumOfSquares >> 31);
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
/* Compute mean of all input values */
|
||||
t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
|
||||
mean = (q31_t) (sum);
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
|
||||
squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
|
||||
|
||||
|
||||
/* Compute standard deviation and then store the result to the destination */
|
||||
arm_sqrt_q31(meanOfSquares - squareOfMean, pResult);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of STD group
|
||||
*/
|
|
@ -0,0 +1,192 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_var_f32.c
|
||||
*
|
||||
* Description: Variance of the elements of a floating-point vector.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* ---------------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup variance Variance
|
||||
*
|
||||
* Calculates the variance of the elements in the input vector.
|
||||
* The underlying algorithm is used:
|
||||
*
|
||||
* <pre>
|
||||
* Result = (sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1)
|
||||
*
|
||||
* where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
|
||||
*
|
||||
* sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
|
||||
* </pre>
|
||||
*
|
||||
* There are separate functions for floating point, Q31, and Q15 data types.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup variance
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a floating-point vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult variance value returned here
|
||||
* @return none.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_var_f32(
|
||||
float32_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
float32_t * pResult)
|
||||
{
|
||||
|
||||
float32_t sum = 0.0f; /* Temporary result storage */
|
||||
float32_t sumOfSquares = 0.0f; /* Sum of squares */
|
||||
float32_t in; /* input value */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sum += in;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
|
||||
|
||||
/* Compute mean of all input values */
|
||||
mean = sum / (float32_t) blockSize;
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = (mean * mean) * (((float32_t) blockSize) /
|
||||
((float32_t) blockSize - 1.0f));
|
||||
|
||||
/* Compute variance and then store the result to the destination */
|
||||
*pResult = meanOfSquares - squareOfMean;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
float32_t squareOfSum; /* Square of Sum */
|
||||
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sumOfSquares. */
|
||||
in = *pSrc++;
|
||||
sumOfSquares += in * in;
|
||||
|
||||
/* C = (A[0] + A[1] + ... + A[blockSize-1]) */
|
||||
/* Compute Sum of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute the square of sum */
|
||||
squareOfSum = ((sum * sum) / (float32_t) blockSize);
|
||||
|
||||
/* Compute the variance */
|
||||
*pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of variance group
|
||||
*/
|
|
@ -0,0 +1,188 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_var_q15.c
|
||||
*
|
||||
* Description: Variance of an array of Q15 type.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup variance
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a Q15 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult variance value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
* \par
|
||||
* The function is implemented using a 64-bit internal accumulator.
|
||||
* The input is represented in 1.15 format.
|
||||
* Intermediate multiplication yields a 2.30 format, and this
|
||||
* result is added without saturation to a 64-bit accumulator in 34.30 format.
|
||||
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
|
||||
* full precision of the intermediate multiplication is preserved.
|
||||
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
|
||||
* 15 bits, and then saturated to yield a result in 1.15 format.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_var_q15(
|
||||
q15_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q31_t * pResult)
|
||||
{
|
||||
q31_t sum = 0; /* Accumulator */
|
||||
q31_t meanOfSquares, squareOfMean; /* Mean of square and square of mean */
|
||||
q15_t mean; /* mean */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
q15_t t; /* Temporary variable */
|
||||
q63_t sumOfSquares = 0; /* Accumulator */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
|
||||
q31_t in; /* Input variable */
|
||||
q15_t in1; /* Temporary variable */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
sumOfSquares = __SMLALD(in, in, sumOfSquares);
|
||||
in = *__SIMD32(pSrc)++;
|
||||
sum += ((in << 16) >> 16);
|
||||
sum += (in >> 16);
|
||||
sumOfSquares = __SMLALD(in, in, sumOfSquares);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in1 = *pSrc++;
|
||||
sum += in1;
|
||||
sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
|
||||
sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
|
||||
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
|
||||
q15_t in; /* Temporary variable */
|
||||
/* Loop over blockSize number of values */
|
||||
blkCnt = blockSize;
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sumOfSquares. */
|
||||
in = *pSrc++;
|
||||
sumOfSquares += (in * in);
|
||||
|
||||
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
|
||||
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
t = (q15_t) ((1.0f / (float32_t) (blockSize - 1u)) * 16384);
|
||||
sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
|
||||
meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
/* Compute mean of all input values */
|
||||
t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768);
|
||||
mean = __SSAT(sum, 16u);
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = ((q31_t) mean * mean) >> 15;
|
||||
squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 15);
|
||||
|
||||
/* Compute variance and then store the result to the destination */
|
||||
*pResult = (meanOfSquares - squareOfMean);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of variance group
|
||||
*/
|
|
@ -0,0 +1,178 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 17. January 2013
|
||||
* $Revision: V1.4.1
|
||||
*
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_var_q31.c
|
||||
*
|
||||
* Description: Variance of an array of Q31 type.
|
||||
*
|
||||
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* - Neither the name of ARM LIMITED nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
/**
|
||||
* @ingroup groupStats
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup variance
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Variance of the elements of a Q31 vector.
|
||||
* @param[in] *pSrc points to the input vector
|
||||
* @param[in] blockSize length of the input vector
|
||||
* @param[out] *pResult variance value returned here
|
||||
* @return none.
|
||||
*
|
||||
* @details
|
||||
* <b>Scaling and Overflow Behavior:</b>
|
||||
*
|
||||
*\par
|
||||
* The function is implemented using an internal 64-bit accumulator.
|
||||
* The input is represented in 1.31 format, and intermediate multiplication
|
||||
* yields a 2.62 format.
|
||||
* The accumulator maintains full precision of the intermediate multiplication results,
|
||||
* but provides only a single guard bit.
|
||||
* There is no saturation on intermediate additions.
|
||||
* If the accumulator overflows it wraps around and distorts the result.
|
||||
* In order to avoid overflows completely the input signal must be scaled down by
|
||||
* log2(blockSize) bits, as a total of blockSize additions are performed internally.
|
||||
* Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
void arm_var_q31(
|
||||
q31_t * pSrc,
|
||||
uint32_t blockSize,
|
||||
q63_t * pResult)
|
||||
{
|
||||
q63_t sum = 0, sumSquare = 0; /* Accumulator */
|
||||
q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
|
||||
q31_t mean; /* mean */
|
||||
q31_t in; /* input value */
|
||||
q31_t t; /* Temporary variable */
|
||||
uint32_t blkCnt; /* loop counter */
|
||||
|
||||
#ifndef ARM_MATH_CM0_FAMILY
|
||||
|
||||
/* Run the below code for Cortex-M4 and Cortex-M3 */
|
||||
q63_t sumSquare1 = 0; /* Accumulator */
|
||||
q31_t in1, in2, in3, in4; /* Temporary input variables */
|
||||
|
||||
/*loop Unrolling */
|
||||
blkCnt = blockSize >> 2u;
|
||||
|
||||
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
|
||||
** a second loop below computes the remaining 1 to 3 samples. */
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
/* read input samples from source buffer */
|
||||
in1 = pSrc[0];
|
||||
in2 = pSrc[1];
|
||||
|
||||
/* calculate sum of inputs */
|
||||
sum += in1;
|
||||
/* calculate sum of squares */
|
||||
sumSquare += ((q63_t) (in1) * (in1));
|
||||
in3 = pSrc[2];
|
||||
sum += in2;
|
||||
sumSquare1 += ((q63_t) (in2) * (in2));
|
||||
in4 = pSrc[3];
|
||||
sum += in3;
|
||||
sumSquare += ((q63_t) (in3) * (in3));
|
||||
sum += in4;
|
||||
sumSquare1 += ((q63_t) (in4) * (in4));
|
||||
|
||||
/* update input pointer to process next samples */
|
||||
pSrc += 4u;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* add two accumulators */
|
||||
sumSquare = sumSquare + sumSquare1;
|
||||
|
||||
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
|
||||
** No loop unrolling is used. */
|
||||
blkCnt = blockSize % 0x4u;
|
||||
|
||||
#else
|
||||
|
||||
/* Run the below code for Cortex-M0 */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
|
||||
|
||||
while(blkCnt > 0u)
|
||||
{
|
||||
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
|
||||
/* Compute Sum of squares of the input samples
|
||||
* and then store the result in a temporary variable, sum. */
|
||||
in = *pSrc++;
|
||||
sumSquare += ((q63_t) (in) * (in));
|
||||
sum += in;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
t = (q31_t) ((1.0f / (float32_t) (blockSize - 1u)) * 1073741824.0f);
|
||||
|
||||
/* Compute Mean of squares of the input samples
|
||||
* and then store the result in a temporary variable, meanOfSquares. */
|
||||
sumSquare = (sumSquare >> 31);
|
||||
meanOfSquares = (q31_t) ((sumSquare * t) >> 30);
|
||||
|
||||
/* Compute mean of all input values */
|
||||
t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
|
||||
mean = (q31_t) (sum);
|
||||
|
||||
/* Compute square of mean */
|
||||
squareOfMean = (q31_t) (((q63_t) mean * mean) >> 31);
|
||||
squareOfMean = (q31_t) (((q63_t) squareOfMean * t) >> 31);
|
||||
|
||||
/* Compute variance and then store the result to the destination */
|
||||
*pResult = (q63_t) meanOfSquares - squareOfMean;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @} end of variance group
|
||||
*/
|
Loading…
Add table
Add a link
Reference in a new issue