Merge commit 'a074364c37
' as 'tmk_core'
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1a02ebcc61
533 changed files with 102049 additions and 0 deletions
117
tmk_core/common/avr/timer.c
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117
tmk_core/common/avr/timer.c
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/*
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Copyright 2011 Jun Wako <wakojun@gmail.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <stdint.h>
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#include "timer_avr.h"
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#include "timer.h"
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// counter resolution 1ms
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// NOTE: union { uint32_t timer32; struct { uint16_t dummy; uint16_t timer16; }}
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volatile uint32_t timer_count = 0;
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void timer_init(void)
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{
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// Timer0 CTC mode
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TCCR0A = 0x02;
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#if TIMER_PRESCALER == 1
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TCCR0B = 0x01;
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#elif TIMER_PRESCALER == 8
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TCCR0B = 0x02;
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#elif TIMER_PRESCALER == 64
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TCCR0B = 0x03;
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#elif TIMER_PRESCALER == 256
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TCCR0B = 0x04;
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#elif TIMER_PRESCALER == 1024
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TCCR0B = 0x05;
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#else
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# error "Timer prescaler value is NOT vaild."
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#endif
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OCR0A = TIMER_RAW_TOP;
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TIMSK0 = (1<<OCIE0A);
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}
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inline
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void timer_clear(void)
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{
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uint8_t sreg = SREG;
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cli();
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timer_count = 0;
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SREG = sreg;
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}
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inline
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uint16_t timer_read(void)
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{
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uint32_t t;
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uint8_t sreg = SREG;
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cli();
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t = timer_count;
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SREG = sreg;
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return (t & 0xFFFF);
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}
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inline
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uint32_t timer_read32(void)
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{
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uint32_t t;
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uint8_t sreg = SREG;
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cli();
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t = timer_count;
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SREG = sreg;
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return t;
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}
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inline
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uint16_t timer_elapsed(uint16_t last)
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{
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uint32_t t;
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uint8_t sreg = SREG;
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cli();
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t = timer_count;
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SREG = sreg;
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return TIMER_DIFF_16((t & 0xFFFF), last);
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}
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inline
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uint32_t timer_elapsed32(uint32_t last)
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{
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uint32_t t;
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uint8_t sreg = SREG;
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cli();
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t = timer_count;
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SREG = sreg;
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return TIMER_DIFF_32(t, last);
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}
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// excecuted once per 1ms.(excess for just timer count?)
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ISR(TIMER0_COMPA_vect)
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{
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timer_count++;
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}
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