Fix key stack and PS/2 Overrun
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2 changed files with 73 additions and 46 deletions
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@ -40,6 +40,52 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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)
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//#define NO_SUSPEND_POWER_DOWN
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/*
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* PS/2 Busywait
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*/
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#ifdef PS2_USE_BUSYWAIT
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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#endif
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/*
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* PS/2 Pin interrupt
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*/
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#ifdef PS2_USE_INT
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/* uses INT1 for clock line(ATMega32U4) */
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 1
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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#define PS2_INT_INIT() do { \
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EICRA |= ((1<<ISC11) | \
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(0<<ISC10)); \
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} while (0)
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#define PS2_INT_ON() do { \
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EIMSK |= (1<<INT1); \
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} while (0)
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#define PS2_INT_OFF() do { \
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EIMSK &= ~(1<<INT1); \
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} while (0)
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#define PS2_INT_VECT INT1_vect
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#endif
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/*
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* PS/2 USART
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*/
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#ifdef PS2_USE_USART
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#if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
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/* XCK for clock line and RXD for data line */
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@ -51,7 +97,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
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/* set DDR of CLOCK as input to be slave */
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#define PS2_USART_INIT() do { \
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@ -82,7 +127,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define PS2_USART_RX_DATA UDR1
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#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
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#define PS2_USART_RX_VECT USART1_RX_vect
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#elif defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
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/* XCK for clock line and RXD for data line */
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#define PS2_CLOCK_PORT PORTD
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@ -93,7 +137,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 0
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/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
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/* set DDR of CLOCK as input to be slave */
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#define PS2_USART_INIT() do { \
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@ -127,41 +170,4 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#endif
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#endif
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#ifdef PS2_USE_INT
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/* uses INT1 for clock line(ATMega32U4) */
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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#define PS2_INT_INIT() do { \
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EICRA |= ((1<<ISC11) | \
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(0<<ISC10)); \
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} while (0)
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#define PS2_INT_ON() do { \
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EIMSK |= (1<<INT1); \
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} while (0)
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#define PS2_INT_OFF() do { \
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EIMSK &= ~(1<<INT1); \
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} while (0)
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#define PS2_INT_VECT INT1_vect
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#endif
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#ifdef PS2_USE_BUSYWAIT
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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#endif
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#endif
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