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Refactor use of STM32_SYSCLK (#14430)

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* Refactor use of STM32_SYSCLK

* clang
This commit is contained in:
Joel Challis 2021-09-14 03:18:36 +01:00 committed by GitHub
parent 232bc23a89
commit 0ca4a56a04
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GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 14 additions and 12 deletions
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2
drivers/led/apa102.c
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@ -25,7 +25,7 @@
# include "hal.h"
# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX)
# define APA102_NOPS (100 / (1000000000L / (STM32_SYSCLK / 4))) // This calculates how many loops of 4 nops to run to delay 100 ns
# define APA102_NOPS (100 / (1000000000L / (CPU_CLOCK / 4))) // This calculates how many loops of 4 nops to run to delay 100 ns
# else
# error("APA102_NOPS configuration required")
# define APA102_NOPS 0 // this just pleases the compile so the above error is easier to spot

2
platforms/chibios/drivers/serial.c
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@ -19,7 +19,7 @@
# error "chSysPolledDelayX method not supported on this platform"
#else
# undef wait_us
# define wait_us(x) chSysPolledDelayX(US2RTC(STM32_SYSCLK, x))
# define wait_us(x) chSysPolledDelayX(US2RTC(CPU_CLOCK, x))
#endif
#ifndef SELECT_SOFT_SERIAL_SPEED

2
platforms/chibios/drivers/ws2812.c
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@ -23,7 +23,7 @@
#endif
#define NUMBER_NOPS 6
#define CYCLES_PER_SEC (STM32_SYSCLK / NUMBER_NOPS * NOP_FUDGE)
#define CYCLES_PER_SEC (CPU_CLOCK / NUMBER_NOPS * NOP_FUDGE)
#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC)
#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE)

2
platforms/chibios/drivers/ws2812_pwm.c
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@ -59,7 +59,7 @@
/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
#define WS2812_PWM_FREQUENCY (STM32_SYSCLK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */
#define WS2812_PWM_FREQUENCY (CPU_CLOCK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */
#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */
/**

2
tmk_core/common/chibios/_wait.h
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@ -43,8 +43,6 @@ void wait_us(uint16_t duration);
#include "_wait.c"
#define CPU_CLOCK STM32_SYSCLK
/* For GPIOs on ARM-based MCUs, the input pins are sampled by the clock of the bus
* to which the GPIO is connected.
* The connected buses differ depending on the various series of MCUs.

16
tmk_core/common/chibios/chibios_config.h
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@ -19,6 +19,11 @@
# define SPLIT_USB_DETECT // Force this on when dedicated pin is not used
#endif
// STM32 compatibility
#if defined(MCU_STM32)
# define CPU_CLOCK STM32_SYSCLK
#endif
#if defined(STM32F1XX)
# define USE_GPIOV1
#endif
@ -27,14 +32,13 @@
# define USE_I2CV1
#endif
// teensy
// teensy compatibility
#if defined(MCU_KINETIS)
# define CPU_CLOCK KINETIS_SYSCLK_FREQUENCY
#endif
#if defined(K20x) || defined(KL2x)
# define USE_I2CV1
# define USE_I2CV1_CONTRIB // for some reason a bunch of ChibiOS-Contrib boards only have clock_speed
# define USE_GPIOV1
# define STM32_SYSCLK KINETIS_SYSCLK_FREQUENCY
#endif
#if defined(MK66F18)
# define STM32_SYSCLK KINETIS_SYSCLK_FREQUENCY
#endif